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authorRoger Quadros <rogerq@ti.com>2014-11-03 06:07:18 -0500
committerTony Lindgren <tony@atomide.com>2014-11-24 10:55:40 -0500
commitea95af3c168b2bb74b1cad0f45a4609ba929afa5 (patch)
tree155d4e7afe02c2807e96c476da9ec044e50530d4
parentb41502e0a59f027775085982af1159446f612f95 (diff)
ARM: dts: dra72-evm: Add CAN support
The board has 2 CAN ports but only the first one can be used. Enable the first CAN port. WAKEUP0 pin doesn't have INPUT enable bit so we just disable weak PULLs. The second CAN port cannot be used without hardware modification so we don't enable the second port. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/boot/dts/dra72-evm.dts23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index abbaaa782f88..afc74fd4bb5e 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -105,6 +105,22 @@
105 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 105 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
106 >; 106 >;
107 }; 107 };
108
109 dcan1_pins_default: dcan1_pins_default {
110 pinctrl-single,pins = <
111 0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */
112 0x3d4 (MUX_MODE15) /* dcan1_rx.off */
113 0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
114 >;
115 };
116
117 dcan1_pins_sleep: dcan1_pins_sleep {
118 pinctrl-single,pins = <
119 0x3d0 (MUX_MODE15) /* dcan1_tx.off */
120 0x3d4 (MUX_MODE15) /* dcan1_rx.off */
121 0x418 (MUX_MODE15) /* wakeup0.off */
122 >;
123 };
108}; 124};
109 125
110&i2c1 { 126&i2c1 {
@@ -438,3 +454,10 @@
438 pinctrl-1 = <&davinci_mdio_sleep>; 454 pinctrl-1 = <&davinci_mdio_sleep>;
439 active_slave = <1>; 455 active_slave = <1>;
440}; 456};
457
458&dcan1 {
459 status = "ok";
460 pinctrl-names = "default", "sleep";
461 pinctrl-0 = <&dcan1_pins_default>;
462 pinctrl-1 = <&dcan1_pins_sleep>;
463};