diff options
author | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2017-03-02 07:58:55 -0500 |
---|---|---|
committer | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2017-03-03 05:32:16 -0500 |
commit | e9ce1a625fcae9d9dd64a877535c8d10ddfb89a0 (patch) | |
tree | b441d41ca2c3f836c4c8372682fd2ebfa5b0fd6d | |
parent | dc4a109474c6bffacaf754440fa88ff0dd957667 (diff) |
drm/i915: Pass intel_crtc to DDI functions called from crtc en/disable
Pass intel_crtc to functions intel_ddi_enable_transcoder_func(),
intel_ddi_set_pipe_settings() and intel_ddi_set_vc_payload_alloc(),
instead of the generic crtc type. By changing the functions
intel_ddi_get_crtc_encoder() so that it receives an intel_crtc
parameter, there is no need for the drm_crtc in the callers.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170302125857.14665-6-ander.conselvan.de.oliveira@intel.com
-rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 62 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 6 |
3 files changed, 34 insertions, 42 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index a320378681b3..0db526ec2f44 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c | |||
@@ -818,21 +818,20 @@ void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder) | |||
818 | } | 818 | } |
819 | 819 | ||
820 | static struct intel_encoder * | 820 | static struct intel_encoder * |
821 | intel_ddi_get_crtc_encoder(struct drm_crtc *crtc) | 821 | intel_ddi_get_crtc_encoder(struct intel_crtc *crtc) |
822 | { | 822 | { |
823 | struct drm_device *dev = crtc->dev; | 823 | struct drm_device *dev = crtc->base.dev; |
824 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
825 | struct intel_encoder *intel_encoder, *ret = NULL; | 824 | struct intel_encoder *intel_encoder, *ret = NULL; |
826 | int num_encoders = 0; | 825 | int num_encoders = 0; |
827 | 826 | ||
828 | for_each_encoder_on_crtc(dev, crtc, intel_encoder) { | 827 | for_each_encoder_on_crtc(dev, &crtc->base, intel_encoder) { |
829 | ret = intel_encoder; | 828 | ret = intel_encoder; |
830 | num_encoders++; | 829 | num_encoders++; |
831 | } | 830 | } |
832 | 831 | ||
833 | if (num_encoders != 1) | 832 | if (num_encoders != 1) |
834 | WARN(1, "%d encoders on crtc for pipe %c\n", num_encoders, | 833 | WARN(1, "%d encoders on crtc for pipe %c\n", num_encoders, |
835 | pipe_name(intel_crtc->pipe)); | 834 | pipe_name(crtc->pipe)); |
836 | 835 | ||
837 | BUG_ON(ret == NULL); | 836 | BUG_ON(ret == NULL); |
838 | return ret; | 837 | return ret; |
@@ -1194,12 +1193,11 @@ bool intel_ddi_pll_select(struct intel_crtc *intel_crtc, | |||
1194 | intel_encoder); | 1193 | intel_encoder); |
1195 | } | 1194 | } |
1196 | 1195 | ||
1197 | void intel_ddi_set_pipe_settings(struct drm_crtc *crtc) | 1196 | void intel_ddi_set_pipe_settings(struct intel_crtc *crtc) |
1198 | { | 1197 | { |
1199 | struct drm_i915_private *dev_priv = to_i915(crtc->dev); | 1198 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); |
1200 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
1201 | struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc); | 1199 | struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc); |
1202 | enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder; | 1200 | enum transcoder cpu_transcoder = crtc->config->cpu_transcoder; |
1203 | int type = intel_encoder->type; | 1201 | int type = intel_encoder->type; |
1204 | uint32_t temp; | 1202 | uint32_t temp; |
1205 | 1203 | ||
@@ -1207,7 +1205,7 @@ void intel_ddi_set_pipe_settings(struct drm_crtc *crtc) | |||
1207 | WARN_ON(transcoder_is_dsi(cpu_transcoder)); | 1205 | WARN_ON(transcoder_is_dsi(cpu_transcoder)); |
1208 | 1206 | ||
1209 | temp = TRANS_MSA_SYNC_CLK; | 1207 | temp = TRANS_MSA_SYNC_CLK; |
1210 | switch (intel_crtc->config->pipe_bpp) { | 1208 | switch (crtc->config->pipe_bpp) { |
1211 | case 18: | 1209 | case 18: |
1212 | temp |= TRANS_MSA_6_BPC; | 1210 | temp |= TRANS_MSA_6_BPC; |
1213 | break; | 1211 | break; |
@@ -1227,12 +1225,10 @@ void intel_ddi_set_pipe_settings(struct drm_crtc *crtc) | |||
1227 | } | 1225 | } |
1228 | } | 1226 | } |
1229 | 1227 | ||
1230 | void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state) | 1228 | void intel_ddi_set_vc_payload_alloc(struct intel_crtc *crtc, bool state) |
1231 | { | 1229 | { |
1232 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 1230 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); |
1233 | struct drm_device *dev = crtc->dev; | 1231 | enum transcoder cpu_transcoder = crtc->config->cpu_transcoder; |
1234 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
1235 | enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder; | ||
1236 | uint32_t temp; | 1232 | uint32_t temp; |
1237 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); | 1233 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); |
1238 | if (state == true) | 1234 | if (state == true) |
@@ -1242,14 +1238,12 @@ void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state) | |||
1242 | I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp); | 1238 | I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp); |
1243 | } | 1239 | } |
1244 | 1240 | ||
1245 | void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) | 1241 | void intel_ddi_enable_transcoder_func(struct intel_crtc *crtc) |
1246 | { | 1242 | { |
1247 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
1248 | struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc); | 1243 | struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc); |
1249 | struct drm_device *dev = crtc->dev; | 1244 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); |
1250 | struct drm_i915_private *dev_priv = to_i915(dev); | 1245 | enum pipe pipe = crtc->pipe; |
1251 | enum pipe pipe = intel_crtc->pipe; | 1246 | enum transcoder cpu_transcoder = crtc->config->cpu_transcoder; |
1252 | enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder; | ||
1253 | enum port port = intel_ddi_get_encoder_port(intel_encoder); | 1247 | enum port port = intel_ddi_get_encoder_port(intel_encoder); |
1254 | int type = intel_encoder->type; | 1248 | int type = intel_encoder->type; |
1255 | uint32_t temp; | 1249 | uint32_t temp; |
@@ -1258,7 +1252,7 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) | |||
1258 | temp = TRANS_DDI_FUNC_ENABLE; | 1252 | temp = TRANS_DDI_FUNC_ENABLE; |
1259 | temp |= TRANS_DDI_SELECT_PORT(port); | 1253 | temp |= TRANS_DDI_SELECT_PORT(port); |
1260 | 1254 | ||
1261 | switch (intel_crtc->config->pipe_bpp) { | 1255 | switch (crtc->config->pipe_bpp) { |
1262 | case 18: | 1256 | case 18: |
1263 | temp |= TRANS_DDI_BPC_6; | 1257 | temp |= TRANS_DDI_BPC_6; |
1264 | break; | 1258 | break; |
@@ -1275,9 +1269,9 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) | |||
1275 | BUG(); | 1269 | BUG(); |
1276 | } | 1270 | } |
1277 | 1271 | ||
1278 | if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_PVSYNC) | 1272 | if (crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_PVSYNC) |
1279 | temp |= TRANS_DDI_PVSYNC; | 1273 | temp |= TRANS_DDI_PVSYNC; |
1280 | if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_PHSYNC) | 1274 | if (crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_PHSYNC) |
1281 | temp |= TRANS_DDI_PHSYNC; | 1275 | temp |= TRANS_DDI_PHSYNC; |
1282 | 1276 | ||
1283 | if (cpu_transcoder == TRANSCODER_EDP) { | 1277 | if (cpu_transcoder == TRANSCODER_EDP) { |
@@ -1288,8 +1282,8 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) | |||
1288 | * using motion blur mitigation (which we don't | 1282 | * using motion blur mitigation (which we don't |
1289 | * support). */ | 1283 | * support). */ |
1290 | if (IS_HASWELL(dev_priv) && | 1284 | if (IS_HASWELL(dev_priv) && |
1291 | (intel_crtc->config->pch_pfit.enabled || | 1285 | (crtc->config->pch_pfit.enabled || |
1292 | intel_crtc->config->pch_pfit.force_thru)) | 1286 | crtc->config->pch_pfit.force_thru)) |
1293 | temp |= TRANS_DDI_EDP_INPUT_A_ONOFF; | 1287 | temp |= TRANS_DDI_EDP_INPUT_A_ONOFF; |
1294 | else | 1288 | else |
1295 | temp |= TRANS_DDI_EDP_INPUT_A_ON; | 1289 | temp |= TRANS_DDI_EDP_INPUT_A_ON; |
@@ -1307,20 +1301,20 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) | |||
1307 | } | 1301 | } |
1308 | 1302 | ||
1309 | if (type == INTEL_OUTPUT_HDMI) { | 1303 | if (type == INTEL_OUTPUT_HDMI) { |
1310 | if (intel_crtc->config->has_hdmi_sink) | 1304 | if (crtc->config->has_hdmi_sink) |
1311 | temp |= TRANS_DDI_MODE_SELECT_HDMI; | 1305 | temp |= TRANS_DDI_MODE_SELECT_HDMI; |
1312 | else | 1306 | else |
1313 | temp |= TRANS_DDI_MODE_SELECT_DVI; | 1307 | temp |= TRANS_DDI_MODE_SELECT_DVI; |
1314 | } else if (type == INTEL_OUTPUT_ANALOG) { | 1308 | } else if (type == INTEL_OUTPUT_ANALOG) { |
1315 | temp |= TRANS_DDI_MODE_SELECT_FDI; | 1309 | temp |= TRANS_DDI_MODE_SELECT_FDI; |
1316 | temp |= (intel_crtc->config->fdi_lanes - 1) << 1; | 1310 | temp |= (crtc->config->fdi_lanes - 1) << 1; |
1317 | } else if (type == INTEL_OUTPUT_DP || | 1311 | } else if (type == INTEL_OUTPUT_DP || |
1318 | type == INTEL_OUTPUT_EDP) { | 1312 | type == INTEL_OUTPUT_EDP) { |
1319 | temp |= TRANS_DDI_MODE_SELECT_DP_SST; | 1313 | temp |= TRANS_DDI_MODE_SELECT_DP_SST; |
1320 | temp |= DDI_PORT_WIDTH(intel_crtc->config->lane_count); | 1314 | temp |= DDI_PORT_WIDTH(crtc->config->lane_count); |
1321 | } else if (type == INTEL_OUTPUT_DP_MST) { | 1315 | } else if (type == INTEL_OUTPUT_DP_MST) { |
1322 | temp |= TRANS_DDI_MODE_SELECT_DP_MST; | 1316 | temp |= TRANS_DDI_MODE_SELECT_DP_MST; |
1323 | temp |= DDI_PORT_WIDTH(intel_crtc->config->lane_count); | 1317 | temp |= DDI_PORT_WIDTH(crtc->config->lane_count); |
1324 | } else { | 1318 | } else { |
1325 | WARN(1, "Invalid encoder type %d for pipe %c\n", | 1319 | WARN(1, "Invalid encoder type %d for pipe %c\n", |
1326 | intel_encoder->type, pipe_name(pipe)); | 1320 | intel_encoder->type, pipe_name(pipe)); |
@@ -1484,14 +1478,12 @@ static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder) | |||
1484 | return 0; | 1478 | return 0; |
1485 | } | 1479 | } |
1486 | 1480 | ||
1487 | void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc) | 1481 | void intel_ddi_enable_pipe_clock(struct intel_crtc *crtc) |
1488 | { | 1482 | { |
1489 | struct drm_crtc *crtc = &intel_crtc->base; | 1483 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); |
1490 | struct drm_device *dev = crtc->dev; | ||
1491 | struct drm_i915_private *dev_priv = to_i915(dev); | ||
1492 | struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc); | 1484 | struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc); |
1493 | enum port port = intel_ddi_get_encoder_port(intel_encoder); | 1485 | enum port port = intel_ddi_get_encoder_port(intel_encoder); |
1494 | enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder; | 1486 | enum transcoder cpu_transcoder = crtc->config->cpu_transcoder; |
1495 | 1487 | ||
1496 | if (cpu_transcoder != TRANSCODER_EDP) | 1488 | if (cpu_transcoder != TRANSCODER_EDP) |
1497 | I915_WRITE(TRANS_CLK_SEL(cpu_transcoder), | 1489 | I915_WRITE(TRANS_CLK_SEL(cpu_transcoder), |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 649251c01639..ebaf9655cbd6 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -5385,9 +5385,9 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, | |||
5385 | */ | 5385 | */ |
5386 | intel_color_load_luts(&pipe_config->base); | 5386 | intel_color_load_luts(&pipe_config->base); |
5387 | 5387 | ||
5388 | intel_ddi_set_pipe_settings(crtc); | 5388 | intel_ddi_set_pipe_settings(intel_crtc); |
5389 | if (!transcoder_is_dsi(cpu_transcoder)) | 5389 | if (!transcoder_is_dsi(cpu_transcoder)) |
5390 | intel_ddi_enable_transcoder_func(crtc); | 5390 | intel_ddi_enable_transcoder_func(intel_crtc); |
5391 | 5391 | ||
5392 | if (dev_priv->display.initial_watermarks != NULL) | 5392 | if (dev_priv->display.initial_watermarks != NULL) |
5393 | dev_priv->display.initial_watermarks(old_intel_state, pipe_config); | 5393 | dev_priv->display.initial_watermarks(old_intel_state, pipe_config); |
@@ -5400,7 +5400,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, | |||
5400 | lpt_pch_enable(pipe_config); | 5400 | lpt_pch_enable(pipe_config); |
5401 | 5401 | ||
5402 | if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DP_MST)) | 5402 | if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DP_MST)) |
5403 | intel_ddi_set_vc_payload_alloc(crtc, true); | 5403 | intel_ddi_set_vc_payload_alloc(intel_crtc, true); |
5404 | 5404 | ||
5405 | assert_vblank_disabled(crtc); | 5405 | assert_vblank_disabled(crtc); |
5406 | drm_crtc_vblank_on(crtc); | 5406 | drm_crtc_vblank_on(crtc); |
@@ -5522,7 +5522,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, | |||
5522 | intel_disable_pipe(intel_crtc); | 5522 | intel_disable_pipe(intel_crtc); |
5523 | 5523 | ||
5524 | if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DP_MST)) | 5524 | if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DP_MST)) |
5525 | intel_ddi_set_vc_payload_alloc(crtc, false); | 5525 | intel_ddi_set_vc_payload_alloc(intel_crtc, false); |
5526 | 5526 | ||
5527 | if (!transcoder_is_dsi(cpu_transcoder)) | 5527 | if (!transcoder_is_dsi(cpu_transcoder)) |
5528 | intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder); | 5528 | intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder); |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index b3ded830c1b3..4cb1f57ad6ba 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -1230,14 +1230,14 @@ void hsw_fdi_link_train(struct intel_crtc *crtc, | |||
1230 | void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port); | 1230 | void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port); |
1231 | enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder); | 1231 | enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder); |
1232 | bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); | 1232 | bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); |
1233 | void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc); | 1233 | void intel_ddi_enable_transcoder_func(struct intel_crtc *crtc); |
1234 | void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, | 1234 | void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, |
1235 | enum transcoder cpu_transcoder); | 1235 | enum transcoder cpu_transcoder); |
1236 | void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc); | 1236 | void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc); |
1237 | void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc); | 1237 | void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc); |
1238 | bool intel_ddi_pll_select(struct intel_crtc *crtc, | 1238 | bool intel_ddi_pll_select(struct intel_crtc *crtc, |
1239 | struct intel_crtc_state *crtc_state); | 1239 | struct intel_crtc_state *crtc_state); |
1240 | void intel_ddi_set_pipe_settings(struct drm_crtc *crtc); | 1240 | void intel_ddi_set_pipe_settings(struct intel_crtc *crtc); |
1241 | void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp); | 1241 | void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp); |
1242 | bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); | 1242 | bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); |
1243 | bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv, | 1243 | bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv, |
@@ -1250,7 +1250,7 @@ intel_ddi_get_crtc_new_encoder(struct intel_crtc_state *crtc_state); | |||
1250 | void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder); | 1250 | void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder); |
1251 | void intel_ddi_clock_get(struct intel_encoder *encoder, | 1251 | void intel_ddi_clock_get(struct intel_encoder *encoder, |
1252 | struct intel_crtc_state *pipe_config); | 1252 | struct intel_crtc_state *pipe_config); |
1253 | void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state); | 1253 | void intel_ddi_set_vc_payload_alloc(struct intel_crtc *crtc, bool state); |
1254 | uint32_t ddi_signal_levels(struct intel_dp *intel_dp); | 1254 | uint32_t ddi_signal_levels(struct intel_dp *intel_dp); |
1255 | u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder); | 1255 | u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder); |
1256 | 1256 | ||