diff options
author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-11-09 04:40:46 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2017-11-09 06:41:51 -0500 |
commit | e7b8a6d3efa8316dfe786e9cd559c62e9152337c (patch) | |
tree | db48e23875547a04e805680d91e4b2b0d219a3ab | |
parent | 18c1bf35c1c09bca05cf70bc984a4764e0b0372b (diff) |
ASoC: sun8i-codec: Add a comment on the LRCK inversion
The current code might be a bit intriguing without having experienced the
issue before, and might come up as a mistake.
Make explicit what's going on by adding a comment.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/sunxi/sun8i-codec.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/sound/soc/sunxi/sun8i-codec.c b/sound/soc/sunxi/sun8i-codec.c index c2ceca485d6a..b3329692e3dc 100644 --- a/sound/soc/sunxi/sun8i-codec.c +++ b/sound/soc/sunxi/sun8i-codec.c | |||
@@ -197,6 +197,17 @@ static int sun8i_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |||
197 | regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, | 197 | regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, |
198 | BIT(SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV), | 198 | BIT(SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV), |
199 | value << SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV); | 199 | value << SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV); |
200 | |||
201 | /* | ||
202 | * It appears that the DAI and the codec don't share the same | ||
203 | * polarity for the LRCK signal when they mean 'normal' and | ||
204 | * 'inverted' in the datasheet. | ||
205 | * | ||
206 | * Since the DAI here is our regular i2s driver that have been | ||
207 | * tested with way more codecs than just this one, it means | ||
208 | * that the codec probably gets it backward, and we have to | ||
209 | * invert the value here. | ||
210 | */ | ||
200 | regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, | 211 | regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, |
201 | BIT(SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV), | 212 | BIT(SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV), |
202 | !value << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV); | 213 | !value << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV); |