diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-09-29 17:34:06 -0400 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-09-29 17:34:06 -0400 |
commit | e75417739b1de4f6eb99f3f080c67bfd6812d562 (patch) | |
tree | 85ee529dd51c22fe323533df47c39d18e0d8d205 | |
parent | e1ce697db67421cc7e9a1cc1312149f3a4e08c93 (diff) | |
parent | bdec8d7fa55e6f5314ed72e5a0b435d90ff90548 (diff) |
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Thomas writes:
"A single fix for the AMD memory encryption boot code so it does not
read random garbage instead of the cached encryption bit when a kexec
kernel is allocated above the 32bit address limit."
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/boot: Fix kexec booting failure in the SEV bit detection code
-rw-r--r-- | arch/x86/boot/compressed/mem_encrypt.S | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/x86/boot/compressed/mem_encrypt.S b/arch/x86/boot/compressed/mem_encrypt.S index eaa843a52907..a480356e0ed8 100644 --- a/arch/x86/boot/compressed/mem_encrypt.S +++ b/arch/x86/boot/compressed/mem_encrypt.S | |||
@@ -25,20 +25,6 @@ ENTRY(get_sev_encryption_bit) | |||
25 | push %ebx | 25 | push %ebx |
26 | push %ecx | 26 | push %ecx |
27 | push %edx | 27 | push %edx |
28 | push %edi | ||
29 | |||
30 | /* | ||
31 | * RIP-relative addressing is needed to access the encryption bit | ||
32 | * variable. Since we are running in 32-bit mode we need this call/pop | ||
33 | * sequence to get the proper relative addressing. | ||
34 | */ | ||
35 | call 1f | ||
36 | 1: popl %edi | ||
37 | subl $1b, %edi | ||
38 | |||
39 | movl enc_bit(%edi), %eax | ||
40 | cmpl $0, %eax | ||
41 | jge .Lsev_exit | ||
42 | 28 | ||
43 | /* Check if running under a hypervisor */ | 29 | /* Check if running under a hypervisor */ |
44 | movl $1, %eax | 30 | movl $1, %eax |
@@ -69,15 +55,12 @@ ENTRY(get_sev_encryption_bit) | |||
69 | 55 | ||
70 | movl %ebx, %eax | 56 | movl %ebx, %eax |
71 | andl $0x3f, %eax /* Return the encryption bit location */ | 57 | andl $0x3f, %eax /* Return the encryption bit location */ |
72 | movl %eax, enc_bit(%edi) | ||
73 | jmp .Lsev_exit | 58 | jmp .Lsev_exit |
74 | 59 | ||
75 | .Lno_sev: | 60 | .Lno_sev: |
76 | xor %eax, %eax | 61 | xor %eax, %eax |
77 | movl %eax, enc_bit(%edi) | ||
78 | 62 | ||
79 | .Lsev_exit: | 63 | .Lsev_exit: |
80 | pop %edi | ||
81 | pop %edx | 64 | pop %edx |
82 | pop %ecx | 65 | pop %ecx |
83 | pop %ebx | 66 | pop %ebx |
@@ -113,8 +96,6 @@ ENTRY(set_sev_encryption_mask) | |||
113 | ENDPROC(set_sev_encryption_mask) | 96 | ENDPROC(set_sev_encryption_mask) |
114 | 97 | ||
115 | .data | 98 | .data |
116 | enc_bit: | ||
117 | .int 0xffffffff | ||
118 | 99 | ||
119 | #ifdef CONFIG_AMD_MEM_ENCRYPT | 100 | #ifdef CONFIG_AMD_MEM_ENCRYPT |
120 | .balign 8 | 101 | .balign 8 |