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| author | Vladimir Murzin <vladimir.murzin@arm.com> | 2016-09-12 10:49:19 -0400 |
|---|---|---|
| committer | Christoffer Dall <christoffer.dall@linaro.org> | 2016-09-22 07:21:48 -0400 |
| commit | e533a37f7b5ee5eb8b102cf0823e84cd6a7deb57 (patch) | |
| tree | e1805ccc9017ef922f2ebacecf526a1128067615 | |
| parent | 7a1ff708286045a6664fbda716fd3cf8d63afadb (diff) | |
KVM: arm: vgic: Fix compiler warnings when built for 32-bit
Well, this patch is looking ahead of time, but we'll get following
compiler warnings as soon as we introduce vgic-v3 to 32-bit world
CC arch/arm/kvm/../../../virt/kvm/arm/vgic/vgic-mmio-v3.o
arch/arm/kvm/../../../virt/kvm/arm/vgic/vgic-mmio-v3.c: In function 'vgic_mmio_read_v3r_typer':
arch/arm/kvm/../../../virt/kvm/arm/vgic/vgic-mmio-v3.c:184:35: warning: left shift count >= width of type [-Wshift-count-overflow]
value = (mpidr & GENMASK(23, 0)) << 32;
^
In file included from ./include/linux/kernel.h:10:0,
from ./include/asm-generic/bug.h:13,
from ./arch/arm/include/asm/bug.h:59,
from ./include/linux/bug.h:4,
from ./include/linux/io.h:23,
from ./arch/arm/include/asm/arch_gicv3.h:23,
from ./include/linux/irqchip/arm-gic-v3.h:411,
from arch/arm/kvm/../../../virt/kvm/arm/vgic/vgic-mmio-v3.c:14:
arch/arm/kvm/../../../virt/kvm/arm/vgic/vgic-mmio-v3.c: In function 'vgic_v3_dispatch_sgi':
./include/linux/bitops.h:6:24: warning: left shift count >= width of type [-Wshift-count-overflow]
#define BIT(nr) (1UL << (nr))
^
arch/arm/kvm/../../../virt/kvm/arm/vgic/vgic-mmio-v3.c:614:20: note: in expansion of macro 'BIT'
broadcast = reg & BIT(ICC_SGI1R_IRQ_ROUTING_MODE_BIT);
^
Let's fix them now.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
| -rw-r--r-- | virt/kvm/arm/vgic/vgic-mmio-v3.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/virt/kvm/arm/vgic/vgic-mmio-v3.c b/virt/kvm/arm/vgic/vgic-mmio-v3.c index acbe6915d657..6385ed5814b4 100644 --- a/virt/kvm/arm/vgic/vgic-mmio-v3.c +++ b/virt/kvm/arm/vgic/vgic-mmio-v3.c | |||
| @@ -181,7 +181,7 @@ static unsigned long vgic_mmio_read_v3r_typer(struct kvm_vcpu *vcpu, | |||
| 181 | int target_vcpu_id = vcpu->vcpu_id; | 181 | int target_vcpu_id = vcpu->vcpu_id; |
| 182 | u64 value; | 182 | u64 value; |
| 183 | 183 | ||
| 184 | value = (mpidr & GENMASK(23, 0)) << 32; | 184 | value = (u64)(mpidr & GENMASK(23, 0)) << 32; |
| 185 | value |= ((target_vcpu_id & 0xffff) << 8); | 185 | value |= ((target_vcpu_id & 0xffff) << 8); |
| 186 | if (target_vcpu_id == atomic_read(&vcpu->kvm->online_vcpus) - 1) | 186 | if (target_vcpu_id == atomic_read(&vcpu->kvm->online_vcpus) - 1) |
| 187 | value |= GICR_TYPER_LAST; | 187 | value |= GICR_TYPER_LAST; |
| @@ -611,7 +611,7 @@ void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg) | |||
| 611 | bool broadcast; | 611 | bool broadcast; |
| 612 | 612 | ||
| 613 | sgi = (reg & ICC_SGI1R_SGI_ID_MASK) >> ICC_SGI1R_SGI_ID_SHIFT; | 613 | sgi = (reg & ICC_SGI1R_SGI_ID_MASK) >> ICC_SGI1R_SGI_ID_SHIFT; |
| 614 | broadcast = reg & BIT(ICC_SGI1R_IRQ_ROUTING_MODE_BIT); | 614 | broadcast = reg & BIT_ULL(ICC_SGI1R_IRQ_ROUTING_MODE_BIT); |
| 615 | target_cpus = (reg & ICC_SGI1R_TARGET_LIST_MASK) >> ICC_SGI1R_TARGET_LIST_SHIFT; | 615 | target_cpus = (reg & ICC_SGI1R_TARGET_LIST_MASK) >> ICC_SGI1R_TARGET_LIST_SHIFT; |
| 616 | mpidr = SGI_AFFINITY_LEVEL(reg, 3); | 616 | mpidr = SGI_AFFINITY_LEVEL(reg, 3); |
| 617 | mpidr |= SGI_AFFINITY_LEVEL(reg, 2); | 617 | mpidr |= SGI_AFFINITY_LEVEL(reg, 2); |