diff options
author | Mark Brown <broonie@linaro.org> | 2013-10-24 06:23:58 -0400 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2013-10-24 06:23:58 -0400 |
commit | e447360474444466bd405f86e0d3e8e6432c35b6 (patch) | |
tree | 7f382e50877e7d37b3387455197d7cbdb0bae6b6 | |
parent | 9c5ff908aa921c2fd9b9fbf6bde191b135071751 (diff) | |
parent | 2560b3d1bdf1344aa65bba1523a08e4db27a3c14 (diff) |
Merge remote-tracking branch 'asoc/topic/adav80x' into asoc-next
-rw-r--r-- | sound/soc/codecs/adav80x.c | 147 |
1 files changed, 102 insertions, 45 deletions
diff --git a/sound/soc/codecs/adav80x.c b/sound/soc/codecs/adav80x.c index 15b012d0f226..14a7c169d004 100644 --- a/sound/soc/codecs/adav80x.c +++ b/sound/soc/codecs/adav80x.c | |||
@@ -115,22 +115,34 @@ | |||
115 | 115 | ||
116 | #define ADAV80X_PLL_OUTE_SYSCLKPD(x) BIT(2 - (x)) | 116 | #define ADAV80X_PLL_OUTE_SYSCLKPD(x) BIT(2 - (x)) |
117 | 117 | ||
118 | static u8 adav80x_default_regs[] = { | 118 | static struct reg_default adav80x_reg_defaults[] = { |
119 | 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0x01, 0x80, 0x26, 0x00, 0x00, | 119 | { ADAV80X_PLAYBACK_CTRL, 0x01 }, |
120 | 0x02, 0x40, 0x20, 0x00, 0x09, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 120 | { ADAV80X_AUX_IN_CTRL, 0x01 }, |
121 | 0x04, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd1, 0x92, 0xb1, 0x37, | 121 | { ADAV80X_REC_CTRL, 0x02 }, |
122 | 0x48, 0xd2, 0xfb, 0xca, 0xd2, 0x15, 0xe8, 0x29, 0xb9, 0x6a, 0xda, 0x2b, | 122 | { ADAV80X_AUX_OUT_CTRL, 0x01 }, |
123 | 0xb7, 0xc0, 0x11, 0x65, 0x5c, 0xf6, 0xff, 0x8d, 0x00, 0x00, 0x00, 0x00, | 123 | { ADAV80X_DPATH_CTRL1, 0xc0 }, |
124 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 124 | { ADAV80X_DPATH_CTRL2, 0x11 }, |
125 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa5, 0x00, 0x00, | 125 | { ADAV80X_DAC_CTRL1, 0x00 }, |
126 | 0x00, 0xe8, 0x46, 0xe1, 0x5b, 0xd3, 0x43, 0x77, 0x93, 0xa7, 0x44, 0xee, | 126 | { ADAV80X_DAC_CTRL2, 0x00 }, |
127 | 0x32, 0x12, 0xc0, 0x11, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x3f, 0x3f, | 127 | { ADAV80X_DAC_CTRL3, 0x00 }, |
128 | 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x1d, 0x00, 0x00, 0x00, 0x00, | 128 | { ADAV80X_DAC_L_VOL, 0xff }, |
129 | 0x00, 0x00, 0x00, 0x00, 0x52, 0x00, | 129 | { ADAV80X_DAC_R_VOL, 0xff }, |
130 | { ADAV80X_PGA_L_VOL, 0x00 }, | ||
131 | { ADAV80X_PGA_R_VOL, 0x00 }, | ||
132 | { ADAV80X_ADC_CTRL1, 0x00 }, | ||
133 | { ADAV80X_ADC_CTRL2, 0x00 }, | ||
134 | { ADAV80X_ADC_L_VOL, 0xff }, | ||
135 | { ADAV80X_ADC_R_VOL, 0xff }, | ||
136 | { ADAV80X_PLL_CTRL1, 0x00 }, | ||
137 | { ADAV80X_PLL_CTRL2, 0x00 }, | ||
138 | { ADAV80X_ICLK_CTRL1, 0x00 }, | ||
139 | { ADAV80X_ICLK_CTRL2, 0x00 }, | ||
140 | { ADAV80X_PLL_CLK_SRC, 0x00 }, | ||
141 | { ADAV80X_PLL_OUTE, 0x00 }, | ||
130 | }; | 142 | }; |
131 | 143 | ||
132 | struct adav80x { | 144 | struct adav80x { |
133 | enum snd_soc_control_type control_type; | 145 | struct regmap *regmap; |
134 | 146 | ||
135 | enum adav80x_clk_src clk_src; | 147 | enum adav80x_clk_src clk_src; |
136 | unsigned int sysclk; | 148 | unsigned int sysclk; |
@@ -298,7 +310,7 @@ static int adav80x_set_deemph(struct snd_soc_codec *codec) | |||
298 | val = ADAV80X_DAC_CTRL2_DEEMPH_NONE; | 310 | val = ADAV80X_DAC_CTRL2_DEEMPH_NONE; |
299 | } | 311 | } |
300 | 312 | ||
301 | return snd_soc_update_bits(codec, ADAV80X_DAC_CTRL2, | 313 | return regmap_update_bits(adav80x->regmap, ADAV80X_DAC_CTRL2, |
302 | ADAV80X_DAC_CTRL2_DEEMPH_MASK, val); | 314 | ADAV80X_DAC_CTRL2_DEEMPH_MASK, val); |
303 | } | 315 | } |
304 | 316 | ||
@@ -394,10 +406,11 @@ static int adav80x_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |||
394 | return -EINVAL; | 406 | return -EINVAL; |
395 | } | 407 | } |
396 | 408 | ||
397 | snd_soc_update_bits(codec, adav80x_port_ctrl_regs[dai->id][0], | 409 | regmap_update_bits(adav80x->regmap, adav80x_port_ctrl_regs[dai->id][0], |
398 | ADAV80X_CAPTURE_MODE_MASK | ADAV80X_CAPTURE_MODE_MASTER, | 410 | ADAV80X_CAPTURE_MODE_MASK | ADAV80X_CAPTURE_MODE_MASTER, |
399 | capture); | 411 | capture); |
400 | snd_soc_write(codec, adav80x_port_ctrl_regs[dai->id][1], playback); | 412 | regmap_write(adav80x->regmap, adav80x_port_ctrl_regs[dai->id][1], |
413 | playback); | ||
401 | 414 | ||
402 | adav80x->dai_fmt[dai->id] = fmt & SND_SOC_DAIFMT_FORMAT_MASK; | 415 | adav80x->dai_fmt[dai->id] = fmt & SND_SOC_DAIFMT_FORMAT_MASK; |
403 | 416 | ||
@@ -407,6 +420,7 @@ static int adav80x_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |||
407 | static int adav80x_set_adc_clock(struct snd_soc_codec *codec, | 420 | static int adav80x_set_adc_clock(struct snd_soc_codec *codec, |
408 | unsigned int sample_rate) | 421 | unsigned int sample_rate) |
409 | { | 422 | { |
423 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | ||
410 | unsigned int val; | 424 | unsigned int val; |
411 | 425 | ||
412 | if (sample_rate <= 48000) | 426 | if (sample_rate <= 48000) |
@@ -414,7 +428,7 @@ static int adav80x_set_adc_clock(struct snd_soc_codec *codec, | |||
414 | else | 428 | else |
415 | val = ADAV80X_ADC_CTRL1_MODULATOR_64FS; | 429 | val = ADAV80X_ADC_CTRL1_MODULATOR_64FS; |
416 | 430 | ||
417 | snd_soc_update_bits(codec, ADAV80X_ADC_CTRL1, | 431 | regmap_update_bits(adav80x->regmap, ADAV80X_ADC_CTRL1, |
418 | ADAV80X_ADC_CTRL1_MODULATOR_MASK, val); | 432 | ADAV80X_ADC_CTRL1_MODULATOR_MASK, val); |
419 | 433 | ||
420 | return 0; | 434 | return 0; |
@@ -423,6 +437,7 @@ static int adav80x_set_adc_clock(struct snd_soc_codec *codec, | |||
423 | static int adav80x_set_dac_clock(struct snd_soc_codec *codec, | 437 | static int adav80x_set_dac_clock(struct snd_soc_codec *codec, |
424 | unsigned int sample_rate) | 438 | unsigned int sample_rate) |
425 | { | 439 | { |
440 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | ||
426 | unsigned int val; | 441 | unsigned int val; |
427 | 442 | ||
428 | if (sample_rate <= 48000) | 443 | if (sample_rate <= 48000) |
@@ -430,7 +445,7 @@ static int adav80x_set_dac_clock(struct snd_soc_codec *codec, | |||
430 | else | 445 | else |
431 | val = ADAV80X_DAC_CTRL2_DIV2 | ADAV80X_DAC_CTRL2_INTERPOL_128FS; | 446 | val = ADAV80X_DAC_CTRL2_DIV2 | ADAV80X_DAC_CTRL2_INTERPOL_128FS; |
432 | 447 | ||
433 | snd_soc_update_bits(codec, ADAV80X_DAC_CTRL2, | 448 | regmap_update_bits(adav80x->regmap, ADAV80X_DAC_CTRL2, |
434 | ADAV80X_DAC_CTRL2_DIV_MASK | ADAV80X_DAC_CTRL2_INTERPOL_MASK, | 449 | ADAV80X_DAC_CTRL2_DIV_MASK | ADAV80X_DAC_CTRL2_INTERPOL_MASK, |
435 | val); | 450 | val); |
436 | 451 | ||
@@ -440,6 +455,7 @@ static int adav80x_set_dac_clock(struct snd_soc_codec *codec, | |||
440 | static int adav80x_set_capture_pcm_format(struct snd_soc_codec *codec, | 455 | static int adav80x_set_capture_pcm_format(struct snd_soc_codec *codec, |
441 | struct snd_soc_dai *dai, snd_pcm_format_t format) | 456 | struct snd_soc_dai *dai, snd_pcm_format_t format) |
442 | { | 457 | { |
458 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | ||
443 | unsigned int val; | 459 | unsigned int val; |
444 | 460 | ||
445 | switch (format) { | 461 | switch (format) { |
@@ -459,7 +475,7 @@ static int adav80x_set_capture_pcm_format(struct snd_soc_codec *codec, | |||
459 | return -EINVAL; | 475 | return -EINVAL; |
460 | } | 476 | } |
461 | 477 | ||
462 | snd_soc_update_bits(codec, adav80x_port_ctrl_regs[dai->id][0], | 478 | regmap_update_bits(adav80x->regmap, adav80x_port_ctrl_regs[dai->id][0], |
463 | ADAV80X_CAPTURE_WORD_LEN_MASK, val); | 479 | ADAV80X_CAPTURE_WORD_LEN_MASK, val); |
464 | 480 | ||
465 | return 0; | 481 | return 0; |
@@ -491,7 +507,7 @@ static int adav80x_set_playback_pcm_format(struct snd_soc_codec *codec, | |||
491 | return -EINVAL; | 507 | return -EINVAL; |
492 | } | 508 | } |
493 | 509 | ||
494 | snd_soc_update_bits(codec, adav80x_port_ctrl_regs[dai->id][1], | 510 | regmap_update_bits(adav80x->regmap, adav80x_port_ctrl_regs[dai->id][1], |
495 | ADAV80X_PLAYBACK_MODE_MASK, val); | 511 | ADAV80X_PLAYBACK_MODE_MASK, val); |
496 | 512 | ||
497 | return 0; | 513 | return 0; |
@@ -554,8 +570,10 @@ static int adav80x_set_sysclk(struct snd_soc_codec *codec, | |||
554 | ADAV80X_ICLK_CTRL1_ICLK2_SRC(clk_id); | 570 | ADAV80X_ICLK_CTRL1_ICLK2_SRC(clk_id); |
555 | iclk_ctrl2 = ADAV80X_ICLK_CTRL2_ICLK1_SRC(clk_id); | 571 | iclk_ctrl2 = ADAV80X_ICLK_CTRL2_ICLK1_SRC(clk_id); |
556 | 572 | ||
557 | snd_soc_write(codec, ADAV80X_ICLK_CTRL1, iclk_ctrl1); | 573 | regmap_write(adav80x->regmap, ADAV80X_ICLK_CTRL1, |
558 | snd_soc_write(codec, ADAV80X_ICLK_CTRL2, iclk_ctrl2); | 574 | iclk_ctrl1); |
575 | regmap_write(adav80x->regmap, ADAV80X_ICLK_CTRL2, | ||
576 | iclk_ctrl2); | ||
559 | 577 | ||
560 | snd_soc_dapm_sync(&codec->dapm); | 578 | snd_soc_dapm_sync(&codec->dapm); |
561 | } | 579 | } |
@@ -575,10 +593,12 @@ static int adav80x_set_sysclk(struct snd_soc_codec *codec, | |||
575 | mask = ADAV80X_PLL_OUTE_SYSCLKPD(clk_id); | 593 | mask = ADAV80X_PLL_OUTE_SYSCLKPD(clk_id); |
576 | 594 | ||
577 | if (freq == 0) { | 595 | if (freq == 0) { |
578 | snd_soc_update_bits(codec, ADAV80X_PLL_OUTE, mask, mask); | 596 | regmap_update_bits(adav80x->regmap, ADAV80X_PLL_OUTE, |
597 | mask, mask); | ||
579 | adav80x->sysclk_pd[clk_id] = true; | 598 | adav80x->sysclk_pd[clk_id] = true; |
580 | } else { | 599 | } else { |
581 | snd_soc_update_bits(codec, ADAV80X_PLL_OUTE, mask, 0); | 600 | regmap_update_bits(adav80x->regmap, ADAV80X_PLL_OUTE, |
601 | mask, 0); | ||
582 | adav80x->sysclk_pd[clk_id] = false; | 602 | adav80x->sysclk_pd[clk_id] = false; |
583 | } | 603 | } |
584 | 604 | ||
@@ -650,9 +670,9 @@ static int adav80x_set_pll(struct snd_soc_codec *codec, int pll_id, | |||
650 | return -EINVAL; | 670 | return -EINVAL; |
651 | } | 671 | } |
652 | 672 | ||
653 | snd_soc_update_bits(codec, ADAV80X_PLL_CTRL1, ADAV80X_PLL_CTRL1_PLLDIV, | 673 | regmap_update_bits(adav80x->regmap, ADAV80X_PLL_CTRL1, |
654 | pll_ctrl1); | 674 | ADAV80X_PLL_CTRL1_PLLDIV, pll_ctrl1); |
655 | snd_soc_update_bits(codec, ADAV80X_PLL_CTRL2, | 675 | regmap_update_bits(adav80x->regmap, ADAV80X_PLL_CTRL2, |
656 | ADAV80X_PLL_CTRL2_PLL_MASK(pll_id), pll_ctrl2); | 676 | ADAV80X_PLL_CTRL2_PLL_MASK(pll_id), pll_ctrl2); |
657 | 677 | ||
658 | if (source != adav80x->pll_src) { | 678 | if (source != adav80x->pll_src) { |
@@ -661,7 +681,7 @@ static int adav80x_set_pll(struct snd_soc_codec *codec, int pll_id, | |||
661 | else | 681 | else |
662 | pll_src = ADAV80X_PLL_CLK_SRC_PLL_XIN(pll_id); | 682 | pll_src = ADAV80X_PLL_CLK_SRC_PLL_XIN(pll_id); |
663 | 683 | ||
664 | snd_soc_update_bits(codec, ADAV80X_PLL_CLK_SRC, | 684 | regmap_update_bits(adav80x->regmap, ADAV80X_PLL_CLK_SRC, |
665 | ADAV80X_PLL_CLK_SRC_PLL_MASK(pll_id), pll_src); | 685 | ADAV80X_PLL_CLK_SRC_PLL_MASK(pll_id), pll_src); |
666 | 686 | ||
667 | adav80x->pll_src = source; | 687 | adav80x->pll_src = source; |
@@ -675,6 +695,7 @@ static int adav80x_set_pll(struct snd_soc_codec *codec, int pll_id, | |||
675 | static int adav80x_set_bias_level(struct snd_soc_codec *codec, | 695 | static int adav80x_set_bias_level(struct snd_soc_codec *codec, |
676 | enum snd_soc_bias_level level) | 696 | enum snd_soc_bias_level level) |
677 | { | 697 | { |
698 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | ||
678 | unsigned int mask = ADAV80X_DAC_CTRL1_PD; | 699 | unsigned int mask = ADAV80X_DAC_CTRL1_PD; |
679 | 700 | ||
680 | switch (level) { | 701 | switch (level) { |
@@ -683,10 +704,12 @@ static int adav80x_set_bias_level(struct snd_soc_codec *codec, | |||
683 | case SND_SOC_BIAS_PREPARE: | 704 | case SND_SOC_BIAS_PREPARE: |
684 | break; | 705 | break; |
685 | case SND_SOC_BIAS_STANDBY: | 706 | case SND_SOC_BIAS_STANDBY: |
686 | snd_soc_update_bits(codec, ADAV80X_DAC_CTRL1, mask, 0x00); | 707 | regmap_update_bits(adav80x->regmap, ADAV80X_DAC_CTRL1, mask, |
708 | 0x00); | ||
687 | break; | 709 | break; |
688 | case SND_SOC_BIAS_OFF: | 710 | case SND_SOC_BIAS_OFF: |
689 | snd_soc_update_bits(codec, ADAV80X_DAC_CTRL1, mask, mask); | 711 | regmap_update_bits(adav80x->regmap, ADAV80X_DAC_CTRL1, mask, |
712 | mask); | ||
690 | break; | 713 | break; |
691 | } | 714 | } |
692 | 715 | ||
@@ -780,7 +803,7 @@ static int adav80x_probe(struct snd_soc_codec *codec) | |||
780 | int ret; | 803 | int ret; |
781 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | 804 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); |
782 | 805 | ||
783 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, adav80x->control_type); | 806 | ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP); |
784 | if (ret) { | 807 | if (ret) { |
785 | dev_err(codec->dev, "failed to set cache I/O: %d\n", ret); | 808 | dev_err(codec->dev, "failed to set cache I/O: %d\n", ret); |
786 | return ret; | 809 | return ret; |
@@ -791,23 +814,31 @@ static int adav80x_probe(struct snd_soc_codec *codec) | |||
791 | snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL2"); | 814 | snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL2"); |
792 | 815 | ||
793 | /* Power down S/PDIF receiver, since it is currently not supported */ | 816 | /* Power down S/PDIF receiver, since it is currently not supported */ |
794 | snd_soc_write(codec, ADAV80X_PLL_OUTE, 0x20); | 817 | regmap_write(adav80x->regmap, ADAV80X_PLL_OUTE, 0x20); |
795 | /* Disable DAC zero flag */ | 818 | /* Disable DAC zero flag */ |
796 | snd_soc_write(codec, ADAV80X_DAC_CTRL3, 0x6); | 819 | regmap_write(adav80x->regmap, ADAV80X_DAC_CTRL3, 0x6); |
797 | 820 | ||
798 | return adav80x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | 821 | return adav80x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
799 | } | 822 | } |
800 | 823 | ||
801 | static int adav80x_suspend(struct snd_soc_codec *codec) | 824 | static int adav80x_suspend(struct snd_soc_codec *codec) |
802 | { | 825 | { |
803 | return adav80x_set_bias_level(codec, SND_SOC_BIAS_OFF); | 826 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); |
827 | int ret; | ||
828 | |||
829 | ret = adav80x_set_bias_level(codec, SND_SOC_BIAS_OFF); | ||
830 | regcache_cache_only(adav80x->regmap, true); | ||
831 | |||
832 | return ret; | ||
804 | } | 833 | } |
805 | 834 | ||
806 | static int adav80x_resume(struct snd_soc_codec *codec) | 835 | static int adav80x_resume(struct snd_soc_codec *codec) |
807 | { | 836 | { |
837 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | ||
838 | |||
839 | regcache_cache_only(adav80x->regmap, false); | ||
808 | adav80x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | 840 | adav80x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
809 | codec->cache_sync = 1; | 841 | regcache_sync(adav80x->regmap); |
810 | snd_soc_cache_sync(codec); | ||
811 | 842 | ||
812 | return 0; | 843 | return 0; |
813 | } | 844 | } |
@@ -827,10 +858,6 @@ static struct snd_soc_codec_driver adav80x_codec_driver = { | |||
827 | .set_pll = adav80x_set_pll, | 858 | .set_pll = adav80x_set_pll, |
828 | .set_sysclk = adav80x_set_sysclk, | 859 | .set_sysclk = adav80x_set_sysclk, |
829 | 860 | ||
830 | .reg_word_size = sizeof(u8), | ||
831 | .reg_cache_size = ARRAY_SIZE(adav80x_default_regs), | ||
832 | .reg_cache_default = adav80x_default_regs, | ||
833 | |||
834 | .controls = adav80x_controls, | 861 | .controls = adav80x_controls, |
835 | .num_controls = ARRAY_SIZE(adav80x_controls), | 862 | .num_controls = ARRAY_SIZE(adav80x_controls), |
836 | .dapm_widgets = adav80x_dapm_widgets, | 863 | .dapm_widgets = adav80x_dapm_widgets, |
@@ -839,18 +866,21 @@ static struct snd_soc_codec_driver adav80x_codec_driver = { | |||
839 | .num_dapm_routes = ARRAY_SIZE(adav80x_dapm_routes), | 866 | .num_dapm_routes = ARRAY_SIZE(adav80x_dapm_routes), |
840 | }; | 867 | }; |
841 | 868 | ||
842 | static int adav80x_bus_probe(struct device *dev, | 869 | static int adav80x_bus_probe(struct device *dev, struct regmap *regmap) |
843 | enum snd_soc_control_type control_type) | ||
844 | { | 870 | { |
845 | struct adav80x *adav80x; | 871 | struct adav80x *adav80x; |
846 | int ret; | 872 | int ret; |
847 | 873 | ||
874 | if (IS_ERR(regmap)) | ||
875 | return PTR_ERR(regmap); | ||
876 | |||
848 | adav80x = kzalloc(sizeof(*adav80x), GFP_KERNEL); | 877 | adav80x = kzalloc(sizeof(*adav80x), GFP_KERNEL); |
849 | if (!adav80x) | 878 | if (!adav80x) |
850 | return -ENOMEM; | 879 | return -ENOMEM; |
851 | 880 | ||
881 | |||
852 | dev_set_drvdata(dev, adav80x); | 882 | dev_set_drvdata(dev, adav80x); |
853 | adav80x->control_type = control_type; | 883 | adav80x->regmap = regmap; |
854 | 884 | ||
855 | ret = snd_soc_register_codec(dev, &adav80x_codec_driver, | 885 | ret = snd_soc_register_codec(dev, &adav80x_codec_driver, |
856 | adav80x_dais, ARRAY_SIZE(adav80x_dais)); | 886 | adav80x_dais, ARRAY_SIZE(adav80x_dais)); |
@@ -868,6 +898,19 @@ static int adav80x_bus_remove(struct device *dev) | |||
868 | } | 898 | } |
869 | 899 | ||
870 | #if defined(CONFIG_SPI_MASTER) | 900 | #if defined(CONFIG_SPI_MASTER) |
901 | static const struct regmap_config adav80x_spi_regmap_config = { | ||
902 | .val_bits = 8, | ||
903 | .pad_bits = 1, | ||
904 | .reg_bits = 7, | ||
905 | .read_flag_mask = 0x01, | ||
906 | |||
907 | .max_register = ADAV80X_PLL_OUTE, | ||
908 | |||
909 | .cache_type = REGCACHE_RBTREE, | ||
910 | .reg_defaults = adav80x_reg_defaults, | ||
911 | .num_reg_defaults = ARRAY_SIZE(adav80x_reg_defaults), | ||
912 | }; | ||
913 | |||
871 | static const struct spi_device_id adav80x_spi_id[] = { | 914 | static const struct spi_device_id adav80x_spi_id[] = { |
872 | { "adav801", 0 }, | 915 | { "adav801", 0 }, |
873 | { } | 916 | { } |
@@ -876,7 +919,8 @@ MODULE_DEVICE_TABLE(spi, adav80x_spi_id); | |||
876 | 919 | ||
877 | static int adav80x_spi_probe(struct spi_device *spi) | 920 | static int adav80x_spi_probe(struct spi_device *spi) |
878 | { | 921 | { |
879 | return adav80x_bus_probe(&spi->dev, SND_SOC_SPI); | 922 | return adav80x_bus_probe(&spi->dev, |
923 | devm_regmap_init_spi(spi, &adav80x_spi_regmap_config)); | ||
880 | } | 924 | } |
881 | 925 | ||
882 | static int adav80x_spi_remove(struct spi_device *spi) | 926 | static int adav80x_spi_remove(struct spi_device *spi) |
@@ -896,6 +940,18 @@ static struct spi_driver adav80x_spi_driver = { | |||
896 | #endif | 940 | #endif |
897 | 941 | ||
898 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 942 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
943 | static const struct regmap_config adav80x_i2c_regmap_config = { | ||
944 | .val_bits = 8, | ||
945 | .pad_bits = 1, | ||
946 | .reg_bits = 7, | ||
947 | |||
948 | .max_register = ADAV80X_PLL_OUTE, | ||
949 | |||
950 | .cache_type = REGCACHE_RBTREE, | ||
951 | .reg_defaults = adav80x_reg_defaults, | ||
952 | .num_reg_defaults = ARRAY_SIZE(adav80x_reg_defaults), | ||
953 | }; | ||
954 | |||
899 | static const struct i2c_device_id adav80x_i2c_id[] = { | 955 | static const struct i2c_device_id adav80x_i2c_id[] = { |
900 | { "adav803", 0 }, | 956 | { "adav803", 0 }, |
901 | { } | 957 | { } |
@@ -905,7 +961,8 @@ MODULE_DEVICE_TABLE(i2c, adav80x_i2c_id); | |||
905 | static int adav80x_i2c_probe(struct i2c_client *client, | 961 | static int adav80x_i2c_probe(struct i2c_client *client, |
906 | const struct i2c_device_id *id) | 962 | const struct i2c_device_id *id) |
907 | { | 963 | { |
908 | return adav80x_bus_probe(&client->dev, SND_SOC_I2C); | 964 | return adav80x_bus_probe(&client->dev, |
965 | devm_regmap_init_i2c(client, &adav80x_i2c_regmap_config)); | ||
909 | } | 966 | } |
910 | 967 | ||
911 | static int adav80x_i2c_remove(struct i2c_client *client) | 968 | static int adav80x_i2c_remove(struct i2c_client *client) |