diff options
| author | Borislav Petkov <bp@suse.de> | 2017-02-03 12:18:05 -0500 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2017-04-10 11:14:41 -0400 |
| commit | e3c4ff6d8c949fa9a9ea1bd005bf1967efe09d5d (patch) | |
| tree | 3f9238faa0bb6da4bfc0787b52e9ecadf14b361a | |
| parent | be1d162948f5bb0ced260e60208e7dc06cd45cab (diff) | |
EDAC: Remove EDAC_MM_EDAC
Move all the EDAC core functionality behind CONFIG_EDAC and get rid of
that indirection. Update defconfigs which had it.
While at it, fix dependencies such that EDAC depends on RAS for the
tracepoints.
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Chris Metcalf <cmetcalf@mellanox.com>
Cc: linux-edac@vger.kernel.org
| -rw-r--r-- | arch/arm/configs/multi_v7_defconfig | 1 | ||||
| -rw-r--r-- | arch/arm/configs/pxa_defconfig | 3 | ||||
| -rw-r--r-- | arch/powerpc/configs/85xx-hw.config | 3 | ||||
| -rw-r--r-- | arch/powerpc/configs/85xx/ge_imp3a_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/85xx/xes_mpc85xx_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/cell_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/pasemi_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/ppc64_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/ppc64e_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/ppc6xx_defconfig | 3 | ||||
| -rw-r--r-- | arch/tile/configs/tilegx_defconfig | 1 | ||||
| -rw-r--r-- | arch/tile/configs/tilepro_defconfig | 1 | ||||
| -rw-r--r-- | drivers/acpi/Kconfig | 1 | ||||
| -rw-r--r-- | drivers/edac/Kconfig | 101 | ||||
| -rw-r--r-- | drivers/edac/Makefile | 3 | ||||
| -rw-r--r-- | drivers/edac/edac_stub.c | 2 |
16 files changed, 48 insertions, 77 deletions
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index a94126fb02c2..6aa7be191f1a 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig | |||
| @@ -748,7 +748,6 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | |||
| 748 | CONFIG_LEDS_TRIGGER_TRANSIENT=y | 748 | CONFIG_LEDS_TRIGGER_TRANSIENT=y |
| 749 | CONFIG_LEDS_TRIGGER_CAMERA=y | 749 | CONFIG_LEDS_TRIGGER_CAMERA=y |
| 750 | CONFIG_EDAC=y | 750 | CONFIG_EDAC=y |
| 751 | CONFIG_EDAC_MM_EDAC=y | ||
| 752 | CONFIG_EDAC_HIGHBANK_MC=y | 751 | CONFIG_EDAC_HIGHBANK_MC=y |
| 753 | CONFIG_EDAC_HIGHBANK_L2=y | 752 | CONFIG_EDAC_HIGHBANK_L2=y |
| 754 | CONFIG_RTC_CLASS=y | 753 | CONFIG_RTC_CLASS=y |
diff --git a/arch/arm/configs/pxa_defconfig b/arch/arm/configs/pxa_defconfig index 2aac99fd1c41..1318f61589dc 100644 --- a/arch/arm/configs/pxa_defconfig +++ b/arch/arm/configs/pxa_defconfig | |||
| @@ -635,8 +635,7 @@ CONFIG_LEDS_TRIGGER_GPIO=m | |||
| 635 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=m | 635 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=m |
| 636 | CONFIG_LEDS_TRIGGER_TRANSIENT=m | 636 | CONFIG_LEDS_TRIGGER_TRANSIENT=m |
| 637 | CONFIG_LEDS_TRIGGER_CAMERA=m | 637 | CONFIG_LEDS_TRIGGER_CAMERA=m |
| 638 | CONFIG_EDAC=y | 638 | CONFIG_EDAC=m |
| 639 | CONFIG_EDAC_MM_EDAC=m | ||
| 640 | CONFIG_RTC_CLASS=y | 639 | CONFIG_RTC_CLASS=y |
| 641 | CONFIG_RTC_DEBUG=y | 640 | CONFIG_RTC_DEBUG=y |
| 642 | CONFIG_RTC_DRV_DS1307=m | 641 | CONFIG_RTC_DRV_DS1307=m |
diff --git a/arch/powerpc/configs/85xx-hw.config b/arch/powerpc/configs/85xx-hw.config index 528ff0e714e6..c03d0fb16665 100644 --- a/arch/powerpc/configs/85xx-hw.config +++ b/arch/powerpc/configs/85xx-hw.config | |||
| @@ -16,9 +16,8 @@ CONFIG_DAVICOM_PHY=y | |||
| 16 | CONFIG_DMADEVICES=y | 16 | CONFIG_DMADEVICES=y |
| 17 | CONFIG_E1000E=y | 17 | CONFIG_E1000E=y |
| 18 | CONFIG_E1000=y | 18 | CONFIG_E1000=y |
| 19 | CONFIG_EDAC_MM_EDAC=y | ||
| 20 | CONFIG_EDAC_MPC85XX=y | ||
| 21 | CONFIG_EDAC=y | 19 | CONFIG_EDAC=y |
| 20 | CONFIG_EDAC_MPC85XX=y | ||
| 22 | CONFIG_EEPROM_AT24=y | 21 | CONFIG_EEPROM_AT24=y |
| 23 | CONFIG_EEPROM_LEGACY=y | 22 | CONFIG_EEPROM_LEGACY=y |
| 24 | CONFIG_FB_FSL_DIU=y | 23 | CONFIG_FB_FSL_DIU=y |
diff --git a/arch/powerpc/configs/85xx/ge_imp3a_defconfig b/arch/powerpc/configs/85xx/ge_imp3a_defconfig index c79283be5680..a917f7afb4f9 100644 --- a/arch/powerpc/configs/85xx/ge_imp3a_defconfig +++ b/arch/powerpc/configs/85xx/ge_imp3a_defconfig | |||
| @@ -155,7 +155,6 @@ CONFIG_USB_OHCI_HCD_PPC_OF_BE=y | |||
| 155 | CONFIG_USB_OHCI_HCD_PPC_OF_LE=y | 155 | CONFIG_USB_OHCI_HCD_PPC_OF_LE=y |
| 156 | CONFIG_USB_STORAGE=y | 156 | CONFIG_USB_STORAGE=y |
| 157 | CONFIG_EDAC=y | 157 | CONFIG_EDAC=y |
| 158 | CONFIG_EDAC_MM_EDAC=y | ||
| 159 | CONFIG_EDAC_MPC85XX=y | 158 | CONFIG_EDAC_MPC85XX=y |
| 160 | CONFIG_RTC_CLASS=y | 159 | CONFIG_RTC_CLASS=y |
| 161 | # CONFIG_RTC_INTF_PROC is not set | 160 | # CONFIG_RTC_INTF_PROC is not set |
diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig index dbd961de251e..72900b84d3e0 100644 --- a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig +++ b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig | |||
| @@ -116,7 +116,6 @@ CONFIG_LEDS_TRIGGERS=y | |||
| 116 | CONFIG_LEDS_TRIGGER_TIMER=y | 116 | CONFIG_LEDS_TRIGGER_TIMER=y |
| 117 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | 117 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y |
| 118 | CONFIG_EDAC=y | 118 | CONFIG_EDAC=y |
| 119 | CONFIG_EDAC_MM_EDAC=y | ||
| 120 | CONFIG_RTC_CLASS=y | 119 | CONFIG_RTC_CLASS=y |
| 121 | CONFIG_RTC_DRV_DS1307=y | 120 | CONFIG_RTC_DRV_DS1307=y |
| 122 | CONFIG_RTC_DRV_CMOS=y | 121 | CONFIG_RTC_DRV_CMOS=y |
diff --git a/arch/powerpc/configs/cell_defconfig b/arch/powerpc/configs/cell_defconfig index 2d7fcbe047ac..aa564599e368 100644 --- a/arch/powerpc/configs/cell_defconfig +++ b/arch/powerpc/configs/cell_defconfig | |||
| @@ -179,7 +179,6 @@ CONFIG_INFINIBAND_MTHCA=m | |||
| 179 | CONFIG_INFINIBAND_IPOIB=m | 179 | CONFIG_INFINIBAND_IPOIB=m |
| 180 | CONFIG_INFINIBAND_IPOIB_DEBUG_DATA=y | 180 | CONFIG_INFINIBAND_IPOIB_DEBUG_DATA=y |
| 181 | CONFIG_EDAC=y | 181 | CONFIG_EDAC=y |
| 182 | CONFIG_EDAC_MM_EDAC=y | ||
| 183 | CONFIG_EDAC_CELL=y | 182 | CONFIG_EDAC_CELL=y |
| 184 | CONFIG_UIO=m | 183 | CONFIG_UIO=m |
| 185 | CONFIG_EXT2_FS=y | 184 | CONFIG_EXT2_FS=y |
diff --git a/arch/powerpc/configs/pasemi_defconfig b/arch/powerpc/configs/pasemi_defconfig index 5553c5ce4274..fe43ff47bd2f 100644 --- a/arch/powerpc/configs/pasemi_defconfig +++ b/arch/powerpc/configs/pasemi_defconfig | |||
| @@ -142,7 +142,6 @@ CONFIG_USB_UHCI_HCD=y | |||
| 142 | CONFIG_USB_SL811_HCD=y | 142 | CONFIG_USB_SL811_HCD=y |
| 143 | CONFIG_USB_STORAGE=y | 143 | CONFIG_USB_STORAGE=y |
| 144 | CONFIG_EDAC=y | 144 | CONFIG_EDAC=y |
| 145 | CONFIG_EDAC_MM_EDAC=y | ||
| 146 | CONFIG_EDAC_PASEMI=y | 145 | CONFIG_EDAC_PASEMI=y |
| 147 | CONFIG_RTC_CLASS=y | 146 | CONFIG_RTC_CLASS=y |
| 148 | CONFIG_RTC_DRV_DS1307=y | 147 | CONFIG_RTC_DRV_DS1307=y |
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig index 4f1288b04303..f2e03f032041 100644 --- a/arch/powerpc/configs/ppc64_defconfig +++ b/arch/powerpc/configs/ppc64_defconfig | |||
| @@ -262,7 +262,6 @@ CONFIG_INFINIBAND_IPOIB_CM=y | |||
| 262 | CONFIG_INFINIBAND_SRP=m | 262 | CONFIG_INFINIBAND_SRP=m |
| 263 | CONFIG_INFINIBAND_ISER=m | 263 | CONFIG_INFINIBAND_ISER=m |
| 264 | CONFIG_EDAC=y | 264 | CONFIG_EDAC=y |
| 265 | CONFIG_EDAC_MM_EDAC=y | ||
| 266 | CONFIG_EDAC_PASEMI=y | 265 | CONFIG_EDAC_PASEMI=y |
| 267 | CONFIG_RTC_CLASS=y | 266 | CONFIG_RTC_CLASS=y |
| 268 | CONFIG_RTC_DRV_DS1307=y | 267 | CONFIG_RTC_DRV_DS1307=y |
diff --git a/arch/powerpc/configs/ppc64e_defconfig b/arch/powerpc/configs/ppc64e_defconfig index 11a3473f9e2e..6340e6c53c54 100644 --- a/arch/powerpc/configs/ppc64e_defconfig +++ b/arch/powerpc/configs/ppc64e_defconfig | |||
| @@ -173,7 +173,6 @@ CONFIG_INFINIBAND_MTHCA=m | |||
| 173 | CONFIG_INFINIBAND_IPOIB=m | 173 | CONFIG_INFINIBAND_IPOIB=m |
| 174 | CONFIG_INFINIBAND_ISER=m | 174 | CONFIG_INFINIBAND_ISER=m |
| 175 | CONFIG_EDAC=y | 175 | CONFIG_EDAC=y |
| 176 | CONFIG_EDAC_MM_EDAC=y | ||
| 177 | CONFIG_RTC_CLASS=y | 176 | CONFIG_RTC_CLASS=y |
| 178 | CONFIG_RTC_DRV_DS1307=y | 177 | CONFIG_RTC_DRV_DS1307=y |
| 179 | CONFIG_FS_DAX=y | 178 | CONFIG_FS_DAX=y |
diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig index 1d2d69dd6409..18d0d60dadbf 100644 --- a/arch/powerpc/configs/ppc6xx_defconfig +++ b/arch/powerpc/configs/ppc6xx_defconfig | |||
| @@ -988,8 +988,7 @@ CONFIG_LEDS_TRIGGER_BACKLIGHT=m | |||
| 988 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=m | 988 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=m |
| 989 | CONFIG_ACCESSIBILITY=y | 989 | CONFIG_ACCESSIBILITY=y |
| 990 | CONFIG_A11Y_BRAILLE_CONSOLE=y | 990 | CONFIG_A11Y_BRAILLE_CONSOLE=y |
| 991 | CONFIG_EDAC=y | 991 | CONFIG_EDAC=m |
| 992 | CONFIG_EDAC_MM_EDAC=m | ||
| 993 | CONFIG_RTC_CLASS=y | 992 | CONFIG_RTC_CLASS=y |
| 994 | # CONFIG_RTC_HCTOSYS is not set | 993 | # CONFIG_RTC_HCTOSYS is not set |
| 995 | CONFIG_RTC_DRV_DS1307=m | 994 | CONFIG_RTC_DRV_DS1307=m |
diff --git a/arch/tile/configs/tilegx_defconfig b/arch/tile/configs/tilegx_defconfig index fd122ef45b00..0d925fa0f0c1 100644 --- a/arch/tile/configs/tilegx_defconfig +++ b/arch/tile/configs/tilegx_defconfig | |||
| @@ -249,7 +249,6 @@ CONFIG_USB_EHCI_HCD=y | |||
| 249 | CONFIG_USB_OHCI_HCD=y | 249 | CONFIG_USB_OHCI_HCD=y |
| 250 | CONFIG_USB_STORAGE=y | 250 | CONFIG_USB_STORAGE=y |
| 251 | CONFIG_EDAC=y | 251 | CONFIG_EDAC=y |
| 252 | CONFIG_EDAC_MM_EDAC=y | ||
| 253 | CONFIG_RTC_CLASS=y | 252 | CONFIG_RTC_CLASS=y |
| 254 | CONFIG_RTC_DRV_TILE=y | 253 | CONFIG_RTC_DRV_TILE=y |
| 255 | CONFIG_EXT2_FS=y | 254 | CONFIG_EXT2_FS=y |
diff --git a/arch/tile/configs/tilepro_defconfig b/arch/tile/configs/tilepro_defconfig index eb6a55944191..149d8e8eacb8 100644 --- a/arch/tile/configs/tilepro_defconfig +++ b/arch/tile/configs/tilepro_defconfig | |||
| @@ -358,7 +358,6 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
| 358 | # CONFIG_VGA_ARB is not set | 358 | # CONFIG_VGA_ARB is not set |
| 359 | # CONFIG_USB_SUPPORT is not set | 359 | # CONFIG_USB_SUPPORT is not set |
| 360 | CONFIG_EDAC=y | 360 | CONFIG_EDAC=y |
| 361 | CONFIG_EDAC_MM_EDAC=y | ||
| 362 | CONFIG_RTC_CLASS=y | 361 | CONFIG_RTC_CLASS=y |
| 363 | CONFIG_RTC_DRV_TILE=y | 362 | CONFIG_RTC_DRV_TILE=y |
| 364 | CONFIG_EXT2_FS=y | 363 | CONFIG_EXT2_FS=y |
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index a71874df3410..a20cfcbee694 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig | |||
| @@ -471,7 +471,6 @@ config ACPI_EXTLOG | |||
| 471 | tristate "Extended Error Log support" | 471 | tristate "Extended Error Log support" |
| 472 | depends on X86_MCE && X86_LOCAL_APIC && EDAC | 472 | depends on X86_MCE && X86_LOCAL_APIC && EDAC |
| 473 | select UEFI_CPER | 473 | select UEFI_CPER |
| 474 | select RAS | ||
| 475 | default n | 474 | default n |
| 476 | help | 475 | help |
| 477 | Certain usages such as Predictive Failure Analysis (PFA) require | 476 | Certain usages such as Predictive Failure Analysis (PFA) require |
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index 7c68e6f955c7..1ac18c989fb3 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig | |||
| @@ -10,8 +10,8 @@ config EDAC_SUPPORT | |||
| 10 | bool | 10 | bool |
| 11 | 11 | ||
| 12 | menuconfig EDAC | 12 | menuconfig EDAC |
| 13 | bool "EDAC (Error Detection And Correction) reporting" | 13 | tristate "EDAC (Error Detection And Correction) reporting" |
| 14 | depends on HAS_IOMEM && EDAC_SUPPORT | 14 | depends on HAS_IOMEM && EDAC_SUPPORT && RAS |
| 15 | help | 15 | help |
| 16 | EDAC is designed to report errors in the core system. | 16 | EDAC is designed to report errors in the core system. |
| 17 | These are low-level errors that are reported in the CPU or | 17 | These are low-level errors that are reported in the CPU or |
| @@ -62,20 +62,9 @@ config EDAC_DECODE_MCE | |||
| 62 | which occur really early upon boot, before the module infrastructure | 62 | which occur really early upon boot, before the module infrastructure |
| 63 | has been initialized. | 63 | has been initialized. |
| 64 | 64 | ||
| 65 | config EDAC_MM_EDAC | ||
| 66 | tristate "Main Memory EDAC (Error Detection And Correction) reporting" | ||
| 67 | select RAS | ||
| 68 | help | ||
| 69 | Some systems are able to detect and correct errors in main | ||
| 70 | memory. EDAC can report statistics on memory error | ||
| 71 | detection and correction (EDAC - or commonly referred to ECC | ||
| 72 | errors). EDAC will also try to decode where these errors | ||
| 73 | occurred so that a particular failing memory module can be | ||
| 74 | replaced. If unsure, select 'Y'. | ||
| 75 | |||
| 76 | config EDAC_GHES | 65 | config EDAC_GHES |
| 77 | bool "Output ACPI APEI/GHES BIOS detected errors via EDAC" | 66 | bool "Output ACPI APEI/GHES BIOS detected errors via EDAC" |
| 78 | depends on ACPI_APEI_GHES && (EDAC_MM_EDAC=y) | 67 | depends on ACPI_APEI_GHES && (EDAC=y) |
| 79 | default y | 68 | default y |
| 80 | help | 69 | help |
| 81 | Not all machines support hardware-driven error report. Some of those | 70 | Not all machines support hardware-driven error report. Some of those |
| @@ -98,7 +87,7 @@ config EDAC_GHES | |||
| 98 | 87 | ||
| 99 | config EDAC_AMD64 | 88 | config EDAC_AMD64 |
| 100 | tristate "AMD64 (Opteron, Athlon64)" | 89 | tristate "AMD64 (Opteron, Athlon64)" |
| 101 | depends on EDAC_MM_EDAC && AMD_NB && EDAC_DECODE_MCE | 90 | depends on AMD_NB && EDAC_DECODE_MCE |
| 102 | help | 91 | help |
| 103 | Support for error detection and correction of DRAM ECC errors on | 92 | Support for error detection and correction of DRAM ECC errors on |
| 104 | the AMD64 families (>= K8) of memory controllers. | 93 | the AMD64 families (>= K8) of memory controllers. |
| @@ -124,28 +113,28 @@ config EDAC_AMD64_ERROR_INJECTION | |||
| 124 | 113 | ||
| 125 | config EDAC_AMD76X | 114 | config EDAC_AMD76X |
| 126 | tristate "AMD 76x (760, 762, 768)" | 115 | tristate "AMD 76x (760, 762, 768)" |
| 127 | depends on EDAC_MM_EDAC && PCI && X86_32 | 116 | depends on PCI && X86_32 |
| 128 | help | 117 | help |
| 129 | Support for error detection and correction on the AMD 76x | 118 | Support for error detection and correction on the AMD 76x |
| 130 | series of chipsets used with the Athlon processor. | 119 | series of chipsets used with the Athlon processor. |
| 131 | 120 | ||
| 132 | config EDAC_E7XXX | 121 | config EDAC_E7XXX |
| 133 | tristate "Intel e7xxx (e7205, e7500, e7501, e7505)" | 122 | tristate "Intel e7xxx (e7205, e7500, e7501, e7505)" |
| 134 | depends on EDAC_MM_EDAC && PCI && X86_32 | 123 | depends on PCI && X86_32 |
| 135 | help | 124 | help |
| 136 | Support for error detection and correction on the Intel | 125 | Support for error detection and correction on the Intel |
| 137 | E7205, E7500, E7501 and E7505 server chipsets. | 126 | E7205, E7500, E7501 and E7505 server chipsets. |
| 138 | 127 | ||
| 139 | config EDAC_E752X | 128 | config EDAC_E752X |
| 140 | tristate "Intel e752x (e7520, e7525, e7320) and 3100" | 129 | tristate "Intel e752x (e7520, e7525, e7320) and 3100" |
| 141 | depends on EDAC_MM_EDAC && PCI && X86 | 130 | depends on PCI && X86 |
| 142 | help | 131 | help |
| 143 | Support for error detection and correction on the Intel | 132 | Support for error detection and correction on the Intel |
| 144 | E7520, E7525, E7320 server chipsets. | 133 | E7520, E7525, E7320 server chipsets. |
| 145 | 134 | ||
| 146 | config EDAC_I82443BXGX | 135 | config EDAC_I82443BXGX |
| 147 | tristate "Intel 82443BX/GX (440BX/GX)" | 136 | tristate "Intel 82443BX/GX (440BX/GX)" |
| 148 | depends on EDAC_MM_EDAC && PCI && X86_32 | 137 | depends on PCI && X86_32 |
| 149 | depends on BROKEN | 138 | depends on BROKEN |
| 150 | help | 139 | help |
| 151 | Support for error detection and correction on the Intel | 140 | Support for error detection and correction on the Intel |
| @@ -153,56 +142,56 @@ config EDAC_I82443BXGX | |||
| 153 | 142 | ||
| 154 | config EDAC_I82875P | 143 | config EDAC_I82875P |
| 155 | tristate "Intel 82875p (D82875P, E7210)" | 144 | tristate "Intel 82875p (D82875P, E7210)" |
| 156 | depends on EDAC_MM_EDAC && PCI && X86_32 | 145 | depends on PCI && X86_32 |
| 157 | help | 146 | help |
| 158 | Support for error detection and correction on the Intel | 147 | Support for error detection and correction on the Intel |
| 159 | DP82785P and E7210 server chipsets. | 148 | DP82785P and E7210 server chipsets. |
| 160 | 149 | ||
| 161 | config EDAC_I82975X | 150 | config EDAC_I82975X |
| 162 | tristate "Intel 82975x (D82975x)" | 151 | tristate "Intel 82975x (D82975x)" |
| 163 | depends on EDAC_MM_EDAC && PCI && X86 | 152 | depends on PCI && X86 |
| 164 | help | 153 | help |
| 165 | Support for error detection and correction on the Intel | 154 | Support for error detection and correction on the Intel |
| 166 | DP82975x server chipsets. | 155 | DP82975x server chipsets. |
| 167 | 156 | ||
| 168 | config EDAC_I3000 | 157 | config EDAC_I3000 |
| 169 | tristate "Intel 3000/3010" | 158 | tristate "Intel 3000/3010" |
| 170 | depends on EDAC_MM_EDAC && PCI && X86 | 159 | depends on PCI && X86 |
| 171 | help | 160 | help |
| 172 | Support for error detection and correction on the Intel | 161 | Support for error detection and correction on the Intel |
| 173 | 3000 and 3010 server chipsets. | 162 | 3000 and 3010 server chipsets. |
| 174 | 163 | ||
| 175 | config EDAC_I3200 | 164 | config EDAC_I3200 |
| 176 | tristate "Intel 3200" | 165 | tristate "Intel 3200" |
| 177 | depends on EDAC_MM_EDAC && PCI && X86 | 166 | depends on PCI && X86 |
| 178 | help | 167 | help |
| 179 | Support for error detection and correction on the Intel | 168 | Support for error detection and correction on the Intel |
| 180 | 3200 and 3210 server chipsets. | 169 | 3200 and 3210 server chipsets. |
| 181 | 170 | ||
| 182 | config EDAC_IE31200 | 171 | config EDAC_IE31200 |
| 183 | tristate "Intel e312xx" | 172 | tristate "Intel e312xx" |
| 184 | depends on EDAC_MM_EDAC && PCI && X86 | 173 | depends on PCI && X86 |
| 185 | help | 174 | help |
| 186 | Support for error detection and correction on the Intel | 175 | Support for error detection and correction on the Intel |
| 187 | E3-1200 based DRAM controllers. | 176 | E3-1200 based DRAM controllers. |
| 188 | 177 | ||
| 189 | config EDAC_X38 | 178 | config EDAC_X38 |
| 190 | tristate "Intel X38" | 179 | tristate "Intel X38" |
| 191 | depends on EDAC_MM_EDAC && PCI && X86 | 180 | depends on PCI && X86 |
| 192 | help | 181 | help |
| 193 | Support for error detection and correction on the Intel | 182 | Support for error detection and correction on the Intel |
| 194 | X38 server chipsets. | 183 | X38 server chipsets. |
| 195 | 184 | ||
| 196 | config EDAC_I5400 | 185 | config EDAC_I5400 |
| 197 | tristate "Intel 5400 (Seaburg) chipsets" | 186 | tristate "Intel 5400 (Seaburg) chipsets" |
| 198 | depends on EDAC_MM_EDAC && PCI && X86 | 187 | depends on PCI && X86 |
| 199 | help | 188 | help |
| 200 | Support for error detection and correction the Intel | 189 | Support for error detection and correction the Intel |
| 201 | i5400 MCH chipset (Seaburg). | 190 | i5400 MCH chipset (Seaburg). |
| 202 | 191 | ||
| 203 | config EDAC_I7CORE | 192 | config EDAC_I7CORE |
| 204 | tristate "Intel i7 Core (Nehalem) processors" | 193 | tristate "Intel i7 Core (Nehalem) processors" |
| 205 | depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL | 194 | depends on PCI && X86 && X86_MCE_INTEL |
| 206 | help | 195 | help |
| 207 | Support for error detection and correction the Intel | 196 | Support for error detection and correction the Intel |
| 208 | i7 Core (Nehalem) Integrated Memory Controller that exists on | 197 | i7 Core (Nehalem) Integrated Memory Controller that exists on |
| @@ -211,58 +200,56 @@ config EDAC_I7CORE | |||
| 211 | 200 | ||
| 212 | config EDAC_I82860 | 201 | config EDAC_I82860 |
| 213 | tristate "Intel 82860" | 202 | tristate "Intel 82860" |
| 214 | depends on EDAC_MM_EDAC && PCI && X86_32 | 203 | depends on PCI && X86_32 |
| 215 | help | 204 | help |
| 216 | Support for error detection and correction on the Intel | 205 | Support for error detection and correction on the Intel |
| 217 | 82860 chipset. | 206 | 82860 chipset. |
| 218 | 207 | ||
| 219 | config EDAC_R82600 | 208 | config EDAC_R82600 |
| 220 | tristate "Radisys 82600 embedded chipset" | 209 | tristate "Radisys 82600 embedded chipset" |
| 221 | depends on EDAC_MM_EDAC && PCI && X86_32 | 210 | depends on PCI && X86_32 |
| 222 | help | 211 | help |
| 223 | Support for error detection and correction on the Radisys | 212 | Support for error detection and correction on the Radisys |
| 224 | 82600 embedded chipset. | 213 | 82600 embedded chipset. |
| 225 | 214 | ||
| 226 | config EDAC_I5000 | 215 | config EDAC_I5000 |
| 227 | tristate "Intel Greencreek/Blackford chipset" | 216 | tristate "Intel Greencreek/Blackford chipset" |
| 228 | depends on EDAC_MM_EDAC && X86 && PCI | 217 | depends on X86 && PCI |
| 229 | help | 218 | help |
| 230 | Support for error detection and correction the Intel | 219 | Support for error detection and correction the Intel |
| 231 | Greekcreek/Blackford chipsets. | 220 | Greekcreek/Blackford chipsets. |
| 232 | 221 | ||
| 233 | config EDAC_I5100 | 222 | config EDAC_I5100 |
| 234 | tristate "Intel San Clemente MCH" | 223 | tristate "Intel San Clemente MCH" |
| 235 | depends on EDAC_MM_EDAC && X86 && PCI | 224 | depends on X86 && PCI |
| 236 | help | 225 | help |
| 237 | Support for error detection and correction the Intel | 226 | Support for error detection and correction the Intel |
| 238 | San Clemente MCH. | 227 | San Clemente MCH. |
| 239 | 228 | ||
| 240 | config EDAC_I7300 | 229 | config EDAC_I7300 |
| 241 | tristate "Intel Clarksboro MCH" | 230 | tristate "Intel Clarksboro MCH" |
| 242 | depends on EDAC_MM_EDAC && X86 && PCI | 231 | depends on X86 && PCI |
| 243 | help | 232 | help |
| 244 | Support for error detection and correction the Intel | 233 | Support for error detection and correction the Intel |
| 245 | Clarksboro MCH (Intel 7300 chipset). | 234 | Clarksboro MCH (Intel 7300 chipset). |
| 246 | 235 | ||
| 247 | config EDAC_SBRIDGE | 236 | config EDAC_SBRIDGE |
| 248 | tristate "Intel Sandy-Bridge/Ivy-Bridge/Haswell Integrated MC" | 237 | tristate "Intel Sandy-Bridge/Ivy-Bridge/Haswell Integrated MC" |
| 249 | depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL | 238 | depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG |
| 250 | depends on PCI_MMCONFIG | ||
| 251 | help | 239 | help |
| 252 | Support for error detection and correction the Intel | 240 | Support for error detection and correction the Intel |
| 253 | Sandy Bridge, Ivy Bridge and Haswell Integrated Memory Controllers. | 241 | Sandy Bridge, Ivy Bridge and Haswell Integrated Memory Controllers. |
| 254 | 242 | ||
| 255 | config EDAC_SKX | 243 | config EDAC_SKX |
| 256 | tristate "Intel Skylake server Integrated MC" | 244 | tristate "Intel Skylake server Integrated MC" |
| 257 | depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL | 245 | depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG |
| 258 | depends on PCI_MMCONFIG | ||
| 259 | help | 246 | help |
| 260 | Support for error detection and correction the Intel | 247 | Support for error detection and correction the Intel |
| 261 | Skylake server Integrated Memory Controllers. | 248 | Skylake server Integrated Memory Controllers. |
| 262 | 249 | ||
| 263 | config EDAC_PND2 | 250 | config EDAC_PND2 |
| 264 | tristate "Intel Pondicherry2" | 251 | tristate "Intel Pondicherry2" |
| 265 | depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL | 252 | depends on PCI && X86_64 && X86_MCE_INTEL |
| 266 | help | 253 | help |
| 267 | Support for error detection and correction on the Intel | 254 | Support for error detection and correction on the Intel |
| 268 | Pondicherry2 Integrated Memory Controller. This SoC IP is | 255 | Pondicherry2 Integrated Memory Controller. This SoC IP is |
| @@ -271,36 +258,35 @@ config EDAC_PND2 | |||
| 271 | 258 | ||
| 272 | config EDAC_MPC85XX | 259 | config EDAC_MPC85XX |
| 273 | tristate "Freescale MPC83xx / MPC85xx" | 260 | tristate "Freescale MPC83xx / MPC85xx" |
| 274 | depends on EDAC_MM_EDAC && FSL_SOC | 261 | depends on FSL_SOC |
| 275 | help | 262 | help |
| 276 | Support for error detection and correction on the Freescale | 263 | Support for error detection and correction on the Freescale |
| 277 | MPC8349, MPC8560, MPC8540, MPC8548, T4240 | 264 | MPC8349, MPC8560, MPC8540, MPC8548, T4240 |
| 278 | 265 | ||
| 279 | config EDAC_LAYERSCAPE | 266 | config EDAC_LAYERSCAPE |
| 280 | tristate "Freescale Layerscape DDR" | 267 | tristate "Freescale Layerscape DDR" |
| 281 | depends on EDAC_MM_EDAC && ARCH_LAYERSCAPE | 268 | depends on ARCH_LAYERSCAPE |
| 282 | help | 269 | help |
| 283 | Support for error detection and correction on Freescale memory | 270 | Support for error detection and correction on Freescale memory |
| 284 | controllers on Layerscape SoCs. | 271 | controllers on Layerscape SoCs. |
| 285 | 272 | ||
| 286 | config EDAC_MV64X60 | 273 | config EDAC_MV64X60 |
| 287 | tristate "Marvell MV64x60" | 274 | tristate "Marvell MV64x60" |
| 288 | depends on EDAC_MM_EDAC && MV64X60 | 275 | depends on MV64X60 |
| 289 | help | 276 | help |
| 290 | Support for error detection and correction on the Marvell | 277 | Support for error detection and correction on the Marvell |
| 291 | MV64360 and MV64460 chipsets. | 278 | MV64360 and MV64460 chipsets. |
| 292 | 279 | ||
| 293 | config EDAC_PASEMI | 280 | config EDAC_PASEMI |
| 294 | tristate "PA Semi PWRficient" | 281 | tristate "PA Semi PWRficient" |
| 295 | depends on EDAC_MM_EDAC && PCI | 282 | depends on PPC_PASEMI && PCI |
| 296 | depends on PPC_PASEMI | ||
| 297 | help | 283 | help |
| 298 | Support for error detection and correction on PA Semi | 284 | Support for error detection and correction on PA Semi |
| 299 | PWRficient. | 285 | PWRficient. |
| 300 | 286 | ||
| 301 | config EDAC_CELL | 287 | config EDAC_CELL |
| 302 | tristate "Cell Broadband Engine memory controller" | 288 | tristate "Cell Broadband Engine memory controller" |
| 303 | depends on EDAC_MM_EDAC && PPC_CELL_COMMON | 289 | depends on PPC_CELL_COMMON |
| 304 | help | 290 | help |
| 305 | Support for error detection and correction on the | 291 | Support for error detection and correction on the |
| 306 | Cell Broadband Engine internal memory controller | 292 | Cell Broadband Engine internal memory controller |
| @@ -308,7 +294,7 @@ config EDAC_CELL | |||
| 308 | 294 | ||
| 309 | config EDAC_PPC4XX | 295 | config EDAC_PPC4XX |
| 310 | tristate "PPC4xx IBM DDR2 Memory Controller" | 296 | tristate "PPC4xx IBM DDR2 Memory Controller" |
| 311 | depends on EDAC_MM_EDAC && 4xx | 297 | depends on 4xx |
| 312 | help | 298 | help |
| 313 | This enables support for EDAC on the ECC memory used | 299 | This enables support for EDAC on the ECC memory used |
| 314 | with the IBM DDR2 memory controller found in various | 300 | with the IBM DDR2 memory controller found in various |
| @@ -317,7 +303,7 @@ config EDAC_PPC4XX | |||
| 317 | 303 | ||
| 318 | config EDAC_AMD8131 | 304 | config EDAC_AMD8131 |
| 319 | tristate "AMD8131 HyperTransport PCI-X Tunnel" | 305 | tristate "AMD8131 HyperTransport PCI-X Tunnel" |
| 320 | depends on EDAC_MM_EDAC && PCI && PPC_MAPLE | 306 | depends on PCI && PPC_MAPLE |
| 321 | help | 307 | help |
| 322 | Support for error detection and correction on the | 308 | Support for error detection and correction on the |
| 323 | AMD8131 HyperTransport PCI-X Tunnel chip. | 309 | AMD8131 HyperTransport PCI-X Tunnel chip. |
| @@ -326,7 +312,7 @@ config EDAC_AMD8131 | |||
| 326 | 312 | ||
| 327 | config EDAC_AMD8111 | 313 | config EDAC_AMD8111 |
| 328 | tristate "AMD8111 HyperTransport I/O Hub" | 314 | tristate "AMD8111 HyperTransport I/O Hub" |
| 329 | depends on EDAC_MM_EDAC && PCI && PPC_MAPLE | 315 | depends on PCI && PPC_MAPLE |
| 330 | help | 316 | help |
| 331 | Support for error detection and correction on the | 317 | Support for error detection and correction on the |
| 332 | AMD8111 HyperTransport I/O Hub chip. | 318 | AMD8111 HyperTransport I/O Hub chip. |
| @@ -335,7 +321,7 @@ config EDAC_AMD8111 | |||
| 335 | 321 | ||
| 336 | config EDAC_CPC925 | 322 | config EDAC_CPC925 |
| 337 | tristate "IBM CPC925 Memory Controller (PPC970FX)" | 323 | tristate "IBM CPC925 Memory Controller (PPC970FX)" |
| 338 | depends on EDAC_MM_EDAC && PPC64 | 324 | depends on PPC64 |
| 339 | help | 325 | help |
| 340 | Support for error detection and correction on the | 326 | Support for error detection and correction on the |
| 341 | IBM CPC925 Bridge and Memory Controller, which is | 327 | IBM CPC925 Bridge and Memory Controller, which is |
| @@ -344,7 +330,7 @@ config EDAC_CPC925 | |||
| 344 | 330 | ||
| 345 | config EDAC_TILE | 331 | config EDAC_TILE |
| 346 | tristate "Tilera Memory Controller" | 332 | tristate "Tilera Memory Controller" |
| 347 | depends on EDAC_MM_EDAC && TILE | 333 | depends on TILE |
| 348 | default y | 334 | default y |
| 349 | help | 335 | help |
| 350 | Support for error detection and correction on the | 336 | Support for error detection and correction on the |
| @@ -352,49 +338,48 @@ config EDAC_TILE | |||
| 352 | 338 | ||
| 353 | config EDAC_HIGHBANK_MC | 339 | config EDAC_HIGHBANK_MC |
| 354 | tristate "Highbank Memory Controller" | 340 | tristate "Highbank Memory Controller" |
| 355 | depends on EDAC_MM_EDAC && ARCH_HIGHBANK | 341 | depends on ARCH_HIGHBANK |
| 356 | help | 342 | help |
| 357 | Support for error detection and correction on the | 343 | Support for error detection and correction on the |
| 358 | Calxeda Highbank memory controller. | 344 | Calxeda Highbank memory controller. |
| 359 | 345 | ||
| 360 | config EDAC_HIGHBANK_L2 | 346 | config EDAC_HIGHBANK_L2 |
| 361 | tristate "Highbank L2 Cache" | 347 | tristate "Highbank L2 Cache" |
| 362 | depends on EDAC_MM_EDAC && ARCH_HIGHBANK | 348 | depends on ARCH_HIGHBANK |
| 363 | help | 349 | help |
| 364 | Support for error detection and correction on the | 350 | Support for error detection and correction on the |
| 365 | Calxeda Highbank memory controller. | 351 | Calxeda Highbank memory controller. |
| 366 | 352 | ||
| 367 | config EDAC_OCTEON_PC | 353 | config EDAC_OCTEON_PC |
| 368 | tristate "Cavium Octeon Primary Caches" | 354 | tristate "Cavium Octeon Primary Caches" |
| 369 | depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON | 355 | depends on CPU_CAVIUM_OCTEON |
| 370 | help | 356 | help |
| 371 | Support for error detection and correction on the primary caches of | 357 | Support for error detection and correction on the primary caches of |
| 372 | the cnMIPS cores of Cavium Octeon family SOCs. | 358 | the cnMIPS cores of Cavium Octeon family SOCs. |
| 373 | 359 | ||
| 374 | config EDAC_OCTEON_L2C | 360 | config EDAC_OCTEON_L2C |
| 375 | tristate "Cavium Octeon Secondary Caches (L2C)" | 361 | tristate "Cavium Octeon Secondary Caches (L2C)" |
| 376 | depends on EDAC_MM_EDAC && CAVIUM_OCTEON_SOC | 362 | depends on CAVIUM_OCTEON_SOC |
| 377 | help | 363 | help |
| 378 | Support for error detection and correction on the | 364 | Support for error detection and correction on the |
| 379 | Cavium Octeon family of SOCs. | 365 | Cavium Octeon family of SOCs. |
| 380 | 366 | ||
| 381 | config EDAC_OCTEON_LMC | 367 | config EDAC_OCTEON_LMC |
| 382 | tristate "Cavium Octeon DRAM Memory Controller (LMC)" | 368 | tristate "Cavium Octeon DRAM Memory Controller (LMC)" |
| 383 | depends on EDAC_MM_EDAC && CAVIUM_OCTEON_SOC | 369 | depends on CAVIUM_OCTEON_SOC |
| 384 | help | 370 | help |
| 385 | Support for error detection and correction on the | 371 | Support for error detection and correction on the |
| 386 | Cavium Octeon family of SOCs. | 372 | Cavium Octeon family of SOCs. |
| 387 | 373 | ||
| 388 | config EDAC_OCTEON_PCI | 374 | config EDAC_OCTEON_PCI |
| 389 | tristate "Cavium Octeon PCI Controller" | 375 | tristate "Cavium Octeon PCI Controller" |
| 390 | depends on EDAC_MM_EDAC && PCI && CAVIUM_OCTEON_SOC | 376 | depends on PCI && CAVIUM_OCTEON_SOC |
| 391 | help | 377 | help |
| 392 | Support for error detection and correction on the | 378 | Support for error detection and correction on the |
| 393 | Cavium Octeon family of SOCs. | 379 | Cavium Octeon family of SOCs. |
| 394 | 380 | ||
| 395 | config EDAC_THUNDERX | 381 | config EDAC_THUNDERX |
| 396 | tristate "Cavium ThunderX EDAC" | 382 | tristate "Cavium ThunderX EDAC" |
| 397 | depends on EDAC_MM_EDAC | ||
| 398 | depends on ARM64 | 383 | depends on ARM64 |
| 399 | depends on PCI | 384 | depends on PCI |
| 400 | help | 385 | help |
| @@ -405,7 +390,7 @@ config EDAC_THUNDERX | |||
| 405 | 390 | ||
| 406 | config EDAC_ALTERA | 391 | config EDAC_ALTERA |
| 407 | bool "Altera SOCFPGA ECC" | 392 | bool "Altera SOCFPGA ECC" |
| 408 | depends on EDAC_MM_EDAC=y && ARCH_SOCFPGA | 393 | depends on EDAC=y && ARCH_SOCFPGA |
| 409 | help | 394 | help |
| 410 | Support for error detection and correction on the | 395 | Support for error detection and correction on the |
| 411 | Altera SOCs. This must be selected for SDRAM ECC. | 396 | Altera SOCs. This must be selected for SDRAM ECC. |
| @@ -471,14 +456,14 @@ config EDAC_ALTERA_SDMMC | |||
| 471 | 456 | ||
| 472 | config EDAC_SYNOPSYS | 457 | config EDAC_SYNOPSYS |
| 473 | tristate "Synopsys DDR Memory Controller" | 458 | tristate "Synopsys DDR Memory Controller" |
| 474 | depends on EDAC_MM_EDAC && ARCH_ZYNQ | 459 | depends on ARCH_ZYNQ |
| 475 | help | 460 | help |
| 476 | Support for error detection and correction on the Synopsys DDR | 461 | Support for error detection and correction on the Synopsys DDR |
| 477 | memory controller. | 462 | memory controller. |
| 478 | 463 | ||
| 479 | config EDAC_XGENE | 464 | config EDAC_XGENE |
| 480 | tristate "APM X-Gene SoC" | 465 | tristate "APM X-Gene SoC" |
| 481 | depends on EDAC_MM_EDAC && (ARM64 || COMPILE_TEST) | 466 | depends on (ARM64 || COMPILE_TEST) |
| 482 | help | 467 | help |
| 483 | Support for error detection and correction on the | 468 | Support for error detection and correction on the |
| 484 | APM X-Gene family of SOCs. | 469 | APM X-Gene family of SOCs. |
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile index 76517ebc0a7f..a8fb734cb28d 100644 --- a/drivers/edac/Makefile +++ b/drivers/edac/Makefile | |||
| @@ -6,8 +6,7 @@ | |||
| 6 | # GNU General Public License. | 6 | # GNU General Public License. |
| 7 | # | 7 | # |
| 8 | 8 | ||
| 9 | obj-$(CONFIG_EDAC) := edac_stub.o | 9 | obj-$(CONFIG_EDAC) := edac_stub.o edac_core.o |
| 10 | obj-$(CONFIG_EDAC_MM_EDAC) += edac_core.o | ||
| 11 | 10 | ||
| 12 | edac_core-y := edac_mc.o edac_device.o edac_mc_sysfs.o | 11 | edac_core-y := edac_mc.o edac_device.o edac_mc_sysfs.o |
| 13 | edac_core-y += edac_module.o edac_device_sysfs.o wq.o | 12 | edac_core-y += edac_module.o edac_device_sysfs.o wq.o |
diff --git a/drivers/edac/edac_stub.c b/drivers/edac/edac_stub.c index aa31cbd17cd2..6aacc569401e 100644 --- a/drivers/edac/edac_stub.c +++ b/drivers/edac/edac_stub.c | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | int edac_report_status = EDAC_REPORTING_ENABLED; | 20 | int edac_report_status = EDAC_REPORTING_ENABLED; |
| 21 | EXPORT_SYMBOL_GPL(edac_report_status); | 21 | EXPORT_SYMBOL_GPL(edac_report_status); |
| 22 | 22 | ||
| 23 | static int __init edac_report_setup(char *str) | 23 | static int __init __maybe_unused edac_report_setup(char *str) |
| 24 | { | 24 | { |
| 25 | if (!str) | 25 | if (!str) |
| 26 | return -EINVAL; | 26 | return -EINVAL; |
