drm/msm: Add MSM_PARAM_GMEM_BASE

User space needs to know where the GMEM whole starts so that they
can set up the addressing correctly.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

2 files changed, 4 insertions, 0 deletions

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 9a92bcf982b8..4cac22633ce4 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -35,6 +35,9 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value)
         case MSM_PARAM_GMEM_SIZE:
                 *value = adreno_gpu->gmem;
                 return 0;
+        case MSM_PARAM_GMEM_BASE:
+                *value = 0x100000;
+                return 0;
         case MSM_PARAM_CHIP_ID:
                 *value = adreno_gpu->rev.patchid |
                                 (adreno_gpu->rev.minor << 8) |
diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h
index 4d5d6a2bc59e..a4a189a240d7 100644
--- a/include/uapi/drm/msm_drm.h
+++ b/include/uapi/drm/msm_drm.h
@@ -72,6 +72,7 @@ struct drm_msm_timespec {
 #define MSM_PARAM_CHIP_ID    0x03
 #define MSM_PARAM_MAX_FREQ   0x04
 #define MSM_PARAM_TIMESTAMP  0x05
+#define MSM_PARAM_GMEM_BASE  0x06
 
 struct drm_msm_param {
         __u32 pipe;           /* in, MSM_PIPE_x */