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authorAvaneesh Kumar Dwivedi <akdwived@codeaurora.org>2017-01-30 10:03:07 -0500
committerBjorn Andersson <bjorn.andersson@linaro.org>2017-01-30 16:33:19 -0500
commite323fc030c458d2f3eb1b9031cb4334ebf9a3484 (patch)
treeffd8259ff6c31c7d2988b112e7276de93f0497dc
parentc7715e47bf6dc4c52297cde7b7aedc4530937dc5 (diff)
remoteproc: qcom: Add additional agree2_clk and px regulator resource.
This patch add additional clock and regulator resource which are initialized based on compatible and has no impact on existing driver working. This resourse addition enable the existing driver to handle. low pass sensor processor device also. Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
-rw-r--r--drivers/remoteproc/qcom_adsp_pil.c43
1 files changed, 38 insertions, 5 deletions
diff --git a/drivers/remoteproc/qcom_adsp_pil.c b/drivers/remoteproc/qcom_adsp_pil.c
index 1a07d8e05615..87f8d4069500 100644
--- a/drivers/remoteproc/qcom_adsp_pil.c
+++ b/drivers/remoteproc/qcom_adsp_pil.c
@@ -36,6 +36,7 @@ struct adsp_data {
36 int crash_reason_smem; 36 int crash_reason_smem;
37 const char *firmware_name; 37 const char *firmware_name;
38 int pas_id; 38 int pas_id;
39 bool has_aggre2_clk;
39}; 40};
40 41
41struct qcom_adsp { 42struct qcom_adsp {
@@ -52,11 +53,14 @@ struct qcom_adsp {
52 unsigned stop_bit; 53 unsigned stop_bit;
53 54
54 struct clk *xo; 55 struct clk *xo;
56 struct clk *aggre2_clk;
55 57
56 struct regulator *cx_supply; 58 struct regulator *cx_supply;
59 struct regulator *px_supply;
57 60
58 int pas_id; 61 int pas_id;
59 int crash_reason_smem; 62 int crash_reason_smem;
63 bool has_aggre2_clk;
60 64
61 struct completion start_done; 65 struct completion start_done;
62 struct completion stop_done; 66 struct completion stop_done;
@@ -115,15 +119,23 @@ static int adsp_start(struct rproc *rproc)
115 if (ret) 119 if (ret)
116 return ret; 120 return ret;
117 121
122 ret = clk_prepare_enable(adsp->aggre2_clk);
123 if (ret)
124 goto disable_xo_clk;
125
118 ret = regulator_enable(adsp->cx_supply); 126 ret = regulator_enable(adsp->cx_supply);
119 if (ret) 127 if (ret)
120 goto disable_clocks; 128 goto disable_aggre2_clk;
129
130 ret = regulator_enable(adsp->px_supply);
131 if (ret)
132 goto disable_cx_supply;
121 133
122 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); 134 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
123 if (ret) { 135 if (ret) {
124 dev_err(adsp->dev, 136 dev_err(adsp->dev,
125 "failed to authenticate image and release reset\n"); 137 "failed to authenticate image and release reset\n");
126 goto disable_regulators; 138 goto disable_px_supply;
127 } 139 }
128 140
129 ret = wait_for_completion_timeout(&adsp->start_done, 141 ret = wait_for_completion_timeout(&adsp->start_done,
@@ -132,14 +144,18 @@ static int adsp_start(struct rproc *rproc)
132 dev_err(adsp->dev, "start timed out\n"); 144 dev_err(adsp->dev, "start timed out\n");
133 qcom_scm_pas_shutdown(adsp->pas_id); 145 qcom_scm_pas_shutdown(adsp->pas_id);
134 ret = -ETIMEDOUT; 146 ret = -ETIMEDOUT;
135 goto disable_regulators; 147 goto disable_px_supply;
136 } 148 }
137 149
138 ret = 0; 150 ret = 0;
139 151
140disable_regulators: 152disable_px_supply:
153 regulator_disable(adsp->px_supply);
154disable_cx_supply:
141 regulator_disable(adsp->cx_supply); 155 regulator_disable(adsp->cx_supply);
142disable_clocks: 156disable_aggre2_clk:
157 clk_disable_unprepare(adsp->aggre2_clk);
158disable_xo_clk:
143 clk_disable_unprepare(adsp->xo); 159 clk_disable_unprepare(adsp->xo);
144 160
145 return ret; 161 return ret;
@@ -250,6 +266,17 @@ static int adsp_init_clock(struct qcom_adsp *adsp)
250 return ret; 266 return ret;
251 } 267 }
252 268
269 if (adsp->has_aggre2_clk) {
270 adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2");
271 if (IS_ERR(adsp->aggre2_clk)) {
272 ret = PTR_ERR(adsp->aggre2_clk);
273 if (ret != -EPROBE_DEFER)
274 dev_err(adsp->dev,
275 "failed to get aggre2 clock");
276 return ret;
277 }
278 }
279
253 return 0; 280 return 0;
254} 281}
255 282
@@ -261,6 +288,10 @@ static int adsp_init_regulator(struct qcom_adsp *adsp)
261 288
262 regulator_set_load(adsp->cx_supply, 100000); 289 regulator_set_load(adsp->cx_supply, 100000);
263 290
291 adsp->px_supply = devm_regulator_get(adsp->dev, "px");
292 if (IS_ERR(adsp->px_supply))
293 return PTR_ERR(adsp->px_supply);
294
264 return 0; 295 return 0;
265} 296}
266 297
@@ -348,6 +379,7 @@ static int adsp_probe(struct platform_device *pdev)
348 adsp->rproc = rproc; 379 adsp->rproc = rproc;
349 adsp->pas_id = desc->pas_id; 380 adsp->pas_id = desc->pas_id;
350 adsp->crash_reason_smem = desc->crash_reason_smem; 381 adsp->crash_reason_smem = desc->crash_reason_smem;
382 adsp->has_aggre2_clk = desc->has_aggre2_clk;
351 platform_set_drvdata(pdev, adsp); 383 platform_set_drvdata(pdev, adsp);
352 384
353 init_completion(&adsp->start_done); 385 init_completion(&adsp->start_done);
@@ -424,6 +456,7 @@ static const struct adsp_data adsp_resource_init = {
424 .crash_reason_smem = 423, 456 .crash_reason_smem = 423,
425 .firmware_name = "adsp.mdt", 457 .firmware_name = "adsp.mdt",
426 .pas_id = 1, 458 .pas_id = 1,
459 .has_aggre2_clk = false,
427}; 460};
428 461
429static const struct of_device_id adsp_of_match[] = { 462static const struct of_device_id adsp_of_match[] = {