diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-11-27 15:27:37 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-11-27 15:27:37 -0500 |
| commit | e23739b4ade80a3a7f87198f008f6c44a7cbc9fd (patch) | |
| tree | 4d65299a5c76f9fdbed961c7977c909737d0d9f5 | |
| parent | 2844a48706e54ddda4a04269dba4250b42f449de (diff) | |
| parent | 86163adb8125a4ce85e0b23a50be82bd8c0daf95 (diff) | |
Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media fixes from Mauro Carvalho Chehab:
"For some media fixes:
- dvb_usb_v2: some fixes at the core
- Some fixes on some embedded drivers: soc_camera, adv7604, omap3isp,
exynos/s5p
- Several Exynos4/5 camera fixes
- a fix at stv0900 driver
- a few USB ID additions to detect more variants of rtl28xxu-based
sticks"
* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (25 commits)
[media] rtl28xxu: 0ccd:00d7 TerraTec Cinergy T Stick+
[media] rtl28xxu: 1d19:1102 Dexatek DK mini DVB-T Dongle
[media] mt9v022: fix the V4L2_CID_EXPOSURE control
[media] mx2_camera: fix missing unlock on error in mx2_start_streaming()
[media] media: omap1_camera: fix const cropping related warnings
[media] media: mx1_camera: use the default .set_crop() implementation
[media] media: mx2_camera: fix const cropping related warnings
[media] media: mx3_camera: fix const cropping related warnings
[media] media: pxa_camera: fix const cropping related warnings
[media] media: sh_mobile_ceu_camera: fix const cropping related warnings
[media] media: sh_vou: fix const cropping related warnings
[media] adv7604: restart STDI once if format is not found
[media] adv7604: use presets where possible
[media] adv7604: Replace prim_mode by mode
[media] adv7604: cleanup references
[media] dvb_usb_v2: switch interruptible mutex to normal
[media] dvb_usb_v2: fix pid_filter callback error logging
[media] exynos-gsc: change driver compatible string
[media] omap3isp: Fix warning caused by bad subdev events operations prototypes
[media] omap3isp: video: Fix warning caused by bad vidioc_s_crop prototype
...
23 files changed, 366 insertions, 189 deletions
diff --git a/drivers/media/dvb-frontends/stv0900_core.c b/drivers/media/dvb-frontends/stv0900_core.c index 262dfa503c2a..b551ca350e00 100644 --- a/drivers/media/dvb-frontends/stv0900_core.c +++ b/drivers/media/dvb-frontends/stv0900_core.c | |||
| @@ -300,15 +300,15 @@ static enum fe_stv0900_error stv0900_set_mclk(struct stv0900_internal *intp, u32 | |||
| 300 | { | 300 | { |
| 301 | u32 m_div, clk_sel; | 301 | u32 m_div, clk_sel; |
| 302 | 302 | ||
| 303 | dprintk("%s: Mclk set to %d, Quartz = %d\n", __func__, mclk, | ||
| 304 | intp->quartz); | ||
| 305 | |||
| 306 | if (intp == NULL) | 303 | if (intp == NULL) |
| 307 | return STV0900_INVALID_HANDLE; | 304 | return STV0900_INVALID_HANDLE; |
| 308 | 305 | ||
| 309 | if (intp->errs) | 306 | if (intp->errs) |
| 310 | return STV0900_I2C_ERROR; | 307 | return STV0900_I2C_ERROR; |
| 311 | 308 | ||
| 309 | dprintk("%s: Mclk set to %d, Quartz = %d\n", __func__, mclk, | ||
| 310 | intp->quartz); | ||
| 311 | |||
| 312 | clk_sel = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6); | 312 | clk_sel = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6); |
| 313 | m_div = ((clk_sel * mclk) / intp->quartz) - 1; | 313 | m_div = ((clk_sel * mclk) / intp->quartz) - 1; |
| 314 | stv0900_write_bits(intp, F0900_M_DIV, m_div); | 314 | stv0900_write_bits(intp, F0900_M_DIV, m_div); |
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c index 109bc9b12e74..05f8950f6f91 100644 --- a/drivers/media/i2c/adv7604.c +++ b/drivers/media/i2c/adv7604.c | |||
| @@ -53,8 +53,7 @@ MODULE_LICENSE("GPL"); | |||
| 53 | /* ADV7604 system clock frequency */ | 53 | /* ADV7604 system clock frequency */ |
| 54 | #define ADV7604_fsc (28636360) | 54 | #define ADV7604_fsc (28636360) |
| 55 | 55 | ||
| 56 | #define DIGITAL_INPUT ((state->prim_mode == ADV7604_PRIM_MODE_HDMI_COMP) || \ | 56 | #define DIGITAL_INPUT (state->mode == ADV7604_MODE_HDMI) |
| 57 | (state->prim_mode == ADV7604_PRIM_MODE_HDMI_GR)) | ||
| 58 | 57 | ||
| 59 | /* | 58 | /* |
| 60 | ********************************************************************** | 59 | ********************************************************************** |
| @@ -68,7 +67,7 @@ struct adv7604_state { | |||
| 68 | struct v4l2_subdev sd; | 67 | struct v4l2_subdev sd; |
| 69 | struct media_pad pad; | 68 | struct media_pad pad; |
| 70 | struct v4l2_ctrl_handler hdl; | 69 | struct v4l2_ctrl_handler hdl; |
| 71 | enum adv7604_prim_mode prim_mode; | 70 | enum adv7604_mode mode; |
| 72 | struct v4l2_dv_timings timings; | 71 | struct v4l2_dv_timings timings; |
| 73 | u8 edid[256]; | 72 | u8 edid[256]; |
| 74 | unsigned edid_blocks; | 73 | unsigned edid_blocks; |
| @@ -77,6 +76,7 @@ struct adv7604_state { | |||
| 77 | struct workqueue_struct *work_queues; | 76 | struct workqueue_struct *work_queues; |
| 78 | struct delayed_work delayed_work_enable_hotplug; | 77 | struct delayed_work delayed_work_enable_hotplug; |
| 79 | bool connector_hdmi; | 78 | bool connector_hdmi; |
| 79 | bool restart_stdi_once; | ||
| 80 | 80 | ||
| 81 | /* i2c clients */ | 81 | /* i2c clients */ |
| 82 | struct i2c_client *i2c_avlink; | 82 | struct i2c_client *i2c_avlink; |
| @@ -106,7 +106,6 @@ static const struct v4l2_dv_timings adv7604_timings[] = { | |||
| 106 | V4L2_DV_BT_CEA_720X576P50, | 106 | V4L2_DV_BT_CEA_720X576P50, |
| 107 | V4L2_DV_BT_CEA_1280X720P24, | 107 | V4L2_DV_BT_CEA_1280X720P24, |
| 108 | V4L2_DV_BT_CEA_1280X720P25, | 108 | V4L2_DV_BT_CEA_1280X720P25, |
| 109 | V4L2_DV_BT_CEA_1280X720P30, | ||
| 110 | V4L2_DV_BT_CEA_1280X720P50, | 109 | V4L2_DV_BT_CEA_1280X720P50, |
| 111 | V4L2_DV_BT_CEA_1280X720P60, | 110 | V4L2_DV_BT_CEA_1280X720P60, |
| 112 | V4L2_DV_BT_CEA_1920X1080P24, | 111 | V4L2_DV_BT_CEA_1920X1080P24, |
| @@ -115,6 +114,7 @@ static const struct v4l2_dv_timings adv7604_timings[] = { | |||
| 115 | V4L2_DV_BT_CEA_1920X1080P50, | 114 | V4L2_DV_BT_CEA_1920X1080P50, |
| 116 | V4L2_DV_BT_CEA_1920X1080P60, | 115 | V4L2_DV_BT_CEA_1920X1080P60, |
| 117 | 116 | ||
| 117 | /* sorted by DMT ID */ | ||
| 118 | V4L2_DV_BT_DMT_640X350P85, | 118 | V4L2_DV_BT_DMT_640X350P85, |
| 119 | V4L2_DV_BT_DMT_640X400P85, | 119 | V4L2_DV_BT_DMT_640X400P85, |
| 120 | V4L2_DV_BT_DMT_720X400P85, | 120 | V4L2_DV_BT_DMT_720X400P85, |
| @@ -164,6 +164,89 @@ static const struct v4l2_dv_timings adv7604_timings[] = { | |||
| 164 | { }, | 164 | { }, |
| 165 | }; | 165 | }; |
| 166 | 166 | ||
| 167 | struct adv7604_video_standards { | ||
| 168 | struct v4l2_dv_timings timings; | ||
| 169 | u8 vid_std; | ||
| 170 | u8 v_freq; | ||
| 171 | }; | ||
| 172 | |||
| 173 | /* sorted by number of lines */ | ||
| 174 | static const struct adv7604_video_standards adv7604_prim_mode_comp[] = { | ||
| 175 | /* { V4L2_DV_BT_CEA_720X480P59_94, 0x0a, 0x00 }, TODO flickering */ | ||
| 176 | { V4L2_DV_BT_CEA_720X576P50, 0x0b, 0x00 }, | ||
| 177 | { V4L2_DV_BT_CEA_1280X720P50, 0x19, 0x01 }, | ||
| 178 | { V4L2_DV_BT_CEA_1280X720P60, 0x19, 0x00 }, | ||
| 179 | { V4L2_DV_BT_CEA_1920X1080P24, 0x1e, 0x04 }, | ||
| 180 | { V4L2_DV_BT_CEA_1920X1080P25, 0x1e, 0x03 }, | ||
| 181 | { V4L2_DV_BT_CEA_1920X1080P30, 0x1e, 0x02 }, | ||
| 182 | { V4L2_DV_BT_CEA_1920X1080P50, 0x1e, 0x01 }, | ||
| 183 | { V4L2_DV_BT_CEA_1920X1080P60, 0x1e, 0x00 }, | ||
| 184 | /* TODO add 1920x1080P60_RB (CVT timing) */ | ||
| 185 | { }, | ||
| 186 | }; | ||
| 187 | |||
| 188 | /* sorted by number of lines */ | ||
| 189 | static const struct adv7604_video_standards adv7604_prim_mode_gr[] = { | ||
| 190 | { V4L2_DV_BT_DMT_640X480P60, 0x08, 0x00 }, | ||
| 191 | { V4L2_DV_BT_DMT_640X480P72, 0x09, 0x00 }, | ||
| 192 | { V4L2_DV_BT_DMT_640X480P75, 0x0a, 0x00 }, | ||
| 193 | { V4L2_DV_BT_DMT_640X480P85, 0x0b, 0x00 }, | ||
| 194 | { V4L2_DV_BT_DMT_800X600P56, 0x00, 0x00 }, | ||
| 195 | { V4L2_DV_BT_DMT_800X600P60, 0x01, 0x00 }, | ||
| 196 | { V4L2_DV_BT_DMT_800X600P72, 0x02, 0x00 }, | ||
| 197 | { V4L2_DV_BT_DMT_800X600P75, 0x03, 0x00 }, | ||
| 198 | { V4L2_DV_BT_DMT_800X600P85, 0x04, 0x00 }, | ||
| 199 | { V4L2_DV_BT_DMT_1024X768P60, 0x0c, 0x00 }, | ||
| 200 | { V4L2_DV_BT_DMT_1024X768P70, 0x0d, 0x00 }, | ||
| 201 | { V4L2_DV_BT_DMT_1024X768P75, 0x0e, 0x00 }, | ||
| 202 | { V4L2_DV_BT_DMT_1024X768P85, 0x0f, 0x00 }, | ||
| 203 | { V4L2_DV_BT_DMT_1280X1024P60, 0x05, 0x00 }, | ||
| 204 | { V4L2_DV_BT_DMT_1280X1024P75, 0x06, 0x00 }, | ||
| 205 | { V4L2_DV_BT_DMT_1360X768P60, 0x12, 0x00 }, | ||
| 206 | { V4L2_DV_BT_DMT_1366X768P60, 0x13, 0x00 }, | ||
| 207 | { V4L2_DV_BT_DMT_1400X1050P60, 0x14, 0x00 }, | ||
| 208 | { V4L2_DV_BT_DMT_1400X1050P75, 0x15, 0x00 }, | ||
| 209 | { V4L2_DV_BT_DMT_1600X1200P60, 0x16, 0x00 }, /* TODO not tested */ | ||
| 210 | /* TODO add 1600X1200P60_RB (not a DMT timing) */ | ||
| 211 | { V4L2_DV_BT_DMT_1680X1050P60, 0x18, 0x00 }, | ||
| 212 | { V4L2_DV_BT_DMT_1920X1200P60_RB, 0x19, 0x00 }, /* TODO not tested */ | ||
| 213 | { }, | ||
| 214 | }; | ||
| 215 | |||
| 216 | /* sorted by number of lines */ | ||
| 217 | static const struct adv7604_video_standards adv7604_prim_mode_hdmi_comp[] = { | ||
| 218 | { V4L2_DV_BT_CEA_720X480P59_94, 0x0a, 0x00 }, | ||
| 219 | { V4L2_DV_BT_CEA_720X576P50, 0x0b, 0x00 }, | ||
| 220 | { V4L2_DV_BT_CEA_1280X720P50, 0x13, 0x01 }, | ||
| 221 | { V4L2_DV_BT_CEA_1280X720P60, 0x13, 0x00 }, | ||
| 222 | { V4L2_DV_BT_CEA_1920X1080P24, 0x1e, 0x04 }, | ||
| 223 | { V4L2_DV_BT_CEA_1920X1080P25, 0x1e, 0x03 }, | ||
| 224 | { V4L2_DV_BT_CEA_1920X1080P30, 0x1e, 0x02 }, | ||
| 225 | { V4L2_DV_BT_CEA_1920X1080P50, 0x1e, 0x01 }, | ||
| 226 | { V4L2_DV_BT_CEA_1920X1080P60, 0x1e, 0x00 }, | ||
| 227 | { }, | ||
| 228 | }; | ||
| 229 | |||
| 230 | /* sorted by number of lines */ | ||
| 231 | static const struct adv7604_video_standards adv7604_prim_mode_hdmi_gr[] = { | ||
| 232 | { V4L2_DV_BT_DMT_640X480P60, 0x08, 0x00 }, | ||
| 233 | { V4L2_DV_BT_DMT_640X480P72, 0x09, 0x00 }, | ||
| 234 | { V4L2_DV_BT_DMT_640X480P75, 0x0a, 0x00 }, | ||
| 235 | { V4L2_DV_BT_DMT_640X480P85, 0x0b, 0x00 }, | ||
| 236 | { V4L2_DV_BT_DMT_800X600P56, 0x00, 0x00 }, | ||
| 237 | { V4L2_DV_BT_DMT_800X600P60, 0x01, 0x00 }, | ||
| 238 | { V4L2_DV_BT_DMT_800X600P72, 0x02, 0x00 }, | ||
