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author | Olof Johansson <olof@lixom.net> | 2015-07-15 05:29:22 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2015-07-15 05:29:55 -0400 |
commit | e1749a757236564127e932703d3ed442d910e6d2 (patch) | |
tree | 85d7fd9bcd222ba57727d59e7d7d63cdca2d4bcb | |
parent | cde137aa86f22a471a0fcf53cf634cf2207fa9e7 (diff) | |
parent | d438462c20a300139c2e5e65b96cadaa21b58d9a (diff) |
Merge tag 'imx-fixes-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: imx: fixes for 4.2" from Shawn Guo:
The i.MX fixes for 4.2:
- Correct compatible string for i.MX27 GPT which actually shares the
same programming model as i.MX21 GPT rather than i.MX1 one.
- Add missing #io-channel-cells property for i.MX23 LRADC device, which
is required for the device to be an IIO provider.
- Correct HSYNC/VSYNC pins and add ddc-i2c-bus property for TVE device
on imx53-qsb to work properly.
- Always enable PU domain if CONFIG_PM is not set. This fixes a couple
of failure scenarios which will hang the system if one of the devices
in the PU domain is accessed.
* tag 'imx-fixes-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx6: gpc: always enable PU domain if CONFIG_PM is not set
ARM: dts: imx53-qsb: fix TVE entry
ARM: dts: mx23: fix iio-hwmon support
ARM: dts: imx27: Adjust the GPT compatible string
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | arch/arm/boot/dts/imx23.dtsi | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx27.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53-qsb-common.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/mach-imx/gpc.c | 27 |
4 files changed, 16 insertions, 29 deletions
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index c892d58e8dad..b995333ea22b 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi | |||
@@ -468,6 +468,7 @@ | |||
468 | interrupts = <36 37 38 39 40 41 42 43 44>; | 468 | interrupts = <36 37 38 39 40 41 42 43 44>; |
469 | status = "disabled"; | 469 | status = "disabled"; |
470 | clocks = <&clks 26>; | 470 | clocks = <&clks 26>; |
471 | #io-channel-cells = <1>; | ||
471 | }; | 472 | }; |
472 | 473 | ||
473 | spdif@80054000 { | 474 | spdif@80054000 { |
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index bc215e4b75fd..b69be5c499cf 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi | |||
@@ -108,7 +108,7 @@ | |||
108 | }; | 108 | }; |
109 | 109 | ||
110 | gpt1: timer@10003000 { | 110 | gpt1: timer@10003000 { |
111 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 111 | compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; |
112 | reg = <0x10003000 0x1000>; | 112 | reg = <0x10003000 0x1000>; |
113 | interrupts = <26>; | 113 | interrupts = <26>; |
114 | clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>, | 114 | clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>, |
@@ -117,7 +117,7 @@ | |||
117 | }; | 117 | }; |
118 | 118 | ||
119 | gpt2: timer@10004000 { | 119 | gpt2: timer@10004000 { |
120 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 120 | compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; |
121 | reg = <0x10004000 0x1000>; | 121 | reg = <0x10004000 0x1000>; |
122 | interrupts = <25>; | 122 | interrupts = <25>; |
123 | clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>, | 123 | clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>, |
@@ -126,7 +126,7 @@ | |||
126 | }; | 126 | }; |
127 | 127 | ||
128 | gpt3: timer@10005000 { | 128 | gpt3: timer@10005000 { |
129 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 129 | compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; |
130 | reg = <0x10005000 0x1000>; | 130 | reg = <0x10005000 0x1000>; |
131 | interrupts = <24>; | 131 | interrupts = <24>; |
132 | clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>, | 132 | clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>, |
@@ -376,7 +376,7 @@ | |||
376 | }; | 376 | }; |
377 | 377 | ||
378 | gpt4: timer@10019000 { | 378 | gpt4: timer@10019000 { |
379 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 379 | compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; |
380 | reg = <0x10019000 0x1000>; | 380 | reg = <0x10019000 0x1000>; |
381 | interrupts = <4>; | 381 | interrupts = <4>; |
382 | clocks = <&clks IMX27_CLK_GPT4_IPG_GATE>, | 382 | clocks = <&clks IMX27_CLK_GPT4_IPG_GATE>, |
@@ -385,7 +385,7 @@ | |||
385 | }; | 385 | }; |
386 | 386 | ||
387 | gpt5: timer@1001a000 { | 387 | gpt5: timer@1001a000 { |
388 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 388 | compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; |
389 | reg = <0x1001a000 0x1000>; | 389 | reg = <0x1001a000 0x1000>; |
390 | interrupts = <3>; | 390 | interrupts = <3>; |
391 | clocks = <&clks IMX27_CLK_GPT5_IPG_GATE>, | 391 | clocks = <&clks IMX27_CLK_GPT5_IPG_GATE>, |
@@ -436,7 +436,7 @@ | |||
436 | }; | 436 | }; |
437 | 437 | ||
438 | gpt6: timer@1001f000 { | 438 | gpt6: timer@1001f000 { |
439 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 439 | compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; |
440 | reg = <0x1001f000 0x1000>; | 440 | reg = <0x1001f000 0x1000>; |
441 | interrupts = <2>; | 441 | interrupts = <2>; |
442 | clocks = <&clks IMX27_CLK_GPT6_IPG_GATE>, | 442 | clocks = <&clks IMX27_CLK_GPT6_IPG_GATE>, |
diff --git a/arch/arm/boot/dts/imx53-qsb-common.dtsi b/arch/arm/boot/dts/imx53-qsb-common.dtsi index 181ae5ebf23f..ab4ba39f2ed9 100644 --- a/arch/arm/boot/dts/imx53-qsb-common.dtsi +++ b/arch/arm/boot/dts/imx53-qsb-common.dtsi | |||
@@ -295,9 +295,10 @@ | |||
295 | &tve { | 295 | &tve { |
296 | pinctrl-names = "default"; | 296 | pinctrl-names = "default"; |
297 | pinctrl-0 = <&pinctrl_vga_sync>; | 297 | pinctrl-0 = <&pinctrl_vga_sync>; |
298 | ddc-i2c-bus = <&i2c2>; | ||
298 | fsl,tve-mode = "vga"; | 299 | fsl,tve-mode = "vga"; |
299 | fsl,hsync-pin = <4>; | 300 | fsl,hsync-pin = <7>; /* IPU DI1 PIN7 via EIM_OE */ |
300 | fsl,vsync-pin = <6>; | 301 | fsl,vsync-pin = <8>; /* IPU DI1 PIN8 via EIM_RW */ |
301 | status = "okay"; | 302 | status = "okay"; |
302 | }; | 303 | }; |
303 | 304 | ||
diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c index 80bad29d609a..8c4467fad837 100644 --- a/arch/arm/mach-imx/gpc.c +++ b/arch/arm/mach-imx/gpc.c | |||
@@ -291,8 +291,6 @@ void __init imx_gpc_check_dt(void) | |||
291 | } | 291 | } |
292 | } | 292 | } |
293 | 293 | ||
294 | #ifdef CONFIG_PM_GENERIC_DOMAINS | ||
295 | |||
296 | static void _imx6q_pm_pu_power_off(struct generic_pm_domain *genpd) | 294 | static void _imx6q_pm_pu_power_off(struct generic_pm_domain *genpd) |
297 | { | 295 | { |
298 | int iso, iso2sw; | 296 | int iso, iso2sw; |
@@ -399,7 +397,6 @@ static struct genpd_onecell_data imx_gpc_onecell_data = { | |||
399 | static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg) | 397 | static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg) |
400 | { | 398 | { |
401 | struct clk *clk; | 399 | struct clk *clk; |
402 | bool is_off; | ||
403 | int i; | 400 | int i; |
404 | 401 | ||
405 | imx6q_pu_domain.reg = pu_reg; | 402 | imx6q_pu_domain.reg = pu_reg; |
@@ -416,18 +413,13 @@ static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg) | |||
416 | } | 413 | } |
417 | imx6q_pu_domain.num_clks = i; | 414 | imx6q_pu_domain.num_clks = i; |
418 | 415 | ||
419 | is_off = IS_ENABLED(CONFIG_PM); | 416 | /* Enable power always in case bootloader disabled it. */ |
420 | if (is_off) { | 417 | imx6q_pm_pu_power_on(&imx6q_pu_domain.base); |
421 | _imx6q_pm_pu_power_off(&imx6q_pu_domain.base); | 418 | |
422 | } else { | 419 | if (!IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS)) |
423 | /* | 420 | return 0; |
424 | * Enable power if compiled without CONFIG_PM in case the | ||
425 | * bootloader disabled it. | ||
426 | */ | ||
427 | imx6q_pm_pu_power_on(&imx6q_pu_domain.base); | ||
428 | } | ||
429 | 421 | ||
430 | pm_genpd_init(&imx6q_pu_domain.base, NULL, is_off); | 422 | pm_genpd_init(&imx6q_pu_domain.base, NULL, false); |
431 | return of_genpd_add_provider_onecell(dev->of_node, | 423 | return of_genpd_add_provider_onecell(dev->of_node, |
432 | &imx_gpc_onecell_data); | 424 | &imx_gpc_onecell_data); |
433 | 425 | ||
@@ -437,13 +429,6 @@ clk_err: | |||
437 | return -EINVAL; | 429 | return -EINVAL; |
438 | } | 430 | } |
439 | 431 | ||
440 | #else | ||
441 | static inline int imx_gpc_genpd_init(struct device *dev, struct regulator *reg) | ||
442 | { | ||
443 | return 0; | ||
444 | } | ||
445 | #endif /* CONFIG_PM_GENERIC_DOMAINS */ | ||
446 | |||
447 | static int imx_gpc_probe(struct platform_device *pdev) | 432 | static int imx_gpc_probe(struct platform_device *pdev) |
448 | { | 433 | { |
449 | struct regulator *pu_reg; | 434 | struct regulator *pu_reg; |