diff options
author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2018-03-31 17:23:51 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2018-04-01 14:09:53 -0400 |
commit | e14549a50a6c5e3320bb941440b1c3ae4812ea69 (patch) | |
tree | 067f91f3dcb5cb4c664304af76c201183cf88df8 | |
parent | 6e80e55bd37a90b412f168b1667ffa7d2debd46b (diff) |
sh_eth: kill useless check in __sh_eth_get_regs()
Iff TSU registers exist on a given [G]Ether controller, they always include
the CAM entry table registers (TSU_ADR{H|L}<n>), thus the check for invalid
TSU_ADRH0 offset in __sh_eth_get_regs() is useless...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/renesas/sh_eth.c | 25 |
1 files changed, 10 insertions, 15 deletions
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index 2bff03345b72..b6b90a6314e3 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c | |||
@@ -2153,22 +2153,17 @@ static size_t __sh_eth_get_regs(struct net_device *ndev, u32 *buf) | |||
2153 | add_tsu_reg(TSU_POST2); | 2153 | add_tsu_reg(TSU_POST2); |
2154 | add_tsu_reg(TSU_POST3); | 2154 | add_tsu_reg(TSU_POST3); |
2155 | add_tsu_reg(TSU_POST4); | 2155 | add_tsu_reg(TSU_POST4); |
2156 | if (mdp->reg_offset[TSU_ADRH0] != SH_ETH_OFFSET_INVALID) { | 2156 | /* This is the start of a table, not just a single register. */ |
2157 | /* This is the start of a table, not just a single | 2157 | if (buf) { |
2158 | * register. | 2158 | unsigned int i; |
2159 | */ | 2159 | |
2160 | if (buf) { | 2160 | mark_reg_valid(TSU_ADRH0); |
2161 | unsigned int i; | 2161 | for (i = 0; i < SH_ETH_TSU_CAM_ENTRIES * 2; i++) |
2162 | 2162 | *buf++ = ioread32(mdp->tsu_addr + | |
2163 | mark_reg_valid(TSU_ADRH0); | 2163 | mdp->reg_offset[TSU_ADRH0] + |
2164 | for (i = 0; i < SH_ETH_TSU_CAM_ENTRIES * 2; i++) | 2164 | i * 4); |
2165 | *buf++ = ioread32( | ||
2166 | mdp->tsu_addr + | ||
2167 | mdp->reg_offset[TSU_ADRH0] + | ||
2168 | i * 4); | ||
2169 | } | ||
2170 | len += SH_ETH_TSU_CAM_ENTRIES * 2; | ||
2171 | } | 2165 | } |
2166 | len += SH_ETH_TSU_CAM_ENTRIES * 2; | ||
2172 | } | 2167 | } |
2173 | 2168 | ||
2174 | #undef mark_reg_valid | 2169 | #undef mark_reg_valid |