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authorArnd Bergmann <arnd@arndb.de>2018-03-06 12:00:50 -0500
committerArnd Bergmann <arnd@arndb.de>2018-03-06 12:00:50 -0500
commite107f4bb65e4ab55cf6a43af51254cd3e9c66066 (patch)
tree8e2cf88752448bfe7ec857c5a0cf41063a0f3f3b
parente9c112c94b014b581380d370d3fa2f1d23d07cc0 (diff)
parent1d7592f84f92c6344978186fdbe547af044274b5 (diff)
Merge tag 'reset-for-4.17' of git://git.pengutronix.de/git/pza/linux into next/drivers
Pull "Reset controller changes for v4.17" from Philipp Zabel: This enables level resets on Meson8b SoCs. Level resets have been previously implemented for the newer Meson GX SoCs, so this removes the distinction between the two families in the meson-reset driver. Also enables the ASPEED LPC reset controller on ASPEED AST2400 and AST2500 SoCs, by adding compatibles to the simple-reset driver. * tag 'reset-for-4.17' of git://git.pengutronix.de/git/pza/linux: reset: simple: Enable for ASPEED systems dt-bindings: aspeed-lpc: Add reset controller reset: meson: enable level reset support on Meson8b
-rw-r--r--Documentation/devicetree/bindings/mfd/aspeed-lpc.txt21
-rw-r--r--drivers/reset/Kconfig10
-rw-r--r--drivers/reset/reset-meson.c22
-rw-r--r--drivers/reset/reset-simple.c2
4 files changed, 35 insertions, 20 deletions
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
index 514d82ced95b..7136432f9905 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
@@ -135,3 +135,24 @@ lhc: lhc@20 {
135 compatible = "aspeed,ast2500-lhc"; 135 compatible = "aspeed,ast2500-lhc";
136 reg = <0x20 0x24 0x48 0x8>; 136 reg = <0x20 0x24 0x48 0x8>;
137}; 137};
138
139LPC reset control
140-----------------
141
142The UARTs present in the ASPEED SoC can have their resets tied to the reset
143state of the LPC bus. Some systems may chose to modify this configuration.
144
145Required properties:
146
147 - compatible: "aspeed,ast2500-lpc-reset" or
148 "aspeed,ast2400-lpc-reset"
149 - reg: offset and length of the IP in the LHC memory region
150 - #reset-controller indicates the number of reset cells expected
151
152Example:
153
154lpc_reset: reset-controller@18 {
155 compatible = "aspeed,ast2500-lpc-reset";
156 reg = <0x18 0x4>;
157 #reset-cells = <1>;
158};
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 7fc77696bb1e..18f152d251d7 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -83,14 +83,18 @@ config RESET_PISTACHIO
83 83
84config RESET_SIMPLE 84config RESET_SIMPLE
85 bool "Simple Reset Controller Driver" if COMPILE_TEST 85 bool "Simple Reset Controller Driver" if COMPILE_TEST
86 default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX 86 default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
87 help 87 help
88 This enables a simple reset controller driver for reset lines that 88 This enables a simple reset controller driver for reset lines that
89 that can be asserted and deasserted by toggling bits in a contiguous, 89 that can be asserted and deasserted by toggling bits in a contiguous,
90 exclusive register space. 90 exclusive register space.
91 91
92 Currently this driver supports Altera SoCFPGAs, the RCC reset 92 Currently this driver supports:
93 controller in STM32 MCUs, Allwinner SoCs, and ZTE's zx2967 family. 93 - Altera SoCFPGAs
94 - ASPEED BMC SoCs
95 - RCC reset controller in STM32 MCUs
96 - Allwinner SoCs
97 - ZTE's zx2967 family
94 98
95config RESET_SUNXI 99config RESET_SUNXI
96 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI 100 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 93cbee1ae8ef..5242e0679df7 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -124,29 +124,21 @@ static int meson_reset_deassert(struct reset_controller_dev *rcdev,
124 return meson_reset_level(rcdev, id, false); 124 return meson_reset_level(rcdev, id, false);
125} 125}
126 126
127static const struct reset_control_ops meson_reset_meson8_ops = { 127static const struct reset_control_ops meson_reset_ops = {
128 .reset = meson_reset_reset,
129};
130
131static const struct reset_control_ops meson_reset_gx_ops = {
132 .reset = meson_reset_reset, 128 .reset = meson_reset_reset,
133 .assert = meson_reset_assert, 129 .assert = meson_reset_assert,
134 .deassert = meson_reset_deassert, 130 .deassert = meson_reset_deassert,
135}; 131};
136 132
137static const struct of_device_id meson_reset_dt_ids[] = { 133static const struct of_device_id meson_reset_dt_ids[] = {
138 { .compatible = "amlogic,meson8b-reset", 134 { .compatible = "amlogic,meson8b-reset" },
139 .data = &meson_reset_meson8_ops, }, 135 { .compatible = "amlogic,meson-gxbb-reset" },
140 { .compatible = "amlogic,meson-gxbb-reset", 136 { .compatible = "amlogic,meson-axg-reset" },
141 .data = &meson_reset_gx_ops, },
142 { .compatible = "amlogic,meson-axg-reset",
143 .data = &meson_reset_gx_ops, },
144 { /* sentinel */ }, 137 { /* sentinel */ },
145}; 138};
146 139
147static int meson_reset_probe(struct platform_device *pdev) 140static int meson_reset_probe(struct platform_device *pdev)
148{ 141{
149 const struct reset_control_ops *ops;
150 struct meson_reset *data; 142 struct meson_reset *data;
151 struct resource *res; 143 struct resource *res;
152 144
@@ -154,10 +146,6 @@ static int meson_reset_probe(struct platform_device *pdev)
154 if (!data) 146 if (!data)
155 return -ENOMEM; 147 return -ENOMEM;
156 148
157 ops = of_device_get_match_data(&pdev->dev);
158 if (!ops)
159 return -EINVAL;
160
161 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 149 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
162 data->reg_base = devm_ioremap_resource(&pdev->dev, res); 150 data->reg_base = devm_ioremap_resource(&pdev->dev, res);
163 if (IS_ERR(data->reg_base)) 151 if (IS_ERR(data->reg_base))
@@ -169,7 +157,7 @@ static int meson_reset_probe(struct platform_device *pdev)
169 157
170 data->rcdev.owner = THIS_MODULE; 158 data->rcdev.owner = THIS_MODULE;
171 data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG; 159 data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG;
172 data->rcdev.ops = ops; 160 data->rcdev.ops = &meson_reset_ops;
173 data->rcdev.of_node = pdev->dev.of_node; 161 data->rcdev.of_node = pdev->dev.of_node;
174 162
175 return devm_reset_controller_register(&pdev->dev, &data->rcdev); 163 return devm_reset_controller_register(&pdev->dev, &data->rcdev);
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 2d4f362ef025..f7ce8910a392 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -125,6 +125,8 @@ static const struct of_device_id reset_simple_dt_ids[] = {
125 .data = &reset_simple_active_low }, 125 .data = &reset_simple_active_low },
126 { .compatible = "zte,zx296718-reset", 126 { .compatible = "zte,zx296718-reset",
127 .data = &reset_simple_active_low }, 127 .data = &reset_simple_active_low },
128 { .compatible = "aspeed,ast2400-lpc-reset" },
129 { .compatible = "aspeed,ast2500-lpc-reset" },
128 { /* sentinel */ }, 130 { /* sentinel */ },
129}; 131};
130 132