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author | Łukasz Stelmach <l.stelmach@samsung.com> | 2018-04-03 04:04:57 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@armlinux.org.uk> | 2018-05-19 06:35:56 -0400 |
commit | e07e3c33b9c0b5751ade624f44325c9bf2487ea6 (patch) | |
tree | 7f5c7bd5ea61b04701f04f7fe924b588e3f7f444 | |
parent | 60cc43fc888428bb2f18f08997432d426a243338 (diff) |
ARM: 8753/1: decompressor: add a missing parameter to the addruart macro
In commit 639da5ee374b ("ARM: add an extra temp register to the low
level debugging addruart macro") an additional temporary register was
added to the addruart macro, but the decompressor code wasn't updated.
Fixes: 639da5ee374b ("ARM: add an extra temp register to the low level debugging addruart macro")
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
-rw-r--r-- | arch/arm/boot/compressed/head.S | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 45c8823c3750..182bf6add0b9 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
@@ -29,19 +29,19 @@ | |||
29 | #if defined(CONFIG_DEBUG_ICEDCC) | 29 | #if defined(CONFIG_DEBUG_ICEDCC) |
30 | 30 | ||
31 | #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) | 31 | #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) |
32 | .macro loadsp, rb, tmp | 32 | .macro loadsp, rb, tmp1, tmp2 |
33 | .endm | 33 | .endm |
34 | .macro writeb, ch, rb | 34 | .macro writeb, ch, rb |
35 | mcr p14, 0, \ch, c0, c5, 0 | 35 | mcr p14, 0, \ch, c0, c5, 0 |
36 | .endm | 36 | .endm |
37 | #elif defined(CONFIG_CPU_XSCALE) | 37 | #elif defined(CONFIG_CPU_XSCALE) |
38 | .macro loadsp, rb, tmp | 38 | .macro loadsp, rb, tmp1, tmp2 |
39 | .endm | 39 | .endm |
40 | .macro writeb, ch, rb | 40 | .macro writeb, ch, rb |
41 | mcr p14, 0, \ch, c8, c0, 0 | 41 | mcr p14, 0, \ch, c8, c0, 0 |
42 | .endm | 42 | .endm |
43 | #else | 43 | #else |
44 | .macro loadsp, rb, tmp | 44 | .macro loadsp, rb, tmp1, tmp2 |
45 | .endm | 45 | .endm |
46 | .macro writeb, ch, rb | 46 | .macro writeb, ch, rb |
47 | mcr p14, 0, \ch, c1, c0, 0 | 47 | mcr p14, 0, \ch, c1, c0, 0 |
@@ -57,7 +57,7 @@ | |||
57 | .endm | 57 | .endm |
58 | 58 | ||
59 | #if defined(CONFIG_ARCH_SA1100) | 59 | #if defined(CONFIG_ARCH_SA1100) |
60 | .macro loadsp, rb, tmp | 60 | .macro loadsp, rb, tmp1, tmp2 |
61 | mov \rb, #0x80000000 @ physical base address | 61 | mov \rb, #0x80000000 @ physical base address |
62 | #ifdef CONFIG_DEBUG_LL_SER3 | 62 | #ifdef CONFIG_DEBUG_LL_SER3 |
63 | add \rb, \rb, #0x00050000 @ Ser3 | 63 | add \rb, \rb, #0x00050000 @ Ser3 |
@@ -66,8 +66,8 @@ | |||
66 | #endif | 66 | #endif |
67 | .endm | 67 | .endm |
68 | #else | 68 | #else |
69 | .macro loadsp, rb, tmp | 69 | .macro loadsp, rb, tmp1, tmp2 |
70 | addruart \rb, \tmp | 70 | addruart \rb, \tmp1, \tmp2 |
71 | .endm | 71 | .endm |
72 | #endif | 72 | #endif |
73 | #endif | 73 | #endif |
@@ -1297,7 +1297,7 @@ phex: adr r3, phexbuf | |||
1297 | b 1b | 1297 | b 1b |
1298 | 1298 | ||
1299 | @ puts corrupts {r0, r1, r2, r3} | 1299 | @ puts corrupts {r0, r1, r2, r3} |
1300 | puts: loadsp r3, r1 | 1300 | puts: loadsp r3, r2, r1 |
1301 | 1: ldrb r2, [r0], #1 | 1301 | 1: ldrb r2, [r0], #1 |
1302 | teq r2, #0 | 1302 | teq r2, #0 |
1303 | moveq pc, lr | 1303 | moveq pc, lr |
@@ -1314,8 +1314,8 @@ puts: loadsp r3, r1 | |||
1314 | @ putc corrupts {r0, r1, r2, r3} | 1314 | @ putc corrupts {r0, r1, r2, r3} |
1315 | putc: | 1315 | putc: |
1316 | mov r2, r0 | 1316 | mov r2, r0 |
1317 | loadsp r3, r1, r0 | ||
1317 | mov r0, #0 | 1318 | mov r0, #0 |
1318 | loadsp r3, r1 | ||
1319 | b 2b | 1319 | b 2b |
1320 | 1320 | ||
1321 | @ memdump corrupts {r0, r1, r2, r3, r10, r11, r12, lr} | 1321 | @ memdump corrupts {r0, r1, r2, r3, r10, r11, r12, lr} |