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authorJonathan Hunter <jonathanh@nvidia.com>2019-05-02 09:27:21 -0400
committerThierry Reding <treding@nvidia.com>2019-05-08 08:42:51 -0400
commitdfdbf16c50d89a8cb102a5f7a1f53686fff506ad (patch)
tree6cbcbdf6b16b7d00a4650ef555d1c0da1631c447
parent2f03e39b5bfe41f3a0d9a8b01231e7e5045cb9c4 (diff)
arm64: tegra: Fix insecure SMMU users for Tegra186
Commit 954a03be033c ("iommu/arm-smmu: Break insecure users by disabling bypass by default") intentionally breaks all devices using the SMMU in bypass mode. This is breaking various devices on Tegra186 which include the ethernet, BPMP and HDA device. Fix this by populating the iommus property for these devices with their stream ID. Fixes: 954a03be033c ("iommu/arm-smmu: Break insecure users by disabling bypass by default") Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra186.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index f0bb6ced4976..3fb60f6f3a93 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -60,6 +60,7 @@
60 clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref"; 60 clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";
61 resets = <&bpmp TEGRA186_RESET_EQOS>; 61 resets = <&bpmp TEGRA186_RESET_EQOS>;
62 reset-names = "eqos"; 62 reset-names = "eqos";
63 iommus = <&smmu TEGRA186_SID_EQOS>;
63 status = "disabled"; 64 status = "disabled";
64 65
65 snps,write-requests = <1>; 66 snps,write-requests = <1>;
@@ -338,6 +339,7 @@
338 <&bpmp TEGRA186_RESET_HDA2CODEC_2X>; 339 <&bpmp TEGRA186_RESET_HDA2CODEC_2X>;
339 reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 340 reset-names = "hda", "hda2hdmi", "hda2codec_2x";
340 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>; 341 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
342 iommus = <&smmu TEGRA186_SID_HDA>;
341 status = "disabled"; 343 status = "disabled";
342 }; 344 };
343 345
@@ -1158,6 +1160,7 @@
1158 1160
1159 bpmp: bpmp { 1161 bpmp: bpmp {
1160 compatible = "nvidia,tegra186-bpmp"; 1162 compatible = "nvidia,tegra186-bpmp";
1163 iommus = <&smmu TEGRA186_SID_BPMP>;
1161 mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB 1164 mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB
1162 TEGRA_HSP_DB_MASTER_BPMP>; 1165 TEGRA_HSP_DB_MASTER_BPMP>;
1163 shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>; 1166 shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>;