diff options
author | Mike Leach <mike.leach@linaro.org> | 2017-08-02 12:22:19 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-08-28 11:35:43 -0400 |
commit | df770ff0586a494fabe68ffbe2898d7df5666663 (patch) | |
tree | 4ad7e71b3ba91349f08111a3c2bb431d0277fd47 | |
parent | 4da69f49e73e3c79f079de62ea940cabbbf15ae7 (diff) |
perf: cs-etm: Fix ETMv4 CONFIGR entry in perf.data file
The value passed into the perf.data file for the CONFIGR register in ETMv4
was incorrectly being set to the command line options/ETMv3 value.
Adds bit definitions and function to remap this value to the correct ETMv4
CONFIGR bit values for all selected options.
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | include/linux/coresight-pmu.h | 5 | ||||
-rw-r--r-- | tools/include/linux/coresight-pmu.h | 5 | ||||
-rw-r--r-- | tools/perf/arch/arm/util/cs-etm.c | 28 |
3 files changed, 37 insertions, 1 deletions
diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h index 45852c2cd096..edfeaba95429 100644 --- a/include/linux/coresight-pmu.h +++ b/include/linux/coresight-pmu.h | |||
@@ -26,6 +26,11 @@ | |||
26 | #define ETM_OPT_TS 28 | 26 | #define ETM_OPT_TS 28 |
27 | #define ETM_OPT_RETSTK 29 | 27 | #define ETM_OPT_RETSTK 29 |
28 | 28 | ||
29 | /* ETMv4 CONFIGR programming bits for the ETM OPTs */ | ||
30 | #define ETM4_CFG_BIT_CYCACC 4 | ||
31 | #define ETM4_CFG_BIT_TS 11 | ||
32 | #define ETM4_CFG_BIT_RETSTK 12 | ||
33 | |||
29 | static inline int coresight_get_trace_id(int cpu) | 34 | static inline int coresight_get_trace_id(int cpu) |
30 | { | 35 | { |
31 | /* | 36 | /* |
diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h index 45852c2cd096..edfeaba95429 100644 --- a/tools/include/linux/coresight-pmu.h +++ b/tools/include/linux/coresight-pmu.h | |||
@@ -26,6 +26,11 @@ | |||
26 | #define ETM_OPT_TS 28 | 26 | #define ETM_OPT_TS 28 |
27 | #define ETM_OPT_RETSTK 29 | 27 | #define ETM_OPT_RETSTK 29 |
28 | 28 | ||
29 | /* ETMv4 CONFIGR programming bits for the ETM OPTs */ | ||
30 | #define ETM4_CFG_BIT_CYCACC 4 | ||
31 | #define ETM4_CFG_BIT_TS 11 | ||
32 | #define ETM4_CFG_BIT_RETSTK 12 | ||
33 | |||
29 | static inline int coresight_get_trace_id(int cpu) | 34 | static inline int coresight_get_trace_id(int cpu) |
30 | { | 35 | { |
31 | /* | 36 | /* |
diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c index 7ce3d1a25133..fbfc055d3f4d 100644 --- a/tools/perf/arch/arm/util/cs-etm.c +++ b/tools/perf/arch/arm/util/cs-etm.c | |||
@@ -266,6 +266,32 @@ static u64 cs_etm_get_config(struct auxtrace_record *itr) | |||
266 | return config; | 266 | return config; |
267 | } | 267 | } |
268 | 268 | ||
269 | #ifndef BIT | ||
270 | #define BIT(N) (1UL << (N)) | ||
271 | #endif | ||
272 | |||
273 | static u64 cs_etmv4_get_config(struct auxtrace_record *itr) | ||
274 | { | ||
275 | u64 config = 0; | ||
276 | u64 config_opts = 0; | ||
277 | |||
278 | /* | ||
279 | * The perf event variable config bits represent both | ||
280 | * the command line options and register programming | ||
281 | * bits in ETMv3/PTM. For ETMv4 we must remap options | ||
282 | * to real bits | ||
283 | */ | ||
284 | config_opts = cs_etm_get_config(itr); | ||
285 | if (config_opts & BIT(ETM_OPT_CYCACC)) | ||
286 | config |= BIT(ETM4_CFG_BIT_CYCACC); | ||
287 | if (config_opts & BIT(ETM_OPT_TS)) | ||
288 | config |= BIT(ETM4_CFG_BIT_TS); | ||
289 | if (config_opts & BIT(ETM_OPT_RETSTK)) | ||
290 | config |= BIT(ETM4_CFG_BIT_RETSTK); | ||
291 | |||
292 | return config; | ||
293 | } | ||
294 | |||
269 | static size_t | 295 | static size_t |
270 | cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused, | 296 | cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused, |
271 | struct perf_evlist *evlist __maybe_unused) | 297 | struct perf_evlist *evlist __maybe_unused) |
@@ -363,7 +389,7 @@ static void cs_etm_get_metadata(int cpu, u32 *offset, | |||
363 | magic = __perf_cs_etmv4_magic; | 389 | magic = __perf_cs_etmv4_magic; |
364 | /* Get trace configuration register */ | 390 | /* Get trace configuration register */ |
365 | info->priv[*offset + CS_ETMV4_TRCCONFIGR] = | 391 | info->priv[*offset + CS_ETMV4_TRCCONFIGR] = |
366 | cs_etm_get_config(itr); | 392 | cs_etmv4_get_config(itr); |
367 | /* Get traceID from the framework */ | 393 | /* Get traceID from the framework */ |
368 | info->priv[*offset + CS_ETMV4_TRCTRACEIDR] = | 394 | info->priv[*offset + CS_ETMV4_TRCTRACEIDR] = |
369 | coresight_get_trace_id(cpu); | 395 | coresight_get_trace_id(cpu); |