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authorAbhimanyu Saini <abhimanyu.saini@nxp.com>2017-02-01 01:28:36 -0500
committerShawn Guo <shawnguo@kernel.org>2017-03-07 06:27:57 -0500
commitdf72c23ea2fc62e97e8f202d77b8102eff9d296d (patch)
treeedaa26051c550888a6c2c839c74d05b9a00e115f
parentc2f6a472be3aadd4a41f4383b0a03c2cd83d825e (diff)
arm64: dts: freescale: ls2088a: Add DTS support for FSL's LS2088A SoC
This patch adds the device tree support for FSL LS2088A SoC based on ARMv8 architecture. Following levels of DTSI/DTS files have been created for the LS2088A SoC family: - fsl-ls2088a.dtsi: DTS-Include file for FSL LS2088A SoC. - fsl-ls2088a-qds.dts: DTS file for FSL LS2088A QDS board. - fsl-ls2088a-rdb.dts: DTS file for FSL LS2088A RDB board. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat
-rw-r--r--arch/arm64/boot/dts/freescale/Makefile2
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts64
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts64
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi165
4 files changed, 295 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 39db645b268e..6d5df45bd705 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -8,6 +8,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
8dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb 8dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
9dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb 9dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
10dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb 10dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
11dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
12dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
11 13
12always := $(dtb-y) 14always := $(dtb-y)
13subdir-y := $(dts-dirs) 15subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
new file mode 100644
index 000000000000..ebcd6ee4da0d
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
@@ -0,0 +1,64 @@
1/*
2 * Device Tree file for Freescale LS2088A QDS Board.
3 *
4 * Copyright (C) 2016-17, Freescale Semiconductor
5 *
6 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPLv2 or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This library is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47/dts-v1/;
48
49#include "fsl-ls2088a.dtsi"
50#include "fsl-ls208xa-qds.dtsi"
51
52/ {
53 model = "Freescale Layerscape 2088A QDS Board";
54 compatible = "fsl,ls2088a-qds", "fsl,ls2088a";
55
56 aliases {
57 serial0 = &serial0;
58 serial1 = &serial1;
59 };
60
61 chosen {
62 stdout-path = "serial0:115200n8";
63 };
64};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
new file mode 100644
index 000000000000..5992dc130faa
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
@@ -0,0 +1,64 @@
1/*
2 * Device Tree file for Freescale LS2088A RDB Board.
3 *
4 * Copyright (C) 2016-17, Freescale Semiconductor
5 *
6 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPLv2 or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This library is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47/dts-v1/;
48
49#include "fsl-ls2088a.dtsi"
50#include "fsl-ls208xa-rdb.dtsi"
51
52/ {
53 model = "Freescale Layerscape 2088A RDB Board";
54 compatible = "fsl,ls2088a-rdb", "fsl,ls2088a";
55
56 aliases {
57 serial0 = &serial0;
58 serial1 = &serial1;
59 };
60
61 chosen {
62 stdout-path = "serial1:115200n8";
63 };
64};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
new file mode 100644
index 000000000000..33ce404cf7e4
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
@@ -0,0 +1,165 @@
1/*
2 * Device Tree Include file for Freescale Layerscape-2088A family SoC.
3 *
4 * Copyright (C) 2016-17, Freescale Semiconductor
5 *
6 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPLv2 or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This library is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47#include "fsl-ls208xa.dtsi"
48
49&cpu {
50 cpu0: cpu@0 {
51 device_type = "cpu";
52 compatible = "arm,cortex-a72";
53 reg = <0x0>;
54 clocks = <&clockgen 1 0>;
55 next-level-cache = <&cluster0_l2>;
56 #cooling-cells = <2>;
57 };
58
59 cpu1: cpu@1 {
60 device_type = "cpu";
61 compatible = "arm,cortex-a72";
62 reg = <0x1>;
63 clocks = <&clockgen 1 0>;
64 next-level-cache = <&cluster0_l2>;
65 };
66
67 cpu2: cpu@100 {
68 device_type = "cpu";
69 compatible = "arm,cortex-a72";
70 reg = <0x100>;
71 clocks = <&clockgen 1 1>;
72 next-level-cache = <&cluster1_l2>;
73 #cooling-cells = <2>;
74 };
75
76 cpu3: cpu@101 {
77 device_type = "cpu";
78 compatible = "arm,cortex-a72";
79 reg = <0x101>;
80 clocks = <&clockgen 1 1>;
81 next-level-cache = <&cluster1_l2>;
82 };
83
84 cpu4: cpu@200 {
85 device_type = "cpu";
86 compatible = "arm,cortex-a72";
87 reg = <0x200>;
88 clocks = <&clockgen 1 2>;
89 next-level-cache = <&cluster2_l2>;
90 #cooling-cells = <2>;
91 };
92
93 cpu5: cpu@201 {
94 device_type = "cpu";
95 compatible = "arm,cortex-a72";
96 reg = <0x201>;
97 clocks = <&clockgen 1 2>;
98 next-level-cache = <&cluster2_l2>;
99 };
100
101 cpu6: cpu@300 {
102 device_type = "cpu";
103 compatible = "arm,cortex-a72";
104 reg = <0x300>;
105 clocks = <&clockgen 1 3>;
106 next-level-cache = <&cluster3_l2>;
107 #cooling-cells = <2>;
108 };
109
110 cpu7: cpu@301 {
111 device_type = "cpu";
112 compatible = "arm,cortex-a72";
113 reg = <0x301>;
114 clocks = <&clockgen 1 3>;
115 next-level-cache = <&cluster3_l2>;
116 };
117
118 cluster0_l2: l2-cache0 {
119 compatible = "cache";
120 };
121
122 cluster1_l2: l2-cache1 {
123 compatible = "cache";
124 };
125
126 cluster2_l2: l2-cache2 {
127 compatible = "cache";
128 };
129
130 cluster3_l2: l2-cache3 {
131 compatible = "cache";
132 };
133};
134
135&pcie1 {
136 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
137 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
138
139 ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000
140 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>;
141};
142
143&pcie2 {
144 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
145 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
146
147 ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000
148 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>;
149};
150
151&pcie3 {
152 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
153 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
154
155 ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000
156 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>;
157};
158
159&pcie4 {
160 reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
161 0x38 0x00000000 0x0 0x00002000>; /* configuration space */
162
163 ranges = <0x81000000 0x0 0x00000000 0x38 0x00010000 0x0 0x00010000
164 0x82000000 0x0 0x40000000 0x38 0x40000000 0x0 0x40000000>;
165};
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