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authorWill Deacon <will.deacon@arm.com>2015-03-17 08:15:02 -0400
committerWill Deacon <will.deacon@arm.com>2015-09-17 06:57:03 -0400
commitdf057cc7b4fa59e9b55f07ffdb6c62bf02e99a00 (patch)
tree866dd49a0acc98317cc3866738f3b417f44eccf2
parentbdec97a855ef1e239f130f7a11584721c9a1bf04 (diff)
arm64: errata: add module build workaround for erratum #843419
Cortex-A53 processors <= r0p4 are affected by erratum #843419 which can lead to a memory access using an incorrect address in certain sequences headed by an ADRP instruction. There is a linker fix to generate veneers for ADRP instructions, but this doesn't work for kernel modules which are built as unlinked ELF objects. This patch adds a new config option for the erratum which, when enabled, builds kernel modules with the mcmodel=large flag. This uses absolute addressing for all kernel symbols, thereby removing the use of ADRP as a PC-relative form of addressing. The ADRP relocs are removed from the module loader so that we fail to load any potentially affected modules. Cc: <stable@vger.kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
-rw-r--r--arch/arm64/Kconfig16
-rw-r--r--arch/arm64/Makefile4
-rw-r--r--arch/arm64/kernel/module.c2
3 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 8b6e378992d2..07d1811aa03f 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -332,6 +332,22 @@ config ARM64_ERRATUM_845719
332 332
333 If unsure, say Y. 333 If unsure, say Y.
334 334
335config ARM64_ERRATUM_843419
336 bool "Cortex-A53: 843419: A load or store might access an incorrect address"
337 depends on MODULES
338 default y
339 help
340 This option builds kernel modules using the large memory model in
341 order to avoid the use of the ADRP instruction, which can cause
342 a subsequent memory access to use an incorrect address on Cortex-A53
343 parts up to r0p4.
344
345 Note that the kernel itself must be linked with a version of ld
346 which fixes potentially affected ADRP instructions through the
347 use of veneers.
348
349 If unsure, say Y.
350
335endmenu 351endmenu
336 352
337 353
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 15ff5b4156fd..f9914d7c1bb0 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -41,6 +41,10 @@ endif
41 41
42CHECKFLAGS += -D__aarch64__ 42CHECKFLAGS += -D__aarch64__
43 43
44ifeq ($(CONFIG_ARM64_ERRATUM_843419), y)
45CFLAGS_MODULE += -mcmodel=large
46endif
47
44# Default value 48# Default value
45head-y := arch/arm64/kernel/head.o 49head-y := arch/arm64/kernel/head.o
46 50
diff --git a/arch/arm64/kernel/module.c b/arch/arm64/kernel/module.c
index 67bf4107f6ef..876eb8df50bf 100644
--- a/arch/arm64/kernel/module.c
+++ b/arch/arm64/kernel/module.c
@@ -332,12 +332,14 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
332 ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 0, 21, 332 ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 0, 21,
333 AARCH64_INSN_IMM_ADR); 333 AARCH64_INSN_IMM_ADR);
334 break; 334 break;
335#ifndef CONFIG_ARM64_ERRATUM_843419
335 case R_AARCH64_ADR_PREL_PG_HI21_NC: 336 case R_AARCH64_ADR_PREL_PG_HI21_NC:
336 overflow_check = false; 337 overflow_check = false;
337 case R_AARCH64_ADR_PREL_PG_HI21: 338 case R_AARCH64_ADR_PREL_PG_HI21:
338 ovf = reloc_insn_imm(RELOC_OP_PAGE, loc, val, 12, 21, 339 ovf = reloc_insn_imm(RELOC_OP_PAGE, loc, val, 12, 21,
339 AARCH64_INSN_IMM_ADR); 340 AARCH64_INSN_IMM_ADR);
340 break; 341 break;
342#endif
341 case R_AARCH64_ADD_ABS_LO12_NC: 343 case R_AARCH64_ADD_ABS_LO12_NC:
342 case R_AARCH64_LDST8_ABS_LO12_NC: 344 case R_AARCH64_LDST8_ABS_LO12_NC:
343 overflow_check = false; 345 overflow_check = false;