aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorStefan Agner <stefan@agner.ch>2015-05-27 08:47:52 -0400
committerShawn Guo <shawnguo@kernel.org>2015-08-11 11:15:25 -0400
commitdef0641e2f61a545a852887e15a19231c4c863c4 (patch)
treea28a37c39339d45fa91cfc32e2f8c85931126a95
parentabb9f253cd9873f1826c4accdad89ec3fe80de21 (diff)
ARM: dts: add property for maximum ADC clock frequencies
The ADC clock frequency is limited depending on modes used. Add device tree property which allow to set the mode used and the maximum frequency ratings for the instance. These allows to set the ADC clock to a frequency which is within specification according to the actual mode used. Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm/boot/dts/vfxxx.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index c0f05ee77ae5..6865137fd114 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -228,6 +228,8 @@
228 clock-names = "adc"; 228 clock-names = "adc";
229 #io-channel-cells = <1>; 229 #io-channel-cells = <1>;
230 status = "disabled"; 230 status = "disabled";
231 fsl,adck-max-frequency = <30000000>, <40000000>,
232 <20000000>;
231 }; 233 };
232 234
233 wdoga5: wdog@4003e000 { 235 wdoga5: wdog@4003e000 {
@@ -470,6 +472,8 @@
470 <&clks VF610_CLK_ESDHC0>; 472 <&clks VF610_CLK_ESDHC0>;
471 clock-names = "ipg", "ahb", "per"; 473 clock-names = "ipg", "ahb", "per";
472 status = "disabled"; 474 status = "disabled";
475 fsl,adck-max-frequency = <30000000>, <40000000>,
476 <20000000>;
473 }; 477 };
474 478
475 esdhc1: esdhc@400b2000 { 479 esdhc1: esdhc@400b2000 {