aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLeonard Crestez <leonard.crestez@nxp.com>2018-07-11 15:30:02 -0400
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2018-10-05 04:56:19 -0400
commitde248327091e7ab02f751cb288fc7cf7edbb0461 (patch)
treef36b500a8cf08bef4695631b4715a8aeab866b7d
parent6870b673509779195cab300aedc844b352d9cfbc (diff)
reset: imx7: Add PCIE_CTRL_APPS_TURNOFF
This is required for the imx pci driver to send the PME_Turn_Off TLP. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org>
-rw-r--r--drivers/reset/reset-imx7.c1
-rw-r--r--include/dt-bindings/reset/imx7-reset.h4
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index 97d9f08271c5..77911fa8f31d 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -67,6 +67,7 @@ static const struct imx7_src_signal imx7_src_signals[IMX7_RESET_NUM] = {
67 [IMX7_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR, BIT(2) | BIT(1) }, 67 [IMX7_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR, BIT(2) | BIT(1) },
68 [IMX7_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) }, 68 [IMX7_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) },
69 [IMX7_RESET_PCIE_CTRL_APPS_EN] = { SRC_PCIEPHY_RCR, BIT(6) }, 69 [IMX7_RESET_PCIE_CTRL_APPS_EN] = { SRC_PCIEPHY_RCR, BIT(6) },
70 [IMX7_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) },
70 [IMX7_RESET_DDRC_PRST] = { SRC_DDRC_RCR, BIT(0) }, 71 [IMX7_RESET_DDRC_PRST] = { SRC_DDRC_RCR, BIT(0) },
71 [IMX7_RESET_DDRC_CORE_RST] = { SRC_DDRC_RCR, BIT(1) }, 72 [IMX7_RESET_DDRC_CORE_RST] = { SRC_DDRC_RCR, BIT(1) },
72}; 73};
diff --git a/include/dt-bindings/reset/imx7-reset.h b/include/dt-bindings/reset/imx7-reset.h
index 63948170c7b2..31b3f87dde9a 100644
--- a/include/dt-bindings/reset/imx7-reset.h
+++ b/include/dt-bindings/reset/imx7-reset.h
@@ -56,7 +56,9 @@
56#define IMX7_RESET_DDRC_PRST 23 56#define IMX7_RESET_DDRC_PRST 23
57#define IMX7_RESET_DDRC_CORE_RST 24 57#define IMX7_RESET_DDRC_CORE_RST 24
58 58
59#define IMX7_RESET_NUM 25 59#define IMX7_RESET_PCIE_CTRL_APPS_TURNOFF 25
60
61#define IMX7_RESET_NUM 26
60 62
61#endif 63#endif
62 64