drm/tegra: dsi: Add Tegra210 support

The DSI host controller hasn't changed from Tegra132 to Tegra210, but
different characterization parameters may be required.

Signed-off-by: Thierry Reding <treding@nvidia.com>

3 files changed, 10 insertions, 0 deletions

diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 3b8988258188..1993ab90226a 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -1059,6 +1059,7 @@ static const struct of_device_id host1x_drm_subdevs[] = {
         { .compatible = "nvidia,tegra124-dsi", },
         { .compatible = "nvidia,tegra132-dsi", },
         { .compatible = "nvidia,tegra210-dc", },
+        { .compatible = "nvidia,tegra210-dsi", },
         { /* sentinel */ }
 };
 
diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index bc0dbf4dc776..eced05f09edc 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -997,6 +997,10 @@ static int tegra_dsi_pad_calibrate(struct tegra_dsi *dsi)
                 DSI_PAD_OUT_CLK(0x0);
         tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_2);
 
+        value = DSI_PAD_PREEMP_PD_CLK(0x3) | DSI_PAD_PREEMP_PU_CLK(0x3) |
+                DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3);
+        tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_3);
+
         return tegra_mipi_calibrate(dsi->mipi);
 }
 
@@ -1626,6 +1630,7 @@ static int tegra_dsi_remove(struct platform_device *pdev)
 }
 
 static const struct of_device_id tegra_dsi_of_match[] = {
+        { .compatible = "nvidia,tegra210-dsi", },
         { .compatible = "nvidia,tegra132-dsi", },
         { .compatible = "nvidia,tegra124-dsi", },
         { .compatible = "nvidia,tegra114-dsi", },
diff --git a/drivers/gpu/drm/tegra/dsi.h b/drivers/gpu/drm/tegra/dsi.h
index bad1006a5150..219263615399 100644
--- a/drivers/gpu/drm/tegra/dsi.h
+++ b/drivers/gpu/drm/tegra/dsi.h
@@ -113,6 +113,10 @@
 #define DSI_PAD_SLEW_DN(x)              (((x) & 0x7) << 12)
 #define DSI_PAD_SLEW_UP(x)              (((x) & 0x7) << 16)
 #define DSI_PAD_CONTROL_3               0x51
+#define  DSI_PAD_PREEMP_PD_CLK(x)       (((x) & 0x3) << 12)
+#define  DSI_PAD_PREEMP_PU_CLK(x)       (((x) & 0x3) << 8)
+#define  DSI_PAD_PREEMP_PD(x)           (((x) & 0x3) << 4)
+#define  DSI_PAD_PREEMP_PU(x)           (((x) & 0x3) << 0)
 #define DSI_PAD_CONTROL_4               0x52
 #define DSI_GANGED_MODE_CONTROL         0x53
 #define DSI_GANGED_MODE_CONTROL_ENABLE  (1 << 0)