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authorArnd Bergmann <arnd@arndb.de>2016-09-14 11:10:35 -0400
committerArnd Bergmann <arnd@arndb.de>2016-09-14 11:10:35 -0400
commitddee928d8f8c999d6c618f2b95fd56ecf4d67bb3 (patch)
tree00706c25e43d938b7cffd07615b9d1b0d2ca65d1
parentbd3af15a4e4d528bb0a0eea1daca0b818baa9fd8 (diff)
parent98e45c1675a018e1121c1244985cf80b790fb6c4 (diff)
Merge tag 'mvebu-dt64-4.9-1' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt64 for 4.9 (part 1)" from Gregory CLEMENT: - add description for the new Armada 8040 dev board - add the PIC and PMU on Armada 7K/8K * tag 'mvebu-dt64-4.9-1' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: describe the PIC and PMU on Armada 7K/8K arm64: dts: marvell: add description for the Armada 8040 dev board arm64: dts: marvell: add description for the slave CP110 in Armada 8K
Diffstat
-rw-r--r--arch/arm64/boot/dts/marvell/Makefile1
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8020.dtsi1
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-db.dts150
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040.dtsi1
-rw-r--r--arch/arm64/boot/dts/marvell/armada-ap806.dtsi14
-rw-r--r--arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi246
6 files changed, 413 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
index 308468d377d0..cf3953124cef 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-stb.dtb
5# Mvebu SoC Family 5# Mvebu SoC Family
6dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb 6dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb
7dtb-$(CONFIG_ARCH_MVEBU) += armada-7040-db.dtb 7dtb-$(CONFIG_ARCH_MVEBU) += armada-7040-db.dtb
8dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-db.dtb
8 9
9always := $(dtb-y) 10always := $(dtb-y)
10subdir-y := $(dts-dirs) 11subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/marvell/armada-8020.dtsi b/arch/arm64/boot/dts/marvell/armada-8020.dtsi
index 3753c1c6d54d..048e5cf5160e 100644
--- a/arch/arm64/boot/dts/marvell/armada-8020.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8020.dtsi
@@ -47,6 +47,7 @@
47 47
48#include "armada-ap806-dual.dtsi" 48#include "armada-ap806-dual.dtsi"
49#include "armada-cp110-master.dtsi" 49#include "armada-cp110-master.dtsi"
50#include "armada-cp110-slave.dtsi"
50 51
51/ { 52/ {
52 model = "Marvell Armada 8020"; 53 model = "Marvell Armada 8020";
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
new file mode 100644
index 000000000000..6e6f182fb297
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -0,0 +1,150 @@
1/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada 8040 Development board platform
45 */
46
47#include "armada-8040.dtsi"
48
49/ {
50 model = "Marvell Armada 8040 DB board";
51 compatible = "marvell,armada8040-db", "marvell,armada8040",
52 "marvell,armada-ap806-quad", "marvell,armada-ap806";
53
54 chosen {
55 stdout-path = "serial0:115200n8";
56 };
57
58 memory@00000000 {
59 device_type = "memory";
60 reg = <0x0 0x0 0x0 0x80000000>;
61 };
62};
63
64&i2c0 {
65 status = "okay";
66 clock-frequency = <100000>;
67};
68
69&spi0 {
70 status = "okay";
71
72 spi-flash@0 {
73 #address-cells = <1>;
74 #size-cells = <1>;
75 compatible = "jedec,spi-nor";
76 reg = <0>;
77 spi-max-frequency = <10000000>;
78
79 partitions {
80 compatible = "fixed-partitions";
81 #address-cells = <1>;
82 #size-cells = <1>;
83
84 partition@0 {
85 label = "U-Boot";
86 reg = <0 0x200000>;
87 };
88 partition@400000 {
89 label = "Filesystem";
90 reg = <0x200000 0xce0000>;
91 };
92 };
93 };
94};
95
96/* Accessible over the mini-USB CON9 connector on the main board */
97&uart0 {
98 status = "okay";
99};
100
101
102/* CON5 on CP0 expansion */
103&cpm_pcie2 {
104 status = "okay";
105};
106
107&cpm_i2c0 {
108 status = "okay";
109 clock-frequency = <100000>;
110};
111
112/* CON4 on CP0 expansion */
113&cpm_sata0 {
114 status = "okay";
115};
116
117/* CON9 on CP0 expansion */
118&cpm_usb3_0 {
119 status = "okay";
120};
121
122/* CON10 on CP0 expansion */
123&cpm_usb3_1 {
124 status = "okay";
125};
126
127/* CON5 on CP1 expansion */
128&cps_pcie2 {
129 status = "okay";
130};
131
132&cps_i2c0 {
133 status = "okay";
134 clock-frequency = <100000>;
135};
136
137/* CON4 on CP1 expansion */
138&cps_sata0 {
139 status = "okay";
140};
141
142/* CON9 on CP1 expansion */
143&cps_usb3_0 {
144 status = "okay";
145};
146
147/* CON10 on CP1 expansion */
148&cps_usb3_1 {
149 status = "okay";
150};
diff --git a/arch/arm64/boot/dts/marvell/armada-8040.dtsi b/arch/arm64/boot/dts/marvell/armada-8040.dtsi
index 8bd0d8f8ad4c..9c1b28c47683 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8040.dtsi
@@ -47,6 +47,7 @@
47 47
48#include "armada-ap806-quad.dtsi" 48#include "armada-ap806-quad.dtsi"
49#include "armada-cp110-master.dtsi" 49#include "armada-cp110-master.dtsi"
50#include "armada-cp110-slave.dtsi"
50 51
51/ { 52/ {
52 model = "Marvell Armada 8040"; 53 model = "Marvell Armada 8040";
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index eab1a42fb934..e70b9961115d 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -128,6 +128,12 @@
128 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>; 128 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
129 }; 129 };
130 130
131 pmu {
132 compatible = "arm,cortex-a72-pmu";
133 interrupt-parent = <&pic>;
134 interrupts = <17>;
135 };
136
131 odmi: odmi@300000 { 137 odmi: odmi@300000 {
132 compatible = "marvell,odmi-controller"; 138 compatible = "marvell,odmi-controller";
133 interrupt-controller; 139 interrupt-controller;
@@ -140,6 +146,14 @@
140 marvell,spi-base = <128>, <136>, <144>, <152>; 146 marvell,spi-base = <128>, <136>, <144>, <152>;
141 }; 147 };
142 148
149 pic: interrupt-controller@3f0100 {
150 compatible = "marvell,armada-8k-pic";
151 reg = <0x3f0100 0x10>;
152 #interrupt-cells = <1>;
153 interrupt-controller;
154 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
155 };
156
143 xor@400000 { 157 xor@400000 {
144 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 158 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
145 reg = <0x400000 0x1000>, 159 reg = <0x400000 0x1000>,
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
new file mode 100644
index 000000000000..6ff12016327e
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
@@ -0,0 +1,246 @@
1/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada CP110 Slave.
45 */
46
47/ {
48 cp110-slave {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 compatible = "simple-bus";
52 interrupt-parent = <&gic>;
53 ranges;
54
55 config-space {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "simple-bus";
59 interrupt-parent = <&gic>;
60 ranges = <0x0 0x0 0xf4000000 0x2000000>;
61
62 cps_syscon0: system-controller@440000 {
63 compatible = "marvell,cp110-system-controller0",
64 "syscon";
65 reg = <0x440000 0x1000>;
66 #clock-cells = <2>;
67 core-clock-output-names =
68 "cps-apll", "cps-ppv2-core", "cps-eip",
69 "cps-core", "cps-nand-core";
70 gate-clock-output-names =
71 "cps-audio", "cps-communit", "cps-nand",
72 "cps-ppv2", "cps-sdio", "cps-mg-domain",
73 "cps-mg-core", "cps-xor1", "cps-xor0",
74 "cps-gop-dp", "none", "cps-pcie_x10",
75 "cps-pcie_x11", "cps-pcie_x4", "cps-pcie-xor",
76 "cps-sata", "cps-sata-usb", "cps-main",
77 "cps-sd-mmc", "none", "none",
78 "cps-slow-io", "cps-usb3h0", "cps-usb3h1",
79 "cps-usb3dev", "cps-eip150", "cps-eip197";
80 };
81
82 cps_sata0: sata@540000 {
83 compatible = "marvell,armada-8k-ahci";
84 reg = <0x540000 0x30000>;
85 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
86 clocks = <&cps_syscon0 1 15>;
87 status = "disabled";
88 };
89
90 cps_usb3_0: usb3@500000 {
91 compatible = "marvell,armada-8k-xhci",
92 "generic-xhci";
93 reg = <0x500000 0x4000>;
94 dma-coherent;
95 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
96 clocks = <&cps_syscon0 1 22>;
97 status = "disabled";
98 };
99
100 cps_usb3_1: usb3@510000 {
101 compatible = "marvell,armada-8k-xhci",
102 "generic-xhci";
103 reg = <0x510000 0x4000>;
104 dma-coherent;
105 interrupts = <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
106 clocks = <&cps_syscon0 1 23>;
107 status = "disabled";
108 };
109
110 cps_xor0: xor@6a0000 {
111 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
112 reg = <0x6a0000 0x1000>,
113 <0x6b0000 0x1000>;
114 dma-coherent;
115 msi-parent = <&gic_v2m0>;
116 clocks = <&cps_syscon0 1 8>;
117 };
118
119 cps_xor1: xor@6c0000 {
120 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
121 reg = <0x6c0000 0x1000>,
122 <0x6d0000 0x1000>;
123 dma-coherent;
124 msi-parent = <&gic_v2m0>;
125 clocks = <&cps_syscon0 1 7>;
126 };
127
128 cps_spi0: spi@700600 {
129 compatible = "marvell,armada-380-spi";
130 reg = <0x700600 0x50>;
131 #address-cells = <0x1>;
132 #size-cells = <0x0>;
133 cell-index = <1>;
134 clocks = <&cps_syscon0 0 3>;
135 status = "disabled";
136 };
137
138 cps_spi1: spi@700680 {
139 compatible = "marvell,armada-380-spi";
140 reg = <0x700680 0x50>;
141 #address-cells = <1>;
142 #size-cells = <0>;
143 cell-index = <2>;
144 clocks = <&cps_syscon0 1 21>;
145 status = "disabled";
146 };
147
148 cps_i2c0: i2c@701000 {
149 compatible = "marvell,mv78230-i2c";
150 reg = <0x701000 0x20>;
151 #address-cells = <1>;
152 #size-cells = <0>;
153 interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
154 clocks = <&cps_syscon0 1 21>;
155 status = "disabled";
156 };
157
158 cps_i2c1: i2c@701100 {
159 compatible = "marvell,mv78230-i2c";
160 reg = <0x701100 0x20>;
161 #address-cells = <1>;
162 #size-cells = <0>;
163 interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
164 clocks = <&cps_syscon0 1 21>;
165 status = "disabled";
166 };
167 };
168
169 cps_pcie0: pcie@f4600000 {
170 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
171 reg = <0 0xf4600000 0 0x10000>,
172 <0 0xfaf00000 0 0x80000>;
173 reg-names = "ctrl", "config";
174 #address-cells = <3>;
175 #size-cells = <2>;
176 #interrupt-cells = <1>;
177 device_type = "pci";
178 dma-coherent;
179
180 bus-range = <0 0xff>;
181 ranges =
182 /* downstream I/O */
183 <0x81000000 0 0xfd000000 0 0xfd000000 0 0x10000
184 /* non-prefetchable memory */
185 0x82000000 0 0xfa000000 0 0xfa000000 0 0xf00000>;
186 interrupt-map-mask = <0 0 0 0>;
187 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
188 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
189 num-lanes = <1>;
190 clocks = <&cps_syscon0 1 13>;
191 status = "disabled";
192 };
193
194 cps_pcie1: pcie@f4620000 {
195 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
196 reg = <0 0xf4620000 0 0x10000>,
197 <0 0xfbf00000 0 0x80000>;
198 reg-names = "ctrl", "config";
199 #address-cells = <3>;
200 #size-cells = <2>;
201 #interrupt-cells = <1>;
202 device_type = "pci";
203 dma-coherent;
204
205 bus-range = <0 0xff>;
206 ranges =
207 /* downstream I/O */
208 <0x81000000 0 0xfd010000 0 0xfd010000 0 0x10000
209 /* non-prefetchable memory */
210 0x82000000 0 0xfb000000 0 0xfb000000 0 0xf00000>;
211 interrupt-map-mask = <0 0 0 0>;
212 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
213 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
214
215 num-lanes = <1>;
216 clocks = <&cps_syscon0 1 11>;
217 status = "disabled";
218 };
219
220 cps_pcie2: pcie@f4640000 {
221 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
222 reg = <0 0xf4640000 0 0x10000>,
223 <0 0xfcf00000 0 0x80000>;
224 reg-names = "ctrl", "config";
225 #address-cells = <3>;
226 #size-cells = <2>;
227 #interrupt-cells = <1>;
228 device_type = "pci";
229 dma-coherent;
230
231 bus-range = <0 0xff>;
232 ranges =
233 /* downstream I/O */
234 <0x81000000 0 0xfd020000 0 0xfd020000 0 0x10000
235 /* non-prefetchable memory */
236 0x82000000 0 0xfc000000 0 0xfc000000 0 0xf00000>;
237 interrupt-map-mask = <0 0 0 0>;
238 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
239 interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
240
241 num-lanes = <1>;
242 clocks = <&cps_syscon0 1 12>;
243 status = "disabled";
244 };
245 };
246};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-15 16:19:18 -0400