diff options
author | Olof Johansson <olof@lixom.net> | 2017-04-19 08:29:37 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2017-04-19 08:29:37 -0400 |
commit | dd851084754b57fdb0b6c4e1168a2289105499d5 (patch) | |
tree | 4ac59a23d83152e7d7323cfd97bf9506b8bb675c | |
parent | 9720a9a31ddac19e548d2d633564c1bf6333ecda (diff) | |
parent | b2121170143bf4708c657461740c922ce24bc94e (diff) |
Merge tag 'amlogic-dt64-redo' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64
Amlogic 64-bit DT updates for v4.12
- pinctrl: new pins for audio
- clocks: more clocks exposed for GFX, audio
- new board: Khadas Vim (S905X)
- new board: HwaCom AmazeTV (S905X)
- ethernet phy: add GPIO resets
* tag 'amlogic-dt64-redo' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (41 commits)
ARM64: dts: meson-gx: Add support for HDMI output
ARM64: dts: meson-gx: Add shared CMA dma memory pool
ARM64: dts: meson-gxbb-odroidc2: Enable SARADC node
dt-bindings: clock: gxbb-clkc: Add GXL compatible variant
clk: meson-gxbb: Expose GP0 dt-bindings clock id
clk: meson-gxbb: Add MALI clock IDS
dt-bindings: clk: gxbb: expose i2s output clock gates
ARM64: dts: meson-gxl: add spdif output pins
ARM64: dts: meson-gxl: add i2s output pins
ARM64: dts: meson-gxbb: add spdif output pins
ARM64: dts: meson-gxbb: add i2s output pins
ARM64: dts: meson-gxbb: Add USB Hub GPIO hog
ARM: dts: meson8b: Add gpio-ranges properties
ARM: dts: meson8: Add gpio-ranges properties
ARM64: dts: meson-gxl: Add gpio-ranges properties
ARM64: dts: meson-gxbb: Add gpio-ranges properties
ARM64: dts: meson-gx: Add Mali nodes for GXBB and GXL
ARM64: dts: meson-gxl: Add missing pinctrl pins groups
ARM64: dts: meson-gx: Prepend GX generic compatible like other nodes
ARM64: dts: meson-gx: empty line cleanup
...
Signed-off-by: Olof Johansson <olof@lixom.net>
32 files changed, 1375 insertions, 66 deletions
diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt index c246cd2730d9..bfd5b558477d 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.txt +++ b/Documentation/devicetree/bindings/arm/amlogic.txt | |||
@@ -43,8 +43,11 @@ Board compatible values: | |||
43 | - "wetek,hub" (Meson gxbb) | 43 | - "wetek,hub" (Meson gxbb) |
44 | - "wetek,play2" (Meson gxbb) | 44 | - "wetek,play2" (Meson gxbb) |
45 | - "amlogic,p212" (Meson gxl s905x) | 45 | - "amlogic,p212" (Meson gxl s905x) |
46 | - "khadas,vim" (Meson gxl s905x) | ||
47 | |||
46 | - "amlogic,p230" (Meson gxl s905d) | 48 | - "amlogic,p230" (Meson gxl s905d) |
47 | - "amlogic,p231" (Meson gxl s905d) | 49 | - "amlogic,p231" (Meson gxl s905d) |
50 | - "hwacom,amazetv" (Meson gxl s905x) | ||
48 | - "amlogic,q200" (Meson gxm s912) | 51 | - "amlogic,q200" (Meson gxm s912) |
49 | - "amlogic,q201" (Meson gxm s912) | 52 | - "amlogic,q201" (Meson gxm s912) |
50 | - "nexbox,a95x" (Meson gxbb or Meson gxl s905x) | 53 | - "nexbox,a95x" (Meson gxbb or Meson gxl s905x) |
diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt index ce06435d28ed..a09d627b5508 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt | |||
@@ -5,7 +5,8 @@ controllers within the SoC. | |||
5 | 5 | ||
6 | Required Properties: | 6 | Required Properties: |
7 | 7 | ||
8 | - compatible: should be "amlogic,gxbb-clkc" | 8 | - compatible: should be "amlogic,gxbb-clkc" for GXBB SoC, |
9 | or "amlogic,gxl-clkc" for GXL and GXM SoC. | ||
9 | - reg: physical base address of the clock controller and length of memory | 10 | - reg: physical base address of the clock controller and length of memory |
10 | mapped region. | 11 | mapped region. |
11 | 12 | ||
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index ec0bfb9bbebd..4dcc3a7bcf2d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt | |||
@@ -136,6 +136,7 @@ holt Holt Integrated Circuits, Inc. | |||
136 | honeywell Honeywell | 136 | honeywell Honeywell |
137 | hp Hewlett Packard | 137 | hp Hewlett Packard |
138 | holtek Holtek Semiconductor, Inc. | 138 | holtek Holtek Semiconductor, Inc. |
139 | hwacom HwaCom Systems Inc. | ||
139 | i2se I2SE GmbH | 140 | i2se I2SE GmbH |
140 | ibm International Business Machines (IBM) | 141 | ibm International Business Machines (IBM) |
141 | idt Integrated Device Technologies, Inc. | 142 | idt Integrated Device Technologies, Inc. |
@@ -159,6 +160,7 @@ jedec JEDEC Solid State Technology Association | |||
159 | karo Ka-Ro electronics GmbH | 160 | karo Ka-Ro electronics GmbH |
160 | keithkoep Keith & Koep GmbH | 161 | keithkoep Keith & Koep GmbH |
161 | keymile Keymile GmbH | 162 | keymile Keymile GmbH |
163 | khadas Khadas | ||
162 | kinetic Kinetic Technologies | 164 | kinetic Kinetic Technologies |
163 | kosagi Sutajio Ko-Usagi PTE Ltd. | 165 | kosagi Sutajio Ko-Usagi PTE Ltd. |
164 | kyo Kyocera Corporation | 166 | kyo Kyocera Corporation |
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 45619f6162c5..ebc763eab195 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi | |||
@@ -106,6 +106,7 @@ | |||
106 | reg-names = "mux", "pull", "pull-enable", "gpio"; | 106 | reg-names = "mux", "pull", "pull-enable", "gpio"; |
107 | gpio-controller; | 107 | gpio-controller; |
108 | #gpio-cells = <2>; | 108 | #gpio-cells = <2>; |
109 | gpio-ranges = <&pinctrl_cbus 0 0 120>; | ||
109 | }; | 110 | }; |
110 | 111 | ||
111 | spi_nor_pins: nor { | 112 | spi_nor_pins: nor { |
@@ -148,6 +149,7 @@ | |||
148 | reg-names = "mux", "pull", "gpio"; | 149 | reg-names = "mux", "pull", "gpio"; |
149 | gpio-controller; | 150 | gpio-controller; |
150 | #gpio-cells = <2>; | 151 | #gpio-cells = <2>; |
152 | gpio-ranges = <&pinctrl_aobus 0 120 16>; | ||
151 | }; | 153 | }; |
152 | 154 | ||
153 | uart_ao_a_pins: uart_ao_a { | 155 | uart_ao_a_pins: uart_ao_a { |
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 41fd53671859..828aa49c678c 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi | |||
@@ -198,6 +198,7 @@ | |||
198 | reg-names = "mux", "pull", "pull-enable", "gpio"; | 198 | reg-names = "mux", "pull", "pull-enable", "gpio"; |
199 | gpio-controller; | 199 | gpio-controller; |
200 | #gpio-cells = <2>; | 200 | #gpio-cells = <2>; |
201 | gpio-ranges = <&pinctrl_cbus 0 0 130>; | ||
201 | }; | 202 | }; |
202 | }; | 203 | }; |
203 | 204 | ||
@@ -215,6 +216,7 @@ | |||
215 | reg-names = "mux", "pull", "gpio"; | 216 | reg-names = "mux", "pull", "gpio"; |
216 | gpio-controller; | 217 | gpio-controller; |
217 | #gpio-cells = <2>; | 218 | #gpio-cells = <2>; |
219 | gpio-ranges = <&pinctrl_aobus 0 130 16>; | ||
218 | }; | 220 | }; |
219 | 221 | ||
220 | uart_ao_a_pins: uart_ao_a { | 222 | uart_ao_a_pins: uart_ao_a { |
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 3f94bce33b7f..b9ad2db7398b 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile | |||
@@ -7,9 +7,11 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-meta.dtb | |||
7 | dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb | 7 | dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb |
8 | dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-hub.dtb | 8 | dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-hub.dtb |
9 | dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-play2.dtb | 9 | dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-play2.dtb |
10 | dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-khadas-vim.dtb | ||
10 | dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb | 11 | dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb |
11 | dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb | 12 | dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb |
12 | dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb | 13 | dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb |
14 | dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-hwacom-amazetv.dtb | ||
13 | dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb | 15 | dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb |
14 | dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb | 16 | dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb |
15 | dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb | 17 | dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb |
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi index 7a078bef04cd..a84e27622639 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | |||
@@ -98,6 +98,27 @@ | |||
98 | clocks = <&wifi32k>; | 98 | clocks = <&wifi32k>; |
99 | clock-names = "ext_clock"; | 99 | clock-names = "ext_clock"; |
100 | }; | 100 | }; |
101 | |||
102 | cvbs-connector { | ||
103 | compatible = "composite-video-connector"; | ||
104 | |||
105 | port { | ||
106 | cvbs_connector_in: endpoint { | ||
107 | remote-endpoint = <&cvbs_vdac_out>; | ||
108 | }; | ||
109 | }; | ||
110 | }; | ||
111 | |||
112 | hdmi-connector { | ||
113 | compatible = "hdmi-connector"; | ||
114 | type = "a"; | ||
115 | |||
116 | port { | ||
117 | hdmi_connector_in: endpoint { | ||
118 | remote-endpoint = <&hdmi_tx_tmds_out>; | ||
119 | }; | ||
120 | }; | ||
121 | }; | ||
101 | }; | 122 | }; |
102 | 123 | ||
103 | /* This UART is brought out to the DB9 connector */ | 124 | /* This UART is brought out to the DB9 connector */ |
@@ -188,3 +209,21 @@ | |||
188 | ðmac { | 209 | ðmac { |
189 | status = "okay"; | 210 | status = "okay"; |
190 | }; | 211 | }; |
212 | |||
213 | &cvbs_vdac_port { | ||
214 | cvbs_vdac_out: endpoint { | ||
215 | remote-endpoint = <&cvbs_connector_in>; | ||
216 | }; | ||
217 | }; | ||
218 | |||
219 | &hdmi_tx { | ||
220 | status = "okay"; | ||
221 | pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; | ||
222 | pinctrl-names = "default"; | ||
223 | }; | ||
224 | |||
225 | &hdmi_tx_tmds_port { | ||
226 | hdmi_tx_tmds_out: endpoint { | ||
227 | remote-endpoint = <&hdmi_connector_in>; | ||
228 | }; | ||
229 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi index 5d995f7724af..358eef97ec95 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi | |||
@@ -71,6 +71,14 @@ | |||
71 | reg = <0x0 0x10000000 0x0 0x200000>; | 71 | reg = <0x0 0x10000000 0x0 0x200000>; |
72 | no-map; | 72 | no-map; |
73 | }; | 73 | }; |
74 | |||
75 | linux,cma { | ||
76 | compatible = "shared-dma-pool"; | ||
77 | reusable; | ||
78 | size = <0x0 0xbc00000>; | ||
79 | alignment = <0x0 0x400000>; | ||
80 | linux,cma-default; | ||
81 | }; | ||
74 | }; | 82 | }; |
75 | 83 | ||
76 | cpus { | 84 | cpus { |
@@ -233,7 +241,7 @@ | |||
233 | }; | 241 | }; |
234 | 242 | ||
235 | i2c_A: i2c@8500 { | 243 | i2c_A: i2c@8500 { |
236 | compatible = "amlogic,meson-gxbb-i2c"; | 244 | compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; |
237 | reg = <0x0 0x08500 0x0 0x20>; | 245 | reg = <0x0 0x08500 0x0 0x20>; |
238 | interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; | 246 | interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; |
239 | #address-cells = <1>; | 247 | #address-cells = <1>; |
@@ -279,7 +287,7 @@ | |||
279 | }; | 287 | }; |
280 | 288 | ||
281 | i2c_B: i2c@87c0 { | 289 | i2c_B: i2c@87c0 { |
282 | compatible = "amlogic,meson-gxbb-i2c"; | 290 | compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; |
283 | reg = <0x0 0x087c0 0x0 0x20>; | 291 | reg = <0x0 0x087c0 0x0 0x20>; |
284 | interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; | 292 | interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; |
285 | #address-cells = <1>; | 293 | #address-cells = <1>; |
@@ -288,7 +296,7 @@ | |||
288 | }; | 296 | }; |
289 | 297 | ||
290 | i2c_C: i2c@87e0 { | 298 | i2c_C: i2c@87e0 { |
291 | compatible = "amlogic,meson-gxbb-i2c"; | 299 | compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; |
292 | reg = <0x0 0x087e0 0x0 0x20>; | 300 | reg = <0x0 0x087e0 0x0 0x20>; |
293 | interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; | 301 | interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; |
294 | #address-cells = <1>; | 302 | #address-cells = <1>; |
@@ -296,6 +304,14 @@ | |||
296 | status = "disabled"; | 304 | status = "disabled"; |
297 | }; | 305 | }; |
298 | 306 | ||
307 | spifc: spi@8c80 { | ||
308 | compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc"; | ||
309 | reg = <0x0 0x08c80 0x0 0x80>; | ||
310 | #address-cells = <1>; | ||
311 | #size-cells = <0>; | ||
312 | status = "disabled"; | ||
313 | }; | ||
314 | |||
299 | watchdog@98d0 { | 315 | watchdog@98d0 { |
300 | compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt"; | 316 | compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt"; |
301 | reg = <0x0 0x098d0 0x0 0x10>; | 317 | reg = <0x0 0x098d0 0x0 0x10>; |
@@ -317,7 +333,7 @@ | |||
317 | }; | 333 | }; |
318 | 334 | ||
319 | sram: sram@c8000000 { | 335 | sram: sram@c8000000 { |
320 | compatible = "amlogic,meson-gxbb-sram", "mmio-sram"; | 336 | compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram"; |
321 | reg = <0x0 0xc8000000 0x0 0x14000>; | 337 | reg = <0x0 0xc8000000 0x0 0x14000>; |
322 | 338 | ||
323 | #address-cells = <1>; | 339 | #address-cells = <1>; |
@@ -325,12 +341,12 @@ | |||
325 | ranges = <0 0x0 0xc8000000 0x14000>; | 341 | ranges = <0 0x0 0xc8000000 0x14000>; |
326 | 342 | ||
327 | cpu_scp_lpri: scp-shmem@0 { | 343 | cpu_scp_lpri: scp-shmem@0 { |
328 | compatible = "amlogic,meson-gxbb-scp-shmem"; | 344 | compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem"; |
329 | reg = <0x13000 0x400>; | 345 | reg = <0x13000 0x400>; |
330 | }; | 346 | }; |
331 | 347 | ||
332 | cpu_scp_hpri: scp-shmem@200 { | 348 | cpu_scp_hpri: scp-shmem@200 { |
333 | compatible = "amlogic,meson-gxbb-scp-shmem"; | 349 | compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem"; |
334 | reg = <0x13400 0x400>; | 350 | reg = <0x13400 0x400>; |
335 | }; | 351 | }; |
336 | }; | 352 | }; |
@@ -342,6 +358,13 @@ | |||
342 | #size-cells = <2>; | 358 | #size-cells = <2>; |
343 | ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; | 359 | ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; |
344 | 360 | ||
361 | clkc_AO: clock-controller@040 { | ||
362 | compatible = "amlogic,gx-aoclkc", "amlogic,gxbb-aoclkc"; | ||
363 | reg = <0x0 0x00040 0x0 0x4>; | ||
364 | #clock-cells = <1>; | ||
365 | #reset-cells = <1>; | ||
366 | }; | ||
367 | |||
345 | uart_AO: serial@4c0 { | 368 | uart_AO: serial@4c0 { |
346 | compatible = "amlogic,meson-uart"; | 369 | compatible = "amlogic,meson-uart"; |
347 | reg = <0x0 0x004c0 0x0 0x14>; | 370 | reg = <0x0 0x004c0 0x0 0x14>; |
@@ -358,6 +381,15 @@ | |||
358 | status = "disabled"; | 381 | status = "disabled"; |
359 | }; | 382 | }; |
360 | 383 | ||
384 | i2c_AO: i2c@500 { | ||
385 | compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; | ||
386 | reg = <0x0 0x500 0x0 0x20>; | ||
387 | interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; | ||
388 | #address-cells = <1>; | ||
389 | #size-cells = <0>; | ||
390 | status = "disabled"; | ||
391 | }; | ||
392 | |||
361 | pwm_AO_ab: pwm@550 { | 393 | pwm_AO_ab: pwm@550 { |
362 | compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; | 394 | compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; |
363 | reg = <0x0 0x00550 0x0 0x10>; | 395 | reg = <0x0 0x00550 0x0 0x10>; |
@@ -366,7 +398,7 @@ | |||
366 | }; | 398 | }; |
367 | 399 | ||
368 | ir: ir@580 { | 400 | ir: ir@580 { |
369 | compatible = "amlogic,meson-gxbb-ir"; | 401 | compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir"; |
370 | reg = <0x0 0x00580 0x0 0x40>; | 402 | reg = <0x0 0x00580 0x0 0x40>; |
371 | interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; | 403 | interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; |
372 | status = "disabled"; | 404 | status = "disabled"; |
@@ -386,7 +418,6 @@ | |||
386 | }; | 418 | }; |
387 | }; | 419 | }; |
388 | 420 | ||
389 | |||
390 | hiubus: hiubus@c883c000 { | 421 | hiubus: hiubus@c883c000 { |
391 | compatible = "simple-bus"; | 422 | compatible = "simple-bus"; |
392 | reg = <0x0 0xc883c000 0x0 0x2000>; | 423 | reg = <0x0 0xc883c000 0x0 0x2000>; |
@@ -410,7 +441,6 @@ | |||
410 | 0x0 0xc8834540 0x0 0x4>; | 441 | 0x0 0xc8834540 0x0 0x4>; |
411 | interrupts = <0 8 1>; | 442 | interrupts = <0 8 1>; |
412 | interrupt-names = "macirq"; | 443 | interrupt-names = "macirq"; |
413 | phy-mode = "rgmii"; | ||
414 | status = "disabled"; | 444 | status = "disabled"; |
415 | }; | 445 | }; |
416 | 446 | ||
@@ -457,6 +487,38 @@ | |||
457 | cvbs_vdac_port: port@0 { | 487 | cvbs_vdac_port: port@0 { |
458 | reg = <0>; | 488 | reg = <0>; |
459 | }; | 489 | }; |
490 | |||
491 | /* HDMI-TX output port */ | ||
492 | hdmi_tx_port: port@1 { | ||
493 | reg = <1>; | ||
494 | |||
495 | hdmi_tx_out: endpoint { | ||
496 | remote-endpoint = <&hdmi_tx_in>; | ||
497 | }; | ||
498 | }; | ||
499 | }; | ||
500 | |||
501 | hdmi_tx: hdmi-tx@c883a000 { | ||
502 | compatible = "amlogic,meson-gx-dw-hdmi"; | ||
503 | reg = <0x0 0xc883a000 0x0 0x1c>; | ||
504 | interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>; | ||
505 | #address-cells = <1>; | ||
506 | #size-cells = <0>; | ||
507 | status = "disabled"; | ||
508 | |||
509 | /* VPU VENC Input */ | ||
510 | hdmi_tx_venc_port: port@0 { | ||
511 | reg = <0>; | ||
512 | |||
513 | hdmi_tx_in: endpoint { | ||
514 | remote-endpoint = <&hdmi_tx_out>; | ||
515 | }; | ||
516 | }; | ||
517 | |||
518 | /* TMDS Output */ | ||
519 | hdmi_tx_tmds_port: port@1 { | ||
520 | reg = <1>; | ||
521 | }; | ||
460 | }; | 522 | }; |
461 | }; | 523 | }; |
462 | }; | 524 | }; |
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts index 4cbd626a9e88..87198eafb04b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | |||
@@ -152,6 +152,17 @@ | |||
152 | }; | 152 | }; |
153 | }; | 153 | }; |
154 | }; | 154 | }; |
155 | |||
156 | hdmi-connector { | ||
157 | compatible = "hdmi-connector"; | ||
158 | type = "a"; | ||
159 | |||
160 | port { | ||
161 | hdmi_connector_in: endpoint { | ||
162 | remote-endpoint = <&hdmi_tx_tmds_out>; | ||
163 | }; | ||
164 | }; | ||
165 | }; | ||
155 | }; | 166 | }; |
156 | 167 | ||
157 | &uart_AO { | 168 | &uart_AO { |
@@ -164,7 +175,24 @@ | |||
164 | status = "okay"; | 175 | status = "okay"; |
165 | pinctrl-0 = <ð_rmii_pins>; | 176 | pinctrl-0 = <ð_rmii_pins>; |
166 | pinctrl-names = "default"; | 177 | pinctrl-names = "default"; |
178 | |||
179 | phy-handle = <ð_phy0>; | ||
167 | phy-mode = "rmii"; | 180 | phy-mode = "rmii"; |
181 | |||
182 | snps,reset-gpio = <&gpio GPIOZ_14 0>; | ||
183 | snps,reset-delays-us = <0 10000 1000000>; | ||
184 | snps,reset-active-low; | ||
185 | |||
186 | mdio { | ||
187 | compatible = "snps,dwmac-mdio"; | ||
188 | #address-cells = <1>; | ||
189 | #size-cells = <0>; | ||
190 | |||
191 | eth_phy0: ethernet-phy@0 { | ||
192 | /* IC Plus IP101GR (0x02430c54) */ | ||
193 | reg = <0>; | ||
194 | }; | ||
195 | }; | ||
168 | }; | 196 | }; |
169 | 197 | ||
170 | &ir { | 198 | &ir { |
@@ -245,3 +273,15 @@ | |||
245 | remote-endpoint = <&cvbs_connector_in>; | 273 | remote-endpoint = <&cvbs_connector_in>; |
246 | }; | 274 | }; |
247 | }; | 275 | }; |
276 | |||
277 | &hdmi_tx { | ||
278 | status = "okay"; | ||
279 | pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; | ||
280 | pinctrl-names = "default"; | ||
281 | }; | ||
282 | |||
283 | &hdmi_tx_tmds_port { | ||
284 | hdmi_tx_tmds_out: endpoint { | ||
285 | remote-endpoint = <&hdmi_connector_in>; | ||
286 | }; | ||
287 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts index c59403adb387..54a9c6a6b392 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | |||
@@ -96,7 +96,7 @@ | |||
96 | regulator-min-microvolt = <3300000>; | 96 | regulator-min-microvolt = <3300000>; |
97 | regulator-max-microvolt = <3300000>; | 97 | regulator-max-microvolt = <3300000>; |
98 | 98 | ||
99 | gpio = <&gpio_ao GPIOAO_12 GPIO_ACTIVE_HIGH>; | 99 | gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>; |
100 | enable-active-high; | 100 | enable-active-high; |
101 | }; | 101 | }; |
102 | 102 | ||
@@ -152,6 +152,13 @@ | |||
152 | pinctrl-0 = <ð_rgmii_pins>; | 152 | pinctrl-0 = <ð_rgmii_pins>; |
153 | pinctrl-names = "default"; | 153 | pinctrl-names = "default"; |
154 | phy-handle = <ð_phy0>; | 154 | phy-handle = <ð_phy0>; |
155 | phy-mode = "rgmii"; | ||
156 | |||
157 | snps,reset-gpio = <&gpio GPIOZ_14 0>; | ||
158 | snps,reset-delays-us = <0 10000 1000000>; | ||
159 | snps,reset-active-low; | ||
160 | |||
161 | amlogic,tx-delay-ns = <2>; | ||
155 | 162 | ||
156 | mdio { | 163 | mdio { |
157 | compatible = "snps,dwmac-mdio"; | 164 | compatible = "snps,dwmac-mdio"; |
@@ -165,6 +172,57 @@ | |||
165 | }; | 172 | }; |
166 | }; | 173 | }; |
167 | 174 | ||
175 | &pinctrl_aobus { | ||
176 | gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En", | ||
177 | "USB HUB nRESET", "USB OTG Power En", | ||
178 | "J7 Header Pin2", "IR In", "J7 Header Pin4", | ||
179 | "J7 Header Pin6", "J7 Header Pin5", "J7 Header Pin7", | ||
180 | "HDMI CEC", "SYS LED"; | ||
181 | }; | ||
182 | |||
183 | &pinctrl_periphs { | ||
184 | gpio-line-names = /* Bank GPIOZ */ | ||
185 | "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", | ||
186 | "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", | ||
187 | "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En", | ||
188 | "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3", | ||
189 | "Eth PHY nRESET", "Eth PHY Intc", | ||
190 | /* Bank GPIOH */ | ||
191 | "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "", | ||
192 | /* Bank BOOT */ | ||
193 | "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4", | ||
194 | "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk", | ||
195 | "eMMC Reset", "eMMC CMD", | ||
196 | "", "", "", "", "", "", "", | ||
197 | /* Bank CARD */ | ||
198 | "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD", | ||
199 | "SDCard D3", "SDCard D2", "SDCard Det", | ||
200 | /* Bank GPIODV */ | ||
201 | "", "", "", "", "", "", "", "", "", "", "", "", "", | ||
202 | "", "", "", "", "", "", "", "", "", "", "", | ||
203 | "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK", | ||
204 | "PWM D", "PWM B", | ||
205 | /* Bank GPIOY */ | ||
206 | "Revision Bit0", "Revision Bit1", "", | ||
207 | "J2 Header Pin35", "", "", "", "J2 Header Pin36", | ||
208 | "J2 Header Pin31", "", "", "", "TF VDD En", | ||
209 | "J2 Header Pin32", "J2 Header Pin26", "", "", | ||
210 | /* Bank GPIOX */ | ||
211 | "J2 Header Pin29", "J2 Header Pin24", | ||
212 | "J2 Header Pin23", "J2 Header Pin22", | ||
213 | "J2 Header Pin21", "J2 Header Pin18", | ||
214 | "J2 Header Pin33", "J2 Header Pin19", | ||
215 | "J2 Header Pin16", "J2 Header Pin15", | ||
216 | "J2 Header Pin12", "J2 Header Pin13", | ||
217 | "J2 Header Pin8", "J2 Header Pin10", | ||
218 | "", "", "", "", "", | ||
219 | "J2 Header Pin11", "", "J2 Header Pin7", | ||
220 | /* Bank GPIOCLK */ | ||
221 | "", "", "", "", | ||
222 | /* GPIO_TEST_N */ | ||
223 | ""; | ||
224 | }; | ||
225 | |||
168 | &ir { | 226 | &ir { |
169 | status = "okay"; | 227 | status = "okay"; |
170 | pinctrl-0 = <&remote_input_ao_pins>; | 228 | pinctrl-0 = <&remote_input_ao_pins>; |
@@ -177,6 +235,21 @@ | |||
177 | pinctrl-names = "default"; | 235 | pinctrl-names = "default"; |
178 | }; | 236 | }; |
179 | 237 | ||
238 | &gpio_ao { | ||
239 | /* | ||
240 | * WARNING: The USB Hub on the Odroid-C2 needs a reset signal | ||
241 | * to be turned high in order to be detected by the USB Controller | ||
242 | * This signal should be handled by a USB specific power sequence | ||
243 | * in order to reset the Hub when USB bus is powered down. | ||
244 | */ | ||
245 | usb-hub { | ||
246 | gpio-hog; | ||
247 | gpios = <GPIOAO_4 GPIO_ACTIVE_HIGH>; | ||
248 | output-high; | ||
249 | line-name = "usb-hub-reset"; | ||
250 | }; | ||
251 | }; | ||
252 | |||
180 | &usb0_phy { | 253 | &usb0_phy { |
181 | status = "okay"; | 254 | status = "okay"; |
182 | phy-supply = <&usb_otg_pwr>; | 255 | phy-supply = <&usb_otg_pwr>; |
@@ -194,6 +267,11 @@ | |||
194 | status = "okay"; | 267 | status = "okay"; |
195 | }; | 268 | }; |
196 | 269 | ||
270 | &saradc { | ||
271 | status = "okay"; | ||
272 | vref-supply = <&vcc1v8>; | ||
273 | }; | ||
274 | |||
197 | /* SD */ | 275 | /* SD */ |
198 | &sd_emmc_b { | 276 | &sd_emmc_b { |
199 | status = "okay"; | 277 | status = "okay"; |
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts index fc0e86cb4cde..2054a474e0a9 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts | |||
@@ -96,6 +96,31 @@ | |||
96 | }; | 96 | }; |
97 | }; | 97 | }; |
98 | 98 | ||
99 | ðmac { | ||
100 | status = "okay"; | ||
101 | pinctrl-0 = <ð_rgmii_pins>; | ||
102 | pinctrl-names = "default"; | ||
103 | phy-handle = <ð_phy0>; | ||
104 | phy-mode = "rgmii"; | ||
105 | |||
106 | amlogic,tx-delay-ns = <2>; | ||
107 | |||
108 | snps,reset-gpio = <&gpio GPIOZ_14 0>; | ||
109 | snps,reset-delays-us = <0 10000 1000000>; | ||
110 | snps,reset-active-low; | ||
111 | |||
112 | mdio { | ||
113 | compatible = "snps,dwmac-mdio"; | ||
114 | #address-cells = <1>; | ||
115 | #size-cells = <0>; | ||
116 | |||
117 | eth_phy0: ethernet-phy@3 { | ||
118 | /* Micrel KSZ9031 (0x00221620) */ | ||
119 | reg = <3>; | ||
120 | }; | ||
121 | }; | ||
122 | }; | ||
123 | |||
99 | &i2c_B { | 124 | &i2c_B { |
100 | status = "okay"; | 125 | status = "okay"; |
101 | pinctrl-0 = <&i2c_b_pins>; | 126 | pinctrl-0 = <&i2c_b_pins>; |
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts index 39bb037a3e47..ae3194663d64 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts | |||
@@ -50,3 +50,14 @@ | |||
50 | compatible = "amlogic,p201", "amlogic,meson-gxbb"; | 50 | compatible = "amlogic,p201", "amlogic,meson-gxbb"; |
51 | model = "Amlogic Meson GXBB P201 Development Board"; | 51 | model = "Amlogic Meson GXBB P201 Development Board"; |
52 | }; | 52 | }; |
53 | |||
54 | ðmac { | ||
55 | status = "okay"; | ||
56 | pinctrl-0 = <ð_rmii_pins>; | ||
57 | pinctrl-names = "default"; | ||
58 | phy-mode = "rmii"; | ||
59 | |||
60 | snps,reset-gpio = <&gpio GPIOZ_14 0>; | ||
61 | snps,reset-delays-us = <0 10000 1000000>; | ||
62 | snps,reset-active-low; | ||
63 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi index 4a96e0f6f926..3c6c0b7f4187 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | |||
@@ -135,6 +135,17 @@ | |||
135 | }; | 135 | }; |
136 | }; | 136 | }; |
137 | }; | 137 | }; |
138 | |||
139 | hdmi-connector { | ||
140 | compatible = "hdmi-connector"; | ||
141 | type = "a"; | ||
142 | |||
143 | port { | ||
144 | hdmi_connector_in: endpoint { | ||
145 | remote-endpoint = <&hdmi_tx_tmds_out>; | ||
146 | }; | ||
147 | }; | ||
148 | }; | ||
138 | }; | 149 | }; |
139 | 150 | ||
140 | /* This UART is brought out to the DB9 connector */ | 151 | /* This UART is brought out to the DB9 connector */ |
@@ -144,12 +155,6 @@ | |||
144 | pinctrl-names = "default"; | 155 | pinctrl-names = "default"; |
145 | }; | 156 | }; |
146 | 157 | ||
147 | ðmac { | ||
148 | status = "okay"; | ||
149 | pinctrl-0 = <ð_rgmii_pins>; | ||
150 | pinctrl-names = "default"; | ||
151 | }; | ||
152 | |||
153 | &ir { | 158 | &ir { |
154 | status = "okay"; | 159 | status = "okay"; |
155 | pinctrl-0 = <&remote_input_ao_pins>; | 160 | pinctrl-0 = <&remote_input_ao_pins>; |
@@ -250,3 +255,15 @@ | |||
250 | remote-endpoint = <&cvbs_connector_in>; | 255 | remote-endpoint = <&cvbs_connector_in>; |
251 | }; | 256 | }; |
252 | }; | 257 | }; |
258 | |||
259 | &hdmi_tx { | ||
260 | status = "okay"; | ||
261 | pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; | ||
262 | pinctrl-names = "default"; | ||
263 | }; | ||
264 | |||
265 | &hdmi_tx_tmds_port { | ||
266 | hdmi_tx_tmds_out: endpoint { | ||
267 | remote-endpoint = <&hdmi_connector_in>; | ||
268 | }; | ||
269 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi index 86709929fd20..aefa66dff72d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | |||
@@ -115,7 +115,6 @@ | |||
115 | status = "okay"; | 115 | status = "okay"; |
116 | pinctrl-0 = <&uart_ao_a_pins>; | 116 | pinctrl-0 = <&uart_ao_a_pins>; |
117 | pinctrl-names = "default"; | 117 | pinctrl-names = "default"; |
118 | |||
119 | }; | 118 | }; |
120 | 119 | ||
121 | &ir { | 120 | &ir { |
@@ -128,6 +127,26 @@ | |||
128 | status = "okay"; | 127 | status = "okay"; |
129 | pinctrl-0 = <ð_rgmii_pins>; | 128 | pinctrl-0 = <ð_rgmii_pins>; |
130 | pinctrl-names = "default"; | 129 | pinctrl-names = "default"; |
130 | |||
131 | phy-handle = <ð_phy0>; | ||
132 | phy-mode = "rgmii"; | ||
133 | |||
134 | amlogic,tx-delay-ns = <2>; | ||
135 | |||
136 | snps,reset-gpio = <&gpio GPIOZ_14 0>; | ||
137 | snps,reset-delays-us = <0 10000 1000000>; | ||
138 | snps,reset-active-low; | ||
139 | |||
140 | mdio { | ||
141 | compatible = "snps,dwmac-mdio"; | ||
142 | #address-cells = <1>; | ||
143 | #size-cells = <0>; | ||
144 | |||
145 | eth_phy0: ethernet-phy@0 { | ||
146 | /* Realtek RTL8211F (0x001cc916) */ | ||
147 | reg = <0>; | ||
148 | }; | ||
149 | }; | ||
131 | }; | 150 | }; |
132 | 151 | ||
133 | &usb0_phy { | 152 | &usb0_phy { |
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts index 56f855901262..f057fb48fee5 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts | |||
@@ -64,3 +64,29 @@ | |||
64 | status = "disabled"; | 64 | status = "disabled"; |
65 | }; | 65 | }; |
66 | }; | 66 | }; |
67 | |||
68 | ðmac { | ||
69 | status = "okay"; | ||
70 | pinctrl-0 = <ð_rgmii_pins>; | ||
71 | pinctrl-names = "default"; | ||
72 | |||
73 | phy-handle = <ð_phy0>; | ||
74 | phy-mode = "rgmii"; | ||
75 | |||
76 | amlogic,tx-delay-ns = <2>; | ||
77 | |||
78 | snps,reset-gpio = <&gpio GPIOZ_14 0>; | ||
79 | snps,reset-delays-us = <0 10000 1000000>; | ||
80 | snps,reset-active-low; | ||
81 | |||
82 | mdio { | ||
83 | compatible = "snps,dwmac-mdio"; | ||
84 | #address-cells = <1>; | ||
85 | #size-cells = <0>; | ||
86 | |||
87 | eth_phy0: ethernet-phy@0 { | ||
88 | /* Realtek RTL8211F (0x001cc916) */ | ||
89 | reg = <0>; | ||
90 | }; | ||
91 | }; | ||
92 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts index ea79fdd2c248..743acb5f5d06 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts | |||
@@ -87,6 +87,32 @@ | |||
87 | }; | 87 | }; |
88 | }; | 88 | }; |
89 | 89 | ||
90 | ðmac { | ||
91 | status = "okay"; | ||
92 | pinctrl-0 = <ð_rgmii_pins>; | ||
93 | pinctrl-names = "default"; | ||
94 | |||
95 | phy-handle = <ð_phy0>; | ||
96 | phy-mode = "rgmii"; | ||
97 | |||
98 | amlogic,tx-delay-ns = <2>; | ||
99 | |||
100 | snps,reset-gpio = <&gpio GPIOZ_14 0>; | ||
101 | snps,reset-delays-us = <0 10000 1000000>; | ||
102 | snps,reset-active-low; | ||
103 | |||
104 | mdio { | ||
105 | compatible = "snps,dwmac-mdio"; | ||
106 | #address-cells = <1>; | ||
107 | #size-cells = <0>; | ||
108 | |||
109 | eth_phy0: ethernet-phy@0 { | ||
110 | /* Realtek RTL8211F (0x001cc916) */ | ||
111 | reg = <0>; | ||
112 | }; | ||
113 | }; | ||
114 | }; | ||
115 | |||
90 | &i2c_A { | 116 | &i2c_A { |
91 | status = "okay"; | 117 | status = "okay"; |
92 | pinctrl-0 = <&i2c_a_pins>; | 118 | pinctrl-0 = <&i2c_a_pins>; |
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 04b3324bc132..4afe1c46ec11 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | |||
@@ -97,17 +97,6 @@ | |||
97 | }; | 97 | }; |
98 | }; | 98 | }; |
99 | 99 | ||
100 | &cbus { | ||
101 | spifc: spi@8c80 { | ||
102 | compatible = "amlogic,meson-gxbb-spifc"; | ||
103 | reg = <0x0 0x08c80 0x0 0x80>; | ||
104 | #address-cells = <1>; | ||
105 | #size-cells = <0>; | ||
106 | clocks = <&clkc CLKID_SPI>; | ||
107 | status = "disabled"; | ||
108 | }; | ||
109 | }; | ||
110 | |||
111 | ðmac { | 100 | ðmac { |
112 | clocks = <&clkc CLKID_ETH>, | 101 | clocks = <&clkc CLKID_ETH>, |
113 | <&clkc CLKID_FCLK_DIV2>, | 102 | <&clkc CLKID_FCLK_DIV2>, |
@@ -129,6 +118,7 @@ | |||
129 | reg-names = "mux", "pull", "gpio"; | 118 | reg-names = "mux", "pull", "gpio"; |
130 | gpio-controller; | 119 | gpio-controller; |
131 | #gpio-cells = <2>; | 120 | #gpio-cells = <2>; |
121 | gpio-ranges = <&pinctrl_aobus 0 0 14>; | ||
132 | }; | 122 | }; |
133 | 123 | ||
134 | uart_ao_a_pins: uart_ao_a { | 124 | uart_ao_a_pins: uart_ao_a { |
@@ -203,30 +193,62 @@ | |||
203 | function = "pwm_ao_b"; | 193 | function = "pwm_ao_b"; |
204 | }; | 194 | }; |
205 | }; | 195 | }; |
206 | }; | ||
207 | 196 | ||
208 | clkc_AO: clock-controller@040 { | 197 | i2s_am_clk_pins: i2s_am_clk { |
209 | compatible = "amlogic,gxbb-aoclkc"; | 198 | mux { |
210 | reg = <0x0 0x00040 0x0 0x4>; | 199 | groups = "i2s_am_clk"; |
211 | #clock-cells = <1>; | 200 | function = "i2s_out_ao"; |
212 | #reset-cells = <1>; | 201 | }; |
213 | }; | 202 | }; |
214 | 203 | ||
215 | pwm_ab_AO: pwm@550 { | 204 | i2s_out_ao_clk_pins: i2s_out_ao_clk { |
216 | compatible = "amlogic,meson-gxbb-pwm"; | 205 | mux { |
217 | reg = <0x0 0x0550 0x0 0x10>; | 206 | groups = "i2s_out_ao_clk"; |
218 | #pwm-cells = <3>; | 207 | function = "i2s_out_ao"; |
219 | status = "disabled"; | 208 | }; |
220 | }; | 209 | }; |
221 | 210 | ||
222 | i2c_AO: i2c@500 { | 211 | i2s_out_lr_clk_pins: i2s_out_lr_clk { |
223 | compatible = "amlogic,meson-gxbb-i2c"; | 212 | mux { |
224 | reg = <0x0 0x500 0x0 0x20>; | 213 | groups = "i2s_out_lr_clk"; |
225 | interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; | 214 | function = "i2s_out_ao"; |
226 | clocks = <&clkc CLKID_AO_I2C>; | 215 | }; |
227 | #address-cells = <1>; | 216 | }; |
228 | #size-cells = <0>; | 217 | |
229 | status = "disabled"; | 218 | i2s_out_ch01_ao_pins: i2s_out_ch01_ao { |
219 | mux { | ||
220 | groups = "i2s_out_ch01_ao"; | ||
221 | function = "i2s_out_ao"; | ||
222 | }; | ||
223 | }; | ||
224 | |||
225 | i2s_out_ch23_ao_pins: i2s_out_ch23_ao { | ||
226 | mux { | ||
227 | groups = "i2s_out_ch23_ao"; | ||
228 | function = "i2s_out_ao"; | ||
229 | }; | ||
230 | }; | ||
231 | |||
232 | i2s_out_ch45_ao_pins: i2s_out_ch45_ao { | ||
233 | mux { | ||
234 | groups = "i2s_out_ch45_ao"; | ||
235 | function = "i2s_out_ao"; | ||
236 | }; | ||
237 | }; | ||
238 | |||
239 | spdif_out_ao_6_pins: spdif_out_ao_6 { | ||
240 | mux { | ||
241 | groups = "spdif_out_ao_6"; | ||
242 | function = "spdif_out_ao"; | ||
243 | }; | ||
244 | }; | ||
245 | |||
246 | spdif_out_ao_13_pins: spdif_out_ao_13 { | ||
247 | mux { | ||
248 | groups = "spdif_out_ao_13"; | ||
249 | function = "spdif_out_ao"; | ||
250 | }; | ||
251 | }; | ||
230 | }; | 252 | }; |
231 | }; | 253 | }; |
232 | 254 | ||
@@ -245,6 +267,7 @@ | |||
245 | reg-names = "mux", "pull", "pull-enable", "gpio"; | 267 | reg-names = "mux", "pull", "pull-enable", "gpio"; |
246 | gpio-controller; | 268 | gpio-controller; |
247 | #gpio-cells = <2>; | 269 | #gpio-cells = <2>; |
270 | gpio-ranges = <&pinctrl_periphs 0 14 120>; | ||
248 | }; | 271 | }; |
249 | 272 | ||
250 | emmc_pins: emmc { | 273 | emmc_pins: emmc { |
@@ -467,6 +490,34 @@ | |||
467 | function = "hdmi_i2c"; | 490 | function = "hdmi_i2c"; |
468 | }; | 491 | }; |
469 | }; | 492 | }; |
493 | |||
494 | i2sout_ch23_y_pins: i2sout_ch23_y { | ||
495 | mux { | ||
496 | groups = "i2sout_ch23_y"; | ||
497 | function = "i2s_out"; | ||
498 | }; | ||
499 | }; | ||
500 | |||
501 | i2sout_ch45_y_pins: i2sout_ch45_y { | ||
502 | mux { | ||
503 | groups = "i2sout_ch45_y"; | ||
504 | function = "i2s_out"; | ||
505 | }; | ||
506 | }; | ||
507 | |||
508 | i2sout_ch67_y_pins: i2sout_ch67_y { | ||
509 | mux { | ||
510 | groups = "i2sout_ch67_y"; | ||
511 | function = "i2s_out"; | ||
512 | }; | ||
513 | }; | ||
514 | |||
515 | spdif_out_y_pins: spdif_out_y { | ||
516 | mux { | ||
517 | groups = "spdif_out_y"; | ||
518 | function = "spdif_out"; | ||
519 | }; | ||
520 | }; | ||
470 | }; | 521 | }; |
471 | }; | 522 | }; |
472 | 523 | ||
@@ -478,10 +529,51 @@ | |||
478 | }; | 529 | }; |
479 | }; | 530 | }; |
480 | 531 | ||
532 | &apb { | ||
533 | mali: gpu@c0000 { | ||
534 | compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; | ||
535 | reg = <0x0 0xc0000 0x0 0x40000>; | ||
536 | interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, | ||
537 | <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, | ||
538 | <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, | ||
539 | <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, | ||
540 | <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, | ||
541 | <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, | ||
542 | <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, | ||
543 | <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, | ||
544 | <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, | ||
545 | <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; | ||
546 | interrupt-names = "gp", "gpmmu", "pp", "pmu", | ||
547 | "pp0", "ppmmu0", "pp1", "ppmmu1", | ||
548 | "pp2", "ppmmu2"; | ||
549 | clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; | ||
550 | clock-names = "bus", "core"; | ||
551 | |||
552 | /* | ||
553 | * Mali clocking is provided by two identical clock paths | ||
554 | * MALI_0 and MALI_1 muxed to a single clock by a glitch | ||
555 | * free mux to safely change frequency while running. | ||
556 | */ | ||
557 | assigned-clocks = <&clkc CLKID_MALI_0_SEL>, | ||
558 | <&clkc CLKID_MALI_0>, | ||
559 | <&clkc CLKID_MALI>; /* Glitch free mux */ | ||
560 | assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, | ||
561 | <0>, /* Do Nothing */ | ||
562 | <&clkc CLKID_MALI_0>; | ||
563 | assigned-clock-rates = <0>, /* Do Nothing */ | ||
564 | <666666666>, | ||
565 | <0>; /* Do Nothing */ | ||
566 | }; | ||
567 | }; | ||
568 | |||
481 | &i2c_A { | 569 | &i2c_A { |
482 | clocks = <&clkc CLKID_I2C>; | 570 | clocks = <&clkc CLKID_I2C>; |
483 | }; | 571 | }; |
484 | 572 | ||
573 | &i2c_AO { | ||
574 | clocks = <&clkc CLKID_AO_I2C>; | ||
575 | }; | ||
576 | |||
485 | &i2c_B { | 577 | &i2c_B { |
486 | clocks = <&clkc CLKID_I2C>; | 578 | clocks = <&clkc CLKID_I2C>; |
487 | }; | 579 | }; |
@@ -521,6 +613,22 @@ | |||
521 | clock-names = "core", "clkin0", "clkin1"; | 613 | clock-names = "core", "clkin0", "clkin1"; |
522 | }; | 614 | }; |
523 | 615 | ||
616 | &spifc { | ||
617 | clocks = <&clkc CLKID_SPI>; | ||
618 | }; | ||
619 | |||
524 | &vpu { | 620 | &vpu { |
525 | compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; | 621 | compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; |
526 | }; | 622 | }; |
623 | |||
624 | &hdmi_tx { | ||
625 | compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; | ||
626 | resets = <&reset RESET_HDMITX_CAPB3>, | ||
627 | <&reset RESET_HDMI_SYSTEM_RESET>, | ||
628 | <&reset RESET_HDMI_TX>; | ||
629 | reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; | ||
630 | clocks = <&clkc CLKID_HDMI_PCLK>, | ||
631 | <&clkc CLKID_CLK81>, | ||
632 | <&clkc CLKID_GCLK_VENCI_INT0>; | ||
633 | clock-names = "isfr", "iahb", "venci"; | ||
634 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi new file mode 100644 index 000000000000..f06cc234693b --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi | |||
@@ -0,0 +1,43 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017 BayLibre SAS | ||
3 | * Author: Neil Armstrong <narmstrong@baylibre.com> | ||
4 | * | ||
5 | * SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
6 | */ | ||
7 | |||
8 | &apb { | ||
9 | mali: gpu@c0000 { | ||
10 | compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; | ||
11 | reg = <0x0 0xc0000 0x0 0x40000>; | ||
12 | interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, | ||
13 | <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, | ||
14 | <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, | ||
15 | <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, | ||
16 | <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, | ||
17 | <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, | ||
18 | <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, | ||
19 | <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, | ||
20 | <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, | ||
21 | <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; | ||
22 | interrupt-names = "gp", "gpmmu", "pp", "pmu", | ||
23 | "pp0", "ppmmu0", "pp1", "ppmmu1", | ||
24 | "pp2", "ppmmu2"; | ||
25 | clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; | ||
26 | clock-names = "bus", "core"; | ||
27 | |||
28 | /* | ||
29 | * Mali clocking is provided by two identical clock paths | ||
30 | * MALI_0 and MALI_1 muxed to a single clock by a glitch | ||
31 | * free mux to safely change frequency while running. | ||
32 | */ | ||
33 | assigned-clocks = <&clkc CLKID_MALI_0_SEL>, | ||
34 | <&clkc CLKID_MALI_0>, | ||
35 | <&clkc CLKID_MALI>; /* Glitch free mux */ | ||
36 | assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, | ||
37 | <0>, /* Do Nothing */ | ||
38 | <&clkc CLKID_MALI_0>; | ||
39 | assigned-clock-rates = <0>, /* Do Nothing */ | ||
40 | <666666666>, | ||
41 | <0>; /* Do Nothing */ | ||
42 | }; | ||
43 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts index f66939cacd37..f9fbfdad8dde 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts | |||
@@ -43,12 +43,47 @@ | |||
43 | 43 | ||
44 | /dts-v1/; | 44 | /dts-v1/; |
45 | 45 | ||
46 | #include <dt-bindings/input/input.h> | ||
47 | |||
46 | #include "meson-gxl-s905d.dtsi" | 48 | #include "meson-gxl-s905d.dtsi" |
47 | #include "meson-gx-p23x-q20x.dtsi" | 49 | #include "meson-gx-p23x-q20x.dtsi" |
48 | 50 | ||
49 | / { | 51 | / { |
50 | compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl"; | 52 | compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl"; |
51 | model = "Amlogic Meson GXL (S905D) P230 Development Board"; | 53 | model = "Amlogic Meson GXL (S905D) P230 Development Board"; |
54 | |||
55 | adc-keys { | ||
56 | compatible = "adc-keys"; | ||
57 | io-channels = <&saradc 0>; | ||
58 | io-channel-names = "buttons"; | ||
59 | keyup-threshold-microvolt = <1710000>; | ||
60 | |||
61 | button-function { | ||
62 | label = "Update"; | ||
63 | linux,code = <KEY_VENDOR>; | ||
64 | press-threshold-microvolt = <10000>; | ||
65 | }; | ||
66 | }; | ||
67 | |||
68 | gpio-keys-polled { | ||
69 | compatible = "gpio-keys-polled"; | ||
70 | #address-cells = <1>; | ||
71 | #size-cells = <0>; | ||
72 | poll-interval = <100>; | ||
73 | |||
74 | button@0 { | ||
75 | label = "power"; | ||
76 | linux,code = <KEY_POWER>; | ||
77 | gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; | ||
78 | }; | ||
79 | }; | ||
80 | |||
81 | vddio_ao18: regulator-vddio_ao18 { | ||
82 | compatible = "regulator-fixed"; | ||
83 | regulator-name = "VDDIO_AO18"; | ||
84 | regulator-min-microvolt = <1800000>; | ||
85 | regulator-max-microvolt = <1800000>; | ||
86 | }; | ||
52 | }; | 87 | }; |
53 | 88 | ||
54 | /* P230 has exclusive choice between internal or external PHY */ | 89 | /* P230 has exclusive choice between internal or external PHY */ |
@@ -59,6 +94,8 @@ | |||
59 | /* Select external PHY by default */ | 94 | /* Select external PHY by default */ |
60 | phy-handle = <&external_phy>; | 95 | phy-handle = <&external_phy>; |
61 | 96 | ||
97 | amlogic,tx-delay-ns = <2>; | ||
98 | |||
62 | /* External PHY reset is shared with internal PHY Led signals */ | 99 | /* External PHY reset is shared with internal PHY Led signals */ |
63 | snps,reset-gpio = <&gpio GPIOZ_14 0>; | 100 | snps,reset-gpio = <&gpio GPIOZ_14 0>; |
64 | snps,reset-delays-us = <0 10000 1000000>; | 101 | snps,reset-delays-us = <0 10000 1000000>; |
@@ -75,3 +112,8 @@ | |||
75 | max-speed = <1000>; | 112 | max-speed = <1000>; |
76 | }; | 113 | }; |
77 | }; | 114 | }; |
115 | |||
116 | &saradc { | ||
117 | status = "okay"; | ||
118 | vref-supply = <&vddio_ao18>; | ||
119 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi index 615308e55576..5a90e30c1006 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi | |||
@@ -42,6 +42,7 @@ | |||
42 | */ | 42 | */ |
43 | 43 | ||
44 | #include "meson-gxl.dtsi" | 44 | #include "meson-gxl.dtsi" |
45 | #include "meson-gxl-mali.dtsi" | ||
45 | 46 | ||
46 | / { | 47 | / { |
47 | compatible = "amlogic,s905d", "amlogic,meson-gxl"; | 48 | compatible = "amlogic,s905d", "amlogic,meson-gxl"; |
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts new file mode 100644 index 000000000000..2a5804ce7f4b --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts | |||
@@ -0,0 +1,164 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017 Carlo Caione | ||
3 | * Copyright (c) 2016 BayLibre, Inc. | ||
4 | * Author: Neil Armstrong <narmstrong@kernel.org> | ||
5 | * | ||
6 | * SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
7 | */ | ||
8 | |||
9 | /dts-v1/; | ||
10 | |||
11 | #include "meson-gxl-s905x.dtsi" | ||
12 | |||
13 | / { | ||
14 | compatible = "hwacom,amazetv", "amlogic,s905x", "amlogic,meson-gxl"; | ||
15 | model = "Hwacom AmazeTV (S905X)"; | ||
16 | |||
17 | aliases { | ||
18 | serial0 = &uart_AO; | ||
19 | }; | ||
20 | |||
21 | chosen { | ||
22 | stdout-path = "serial0:115200n8"; | ||
23 | }; | ||
24 | |||
25 | memory@0 { | ||
26 | device_type = "memory"; | ||
27 | reg = <0x0 0x0 0x0 0x80000000>; | ||
28 | }; | ||
29 | |||
30 | vddio_card: gpio-regulator { | ||
31 | compatible = "regulator-gpio"; | ||
32 | |||
33 | regulator-name = "VDDIO_CARD"; | ||
34 | regulator-min-microvolt = <1800000>; | ||
35 | regulator-max-microvolt = <3300000>; | ||
36 | |||
37 | gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; | ||
38 | gpios-states = <1>; | ||
39 | |||
40 | /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ | ||
41 | states = <1800000 0 | ||
42 | 3300000 1>; | ||
43 | }; | ||
44 | |||
45 | vddio_boot: regulator-vddio_boot { | ||
46 | compatible = "regulator-fixed"; | ||
47 | regulator-name = "VDDIO_BOOT"; | ||
48 | regulator-min-microvolt = <1800000>; | ||
49 | regulator-max-microvolt = <1800000>; | ||
50 | }; | ||
51 | |||
52 | vddao_3v3: regulator-vddao_3v3 { | ||
53 | compatible = "regulator-fixed"; | ||
54 | regulator-name = "VDDAO_3V3"; | ||
55 | regulator-min-microvolt = <3300000>; | ||
56 | regulator-max-microvolt = <3300000>; | ||
57 | }; | ||
58 | |||
59 | vcc_3v3: regulator-vcc_3v3 { | ||
60 | compatible = "regulator-fixed"; | ||
61 | regulator-name = "VCC_3V3"; | ||
62 | regulator-min-microvolt = <3300000>; | ||
63 | regulator-max-microvolt = <3300000>; | ||
64 | }; | ||
65 | |||
66 | emmc_pwrseq: emmc-pwrseq { | ||
67 | compatible = "mmc-pwrseq-emmc"; | ||
68 | reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; | ||
69 | }; | ||
70 | |||
71 | wifi32k: wifi32k { | ||
72 | compatible = "pwm-clock"; | ||
73 | #clock-cells = <0>; | ||
74 | clock-frequency = <32768>; | ||
75 | pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ | ||
76 | }; | ||
77 | |||
78 | sdio_pwrseq: sdio-pwrseq { | ||
79 | compatible = "mmc-pwrseq-simple"; | ||
80 | reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; | ||
81 | clocks = <&wifi32k>; | ||
82 | clock-names = "ext_clock"; | ||
83 | }; | ||
84 | |||
85 | cvbs-connector { | ||
86 | compatible = "composite-video-connector"; | ||
87 | |||
88 | port { | ||
89 | cvbs_connector_in: endpoint { | ||
90 | remote-endpoint = <&cvbs_vdac_out>; | ||
91 | }; | ||
92 | }; | ||
93 | }; | ||
94 | }; | ||
95 | |||
96 | &cvbs_vdac_port { | ||
97 | cvbs_vdac_out: endpoint { | ||
98 | remote-endpoint = <&cvbs_connector_in>; | ||
99 | }; | ||
100 | }; | ||
101 | |||
102 | ðmac { | ||
103 | status = "okay"; | ||
104 | phy-mode = "rmii"; | ||
105 | phy-handle = <&internal_phy>; | ||
106 | }; | ||
107 | |||
108 | &ir { | ||
109 | status = "okay"; | ||
110 | pinctrl-0 = <&remote_input_ao_pins>; | ||
111 | pinctrl-names = "default"; | ||
112 | }; | ||
113 | |||
114 | &pwm_ef { | ||
115 | status = "okay"; | ||
116 | pinctrl-0 = <&pwm_e_pins>; | ||
117 | pinctrl-names = "default"; | ||
118 | clocks = <&clkc CLKID_FCLK_DIV4>; | ||
119 | clock-names = "clkin0"; | ||
120 | }; | ||
121 | |||
122 | /* SD card */ | ||
123 | &sd_emmc_b { | ||
124 | status = "okay"; | ||
125 | pinctrl-0 = <&sdcard_pins>; | ||
126 | pinctrl-names = "default"; | ||
127 | |||
128 | bus-width = <4>; | ||
129 | cap-sd-highspeed; | ||
130 | max-frequency = <100000000>; | ||
131 | disable-wp; | ||
132 | |||
133 | cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; | ||
134 | cd-inverted; | ||
135 | |||
136 | vmmc-supply = <&vddao_3v3>; | ||
137 | vqmmc-supply = <&vddio_card>; | ||
138 | }; | ||
139 | |||
140 | /* eMMC */ | ||
141 | &sd_emmc_c { | ||
142 | status = "okay"; | ||
143 | pinctrl-0 = <&emmc_pins>; | ||
144 | pinctrl-names = "default"; | ||
145 | |||
146 | bus-width = <8>; | ||
147 | cap-sd-highspeed; | ||
148 | cap-mmc-highspeed; | ||
149 | max-frequency = <100000000>; | ||
150 | non-removable; | ||
151 | disable-wp; | ||
152 | mmc-ddr-1_8v; | ||
153 | mmc-hs200-1_8v; | ||
154 | |||
155 | mmc-pwrseq = <&emmc_pwrseq>; | ||
156 | vmmc-supply = <&vcc_3v3>; | ||
157 | vqmmc-supply = <&vddio_boot>; | ||
158 | }; | ||
159 | |||
160 | &uart_AO { | ||
161 | status = "okay"; | ||
162 | pinctrl-0 = <&uart_ao_a_pins>; | ||
163 | pinctrl-names = "default"; | ||
164 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts new file mode 100644 index 000000000000..3c8b0b51ef27 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | |||
@@ -0,0 +1,114 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>. | ||
3 | * | ||
4 | * SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
5 | */ | ||
6 | |||
7 | /dts-v1/; | ||
8 | |||
9 | #include <dt-bindings/input/input.h> | ||
10 | |||
11 | #include "meson-gxl-s905x-p212.dtsi" | ||
12 | |||
13 | / { | ||
14 | compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl"; | ||
15 | model = "Khadas VIM"; | ||
16 | |||
17 | adc-keys { | ||
18 | compatible = "adc-keys"; | ||
19 | io-channels = <&saradc 0>; | ||
20 | io-channel-names = "buttons"; | ||
21 | keyup-threshold-microvolt = <1710000>; | ||
22 | |||
23 | button-function { | ||
24 | label = "Function"; | ||
25 | linux,code = <KEY_FN>; | ||
26 | press-threshold-microvolt = <10000>; | ||
27 | }; | ||
28 | }; | ||
29 | |||
30 | aliases { | ||
31 | serial2 = &uart_AO_B; | ||
32 | }; | ||
33 | |||
34 | gpio-keys-polled { | ||
35 | compatible = "gpio-keys-polled"; | ||
36 | #address-cells = <1>; | ||
37 | #size-cells = <0>; | ||
38 | poll-interval = <100>; | ||
39 | |||
40 | button@0 { | ||
41 | label = "power"; | ||
42 | linux,code = <KEY_POWER>; | ||
43 | gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; | ||
44 | }; | ||
45 | }; | ||
46 | |||
47 | pwmleds { | ||
48 | compatible = "pwm-leds"; | ||
49 | |||
50 | power { | ||
51 | label = "vim:red:power"; | ||
52 | pwms = <&pwm_AO_ab 1 7812500 0>; | ||
53 | max-brightness = <255>; | ||
54 | linux,default-trigger = "default-on"; | ||
55 | }; | ||
56 | }; | ||
57 | }; | ||
58 | |||
59 | &i2c_A { | ||
60 | status = "okay"; | ||
61 | pinctrl-0 = <&i2c_a_pins>; | ||
62 | pinctrl-names = "default"; | ||
63 | }; | ||
64 | |||
65 | &i2c_B { | ||
66 | status = "okay"; | ||
67 | pinctrl-0 = <&i2c_b_pins>; | ||
68 | pinctrl-names = "default"; | ||
69 | |||
70 | rtc: rtc@51 { | ||
71 | /* has to be enabled manually when a battery is connected: */ | ||
72 | status = "disabled"; | ||
73 | compatible = "haoyu,hym8563"; | ||
74 | reg = <0x51>; | ||
75 | #clock-cells = <0>; | ||
76 | clock-frequency = <32768>; | ||
77 | clock-output-names = "xin32k"; | ||
78 | }; | ||
79 | }; | ||
80 | |||
81 | &ir { | ||
82 | linux,rc-map-name = "rc-geekbox"; | ||
83 | }; | ||
84 | |||
85 | &pwm_AO_ab { | ||
86 | status = "okay"; | ||
87 | pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>; | ||
88 | pinctrl-names = "default"; | ||
89 | clocks = <&clkc CLKID_FCLK_DIV4>; | ||
90 | clock-names = "clkin0"; | ||
91 | }; | ||
92 | |||
93 | &pwm_ef { | ||
94 | pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>; | ||
95 | }; | ||
96 | |||
97 | &sd_emmc_a { | ||
98 | brcmf: bcrmf@1 { | ||
99 | reg = <1>; | ||
100 | compatible = "brcm,bcm4329-fmac"; | ||
101 | }; | ||
102 | }; | ||
103 | |||
104 | /* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */ | ||
105 | &uart_AO { | ||
106 | status = "okay"; | ||
107 | }; | ||
108 | |||
109 | /* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */ | ||
110 | &uart_AO_B { | ||
111 | status = "okay"; | ||
112 | pinctrl-0 = <&uart_ao_b_pins>; | ||
113 | pinctrl-names = "default"; | ||
114 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts index cea4a3eded9b..8873c058fad2 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts | |||
@@ -127,6 +127,17 @@ | |||
127 | }; | 127 | }; |
128 | }; | 128 | }; |
129 | }; | 129 | }; |
130 | |||
131 | hdmi-connector { | ||
132 | compatible = "hdmi-connector"; | ||
133 | type = "a"; | ||
134 | |||
135 | port { | ||
136 | hdmi_connector_in: endpoint { | ||
137 | remote-endpoint = <&hdmi_tx_tmds_out>; | ||
138 | }; | ||
139 | }; | ||
140 | }; | ||
130 | }; | 141 | }; |
131 | 142 | ||
132 | &uart_AO { | 143 | &uart_AO { |
@@ -219,3 +230,15 @@ | |||
219 | remote-endpoint = <&cvbs_connector_in>; | 230 | remote-endpoint = <&cvbs_connector_in>; |
220 | }; | 231 | }; |
221 | }; | 232 | }; |
233 | |||
234 | &hdmi_tx { | ||
235 | status = "okay"; | ||
236 | pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; | ||
237 | pinctrl-names = "default"; | ||
238 | }; | ||
239 | |||
240 | &hdmi_tx_tmds_port { | ||
241 | hdmi_tx_tmds_out: endpoint { | ||
242 | remote-endpoint = <&hdmi_connector_in>; | ||
243 | }; | ||
244 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts index 9639f012b02b..db31e093f40e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts | |||
@@ -43,23 +43,26 @@ | |||
43 | 43 | ||
44 | /dts-v1/; | 44 | /dts-v1/; |
45 | 45 | ||
46 | #include "meson-gxl-s905x.dtsi" | 46 | #include "meson-gxl-s905x-p212.dtsi" |
47 | 47 | ||
48 | / { | 48 | / { |
49 | compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl"; | 49 | compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl"; |
50 | model = "Amlogic Meson GXL (S905X) P212 Development Board"; | 50 | model = "Amlogic Meson GXL (S905X) P212 Development Board"; |
51 | 51 | ||
52 | aliases { | 52 | cvbs-connector { |
53 | serial0 = &uart_AO; | 53 | compatible = "composite-video-connector"; |
54 | }; | ||
55 | 54 | ||
56 | chosen { | 55 | port { |
57 | stdout-path = "serial0:115200n8"; | 56 | cvbs_connector_in: endpoint { |
57 | remote-endpoint = <&cvbs_vdac_out>; | ||
58 | }; | ||
59 | }; | ||
58 | }; | 60 | }; |
61 | }; | ||
59 | 62 | ||
60 | memory@0 { | 63 | &cvbs_vdac_port { |
61 | device_type = "memory"; | 64 | cvbs_vdac_out: endpoint { |
62 | reg = <0x0 0x0 0x0 0x80000000>; | 65 | remote-endpoint = <&cvbs_connector_in>; |
63 | }; | 66 | }; |
64 | }; | 67 | }; |
65 | 68 | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi new file mode 100644 index 000000000000..f3eea8e89d12 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | |||
@@ -0,0 +1,173 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>. | ||
3 | * Based on meson-gx-p23x-q20x.dtsi: | ||
4 | * - Copyright (c) 2016 Endless Computers, Inc. | ||
5 | * Author: Carlo Caione <carlo@endlessm.com> | ||
6 | * - Copyright (c) 2016 BayLibre, SAS. | ||
7 | * Author: Neil Armstrong <narmstrong@baylibre.com> | ||
8 | * | ||
9 | * SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
10 | */ | ||
11 | |||
12 | /* Common DTSI for devices which are based on the P212 reference board. */ | ||
13 | |||
14 | #include "meson-gxl-s905x.dtsi" | ||
15 | |||
16 | / { | ||
17 | aliases { | ||
18 | serial0 = &uart_AO; | ||
19 | serial1 = &uart_A; | ||
20 | }; | ||
21 | |||
22 | chosen { | ||
23 | stdout-path = "serial0:115200n8"; | ||
24 | }; | ||
25 | |||
26 | memory@0 { | ||
27 | device_type = "memory"; | ||
28 | reg = <0x0 0x0 0x0 0x80000000>; | ||
29 | }; | ||
30 | |||
31 | vddio_boot: regulator-vddio_boot { | ||
32 | compatible = "regulator-fixed"; | ||
33 | regulator-name = "VDDIO_BOOT"; | ||
34 | regulator-min-microvolt = <1800000>; | ||
35 | regulator-max-microvolt = <1800000>; | ||
36 | }; | ||
37 | |||
38 | vddao_3v3: regulator-vddao_3v3 { | ||
39 | compatible = "regulator-fixed"; | ||
40 | regulator-name = "VDDAO_3V3"; | ||
41 | regulator-min-microvolt = <3300000>; | ||
42 | regulator-max-microvolt = <3300000>; | ||
43 | }; | ||
44 | |||
45 | vddio_ao18: regulator-vddio_ao18 { | ||
46 | compatible = "regulator-fixed"; | ||
47 | regulator-name = "VDDIO_AO18"; | ||
48 | regulator-min-microvolt = <1800000>; | ||
49 | regulator-max-microvolt = <1800000>; | ||
50 | }; | ||
51 | |||
52 | vcc_3v3: regulator-vcc_3v3 { | ||
53 | compatible = "regulator-fixed"; | ||
54 | regulator-name = "VCC_3V3"; | ||
55 | regulator-min-microvolt = <3300000>; | ||
56 | regulator-max-microvolt = <3300000>; | ||
57 | }; | ||
58 | |||
59 | emmc_pwrseq: emmc-pwrseq { | ||
60 | compatible = "mmc-pwrseq-emmc"; | ||
61 | reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; | ||
62 | }; | ||
63 | |||
64 | wifi32k: wifi32k { | ||
65 | compatible = "pwm-clock"; | ||
66 | #clock-cells = <0>; | ||
67 | clock-frequency = <32768>; | ||
68 | pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ | ||
69 | }; | ||
70 | |||
71 | sdio_pwrseq: sdio-pwrseq { | ||
72 | compatible = "mmc-pwrseq-simple"; | ||
73 | reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; | ||
74 | clocks = <&wifi32k>; | ||
75 | clock-names = "ext_clock"; | ||
76 | }; | ||
77 | }; | ||
78 | |||
79 | ðmac { | ||
80 | status = "okay"; | ||
81 | }; | ||
82 | |||
83 | &ir { | ||
84 | status = "okay"; | ||
85 | pinctrl-0 = <&remote_input_ao_pins>; | ||
86 | pinctrl-names = "default"; | ||
87 | }; | ||
88 | |||
89 | &saradc { | ||
90 | status = "okay"; | ||
91 | vref-supply = <&vddio_ao18>; | ||
92 | }; | ||
93 | |||
94 | /* Wireless SDIO Module */ | ||
95 | &sd_emmc_a { | ||
96 | status = "okay"; | ||
97 | pinctrl-0 = <&sdio_pins>; | ||
98 | pinctrl-names = "default"; | ||
99 | #address-cells = <1>; | ||
100 | #size-cells = <0>; | ||
101 | |||
102 | bus-width = <4>; | ||
103 | cap-sd-highspeed; | ||
104 | max-frequency = <100000000>; | ||
105 | |||
106 | non-removable; | ||
107 | disable-wp; | ||
108 | |||
109 | mmc-pwrseq = <&sdio_pwrseq>; | ||
110 | |||
111 | vmmc-supply = <&vddao_3v3>; | ||
112 | vqmmc-supply = <&vddio_boot>; | ||
113 | }; | ||
114 | |||
115 | /* SD card */ | ||
116 | &sd_emmc_b { | ||
117 | status = "okay"; | ||
118 | pinctrl-0 = <&sdcard_pins>; | ||
119 | pinctrl-names = "default"; | ||
120 | |||
121 | bus-width = <4>; | ||
122 | cap-sd-highspeed; | ||
123 | max-frequency = <100000000>; | ||
124 | disable-wp; | ||
125 | |||
126 | cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; | ||
127 | cd-inverted; | ||
128 | |||
129 | vmmc-supply = <&vddao_3v3>; | ||
130 | vqmmc-supply = <&vddio_boot>; | ||
131 | }; | ||
132 | |||
133 | /* eMMC */ | ||
134 | &sd_emmc_c { | ||
135 | status = "okay"; | ||
136 | pinctrl-0 = <&emmc_pins>; | ||
137 | pinctrl-names = "default"; | ||
138 | |||
139 | bus-width = <8>; | ||
140 | cap-sd-highspeed; | ||
141 | cap-mmc-highspeed; | ||
142 | max-frequency = <200000000>; | ||
143 | non-removable; | ||
144 | disable-wp; | ||
145 | mmc-ddr-1_8v; | ||
146 | mmc-hs200-1_8v; | ||
147 | |||
148 | mmc-pwrseq = <&emmc_pwrseq>; | ||
149 | vmmc-supply = <&vcc_3v3>; | ||
150 | vqmmc-supply = <&vddio_boot>; | ||
151 | }; | ||
152 | |||
153 | &pwm_ef { | ||
154 | status = "okay"; | ||
155 | pinctrl-0 = <&pwm_e_pins>; | ||
156 | pinctrl-names = "default"; | ||
157 | clocks = <&clkc CLKID_FCLK_DIV4>; | ||
158 | clock-names = "clkin0"; | ||
159 | }; | ||
160 | |||
161 | /* This is connected to the Bluetooth module: */ | ||
162 | &uart_A { | ||
163 | status = "okay"; | ||
164 | pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; | ||
165 | pinctrl-names = "default"; | ||
166 | uart-has-rtscts; | ||
167 | }; | ||
168 | |||
169 | &uart_AO { | ||
170 | status = "okay"; | ||
171 | pinctrl-0 = <&uart_ao_a_pins>; | ||
172 | pinctrl-names = "default"; | ||
173 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi index 08237ee1e362..0f78d836edaf 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi | |||
@@ -42,6 +42,7 @@ | |||
42 | */ | 42 | */ |
43 | 43 | ||
44 | #include "meson-gxl.dtsi" | 44 | #include "meson-gxl.dtsi" |
45 | #include "meson-gxl-mali.dtsi" | ||
45 | 46 | ||
46 | / { | 47 | / { |
47 | compatible = "amlogic,s905x", "amlogic,meson-gxl"; | 48 | compatible = "amlogic,s905x", "amlogic,meson-gxl"; |
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index fe11b5fc61f7..d8e096dff10a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | |||
@@ -44,6 +44,7 @@ | |||
44 | #include "meson-gx.dtsi" | 44 | #include "meson-gx.dtsi" |
45 | #include <dt-bindings/clock/gxbb-clkc.h> | 45 | #include <dt-bindings/clock/gxbb-clkc.h> |
46 | #include <dt-bindings/gpio/meson-gxl-gpio.h> | 46 | #include <dt-bindings/gpio/meson-gxl-gpio.h> |
47 | #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> | ||
47 | 48 | ||
48 | / { | 49 | / { |
49 | compatible = "amlogic,meson-gxl"; | 50 | compatible = "amlogic,meson-gxl"; |
@@ -79,6 +80,7 @@ | |||
79 | reg-names = "mux", "pull", "gpio"; | 80 | reg-names = "mux", "pull", "gpio"; |
80 | gpio-controller; | 81 | gpio-controller; |
81 | #gpio-cells = <2>; | 82 | #gpio-cells = <2>; |
83 | gpio-ranges = <&pinctrl_aobus 0 0 14>; | ||
82 | }; | 84 | }; |
83 | 85 | ||
84 | uart_ao_a_pins: uart_ao_a { | 86 | uart_ao_a_pins: uart_ao_a { |
@@ -103,6 +105,13 @@ | |||
103 | }; | 105 | }; |
104 | }; | 106 | }; |
105 | 107 | ||
108 | uart_ao_b_0_1_pins: uart_ao_b_0_1 { | ||
109 | mux { | ||
110 | groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1"; | ||
111 | function = "uart_ao_b"; | ||
112 | }; | ||
113 | }; | ||
114 | |||
106 | uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { | 115 | uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { |
107 | mux { | 116 | mux { |
108 | groups = "uart_cts_ao_b", | 117 | groups = "uart_cts_ao_b", |
@@ -118,12 +127,69 @@ | |||
118 | }; | 127 | }; |
119 | }; | 128 | }; |
120 | 129 | ||
130 | i2c_ao_pins: i2c_ao { | ||
131 | mux { | ||
132 | groups = "i2c_sck_ao", | ||
133 | "i2c_sda_ao"; | ||
134 | function = "i2c_ao"; | ||
135 | }; | ||
136 | }; | ||
137 | |||
138 | pwm_ao_a_3_pins: pwm_ao_a_3 { | ||
139 | mux { | ||
140 | groups = "pwm_ao_a_3"; | ||
141 | function = "pwm_ao_a"; | ||
142 | }; | ||
143 | }; | ||
144 | |||
145 | pwm_ao_a_8_pins: pwm_ao_a_8 { | ||
146 | mux { | ||
147 | groups = "pwm_ao_a_8"; | ||
148 | function = "pwm_ao_a"; | ||
149 | }; | ||
150 | }; | ||
151 | |||
121 | pwm_ao_b_pins: pwm_ao_b { | 152 | pwm_ao_b_pins: pwm_ao_b { |
122 | mux { | 153 | mux { |
123 | groups = "pwm_ao_b"; | 154 | groups = "pwm_ao_b"; |
124 | function = "pwm_ao_b"; | 155 | function = "pwm_ao_b"; |
125 | }; | 156 | }; |
126 | }; | 157 | }; |
158 | |||
159 | pwm_ao_b_6_pins: pwm_ao_b_6 { | ||
160 | mux { | ||
161 | groups = "pwm_ao_b_6"; | ||
162 | function = "pwm_ao_b"; | ||
163 | }; | ||
164 | }; | ||
165 | |||
166 | i2s_out_ch23_ao_pins: i2s_out_ch23_ao { | ||
167 | mux { | ||
168 | groups = "i2s_out_ch23_ao"; | ||
169 | function = "i2s_out_ao"; | ||
170 | }; | ||
171 | }; | ||
172 | |||
173 | i2s_out_ch45_ao_pins: i2s_out_ch45_ao { | ||
174 | mux { | ||
175 | groups = "i2s_out_ch45_ao"; | ||
176 | function = "i2s_out_ao"; | ||
177 | }; | ||
178 | }; | ||
179 | |||
180 | spdif_out_ao_6_pins: spdif_out_ao_6 { | ||
181 | mux { | ||
182 | groups = "spdif_out_ao_6"; | ||
183 | function = "spdif_out_ao"; | ||
184 | }; | ||
185 | }; | ||
186 | |||
187 | spdif_out_ao_9_pins: spdif_out_ao_9 { | ||
188 | mux { | ||
189 | groups = "spdif_out_ao_9"; | ||
190 | function = "spdif_out_ao"; | ||
191 | }; | ||
192 | }; | ||
127 | }; | 193 | }; |
128 | }; | 194 | }; |
129 | 195 | ||
@@ -142,6 +208,7 @@ | |||
142 | reg-names = "mux", "pull", "pull-enable", "gpio"; | 208 | reg-names = "mux", "pull", "pull-enable", "gpio"; |
143 | gpio-controller; | 209 | gpio-controller; |
144 | #gpio-cells = <2>; | 210 | #gpio-cells = <2>; |
211 | gpio-ranges = <&pinctrl_periphs 0 14 101>; | ||
145 | }; | 212 | }; |
146 | 213 | ||
147 | emmc_pins: emmc { | 214 | emmc_pins: emmc { |
@@ -154,6 +221,16 @@ | |||
154 | }; | 221 | }; |
155 | }; | 222 | }; |
156 | 223 | ||
224 | nor_pins: nor { | ||
225 | mux { | ||
226 | groups = "nor_d", | ||
227 | "nor_q", | ||
228 | "nor_c", | ||
229 | "nor_cs"; | ||
230 | function = "nor"; | ||
231 | }; | ||
232 | }; | ||
233 | |||
157 | sdcard_pins: sdcard { | 234 | sdcard_pins: sdcard { |
158 | mux { | 235 | mux { |
159 | groups = "sdcard_d0", | 236 | groups = "sdcard_d0", |
@@ -277,6 +354,34 @@ | |||
277 | }; | 354 | }; |
278 | }; | 355 | }; |
279 | 356 | ||
357 | pwm_a_pins: pwm_a { | ||
358 | mux { | ||
359 | groups = "pwm_a"; | ||
360 | function = "pwm_a"; | ||
361 | }; | ||
362 | }; | ||
363 | |||
364 | pwm_b_pins: pwm_b { | ||
365 | mux { | ||
366 | groups = "pwm_b"; | ||
367 | function = "pwm_b"; | ||
368 | }; | ||
369 | }; | ||
370 | |||
371 | pwm_c_pins: pwm_c { | ||
372 | mux { | ||
373 | groups = "pwm_c"; | ||
374 | function = "pwm_c"; | ||
375 | }; | ||
376 | }; | ||
377 | |||
378 | pwm_d_pins: pwm_d { | ||
379 | mux { | ||
380 | groups = "pwm_d"; | ||
381 | function = "pwm_d"; | ||
382 | }; | ||
383 | }; | ||
384 | |||
280 | pwm_e_pins: pwm_e { | 385 | pwm_e_pins: pwm_e { |
281 | mux { | 386 | mux { |
282 | groups = "pwm_e"; | 387 | groups = "pwm_e"; |
@@ -284,6 +389,20 @@ | |||
284 | }; | 389 | }; |
285 | }; | 390 | }; |
286 | 391 | ||
392 | pwm_f_clk_pins: pwm_f_clk { | ||
393 | mux { | ||
394 | groups = "pwm_f_clk"; | ||
395 | function = "pwm_f"; | ||
396 | }; | ||
397 | }; | ||
398 | |||
399 | pwm_f_x_pins: pwm_f_x { | ||
400 | mux { | ||
401 | groups = "pwm_f_x"; | ||
402 | function = "pwm_f"; | ||
403 | }; | ||
404 | }; | ||
405 | |||
287 | hdmi_hpd_pins: hdmi_hpd { | 406 | hdmi_hpd_pins: hdmi_hpd { |
288 | mux { | 407 | mux { |
289 | groups = "hdmi_hpd"; | 408 | groups = "hdmi_hpd"; |
@@ -297,6 +416,61 @@ | |||
297 | function = "hdmi_i2c"; | 416 | function = "hdmi_i2c"; |
298 | }; | 417 | }; |
299 | }; | 418 | }; |
419 | |||
420 | i2s_am_clk_pins: i2s_am_clk { | ||
421 | mux { | ||
422 | groups = "i2s_am_clk"; | ||
423 | function = "i2s_out"; | ||
424 | }; | ||
425 | }; | ||
426 | |||
427 | i2s_out_ao_clk_pins: i2s_out_ao_clk { | ||
428 | mux { | ||
429 | groups = "i2s_out_ao_clk"; | ||
430 | function = "i2s_out"; | ||
431 | }; | ||
432 | }; | ||
433 | |||
434 | i2s_out_lr_clk_pins: i2s_out_lr_clk { | ||
435 | mux { | ||
436 | groups = "i2s_out_lr_clk"; | ||
437 | function = "i2s_out"; | ||
438 | }; | ||
439 | }; | ||
440 | |||
441 | i2s_out_ch01_pins: i2s_out_ch01 { | ||
442 | mux { | ||
443 | groups = "i2s_out_ch01"; | ||
444 | function = "i2s_out"; | ||
445 | }; | ||
446 | }; | ||
447 | i2sout_ch23_z_pins: i2sout_ch23_z { | ||
448 | mux { | ||
449 | groups = "i2sout_ch23_z"; | ||
450 | function = "i2s_out"; | ||
451 | }; | ||
452 | }; | ||
453 | |||
454 | i2sout_ch45_z_pins: i2sout_ch45_z { | ||
455 | mux { | ||
456 | groups = "i2sout_ch45_z"; | ||
457 | function = "i2s_out"; | ||
458 | }; | ||
459 | }; | ||
460 | |||
461 | i2sout_ch67_z_pins: i2sout_ch67_z { | ||
462 | mux { | ||
463 | groups = "i2sout_ch67_z"; | ||
464 | function = "i2s_out"; | ||
465 | }; | ||
466 | }; | ||
467 | |||
468 | spdif_out_h_pins: spdif_out_ao_h { | ||
469 | mux { | ||
470 | groups = "spdif_out_h"; | ||
471 | function = "spdif_out"; | ||
472 | }; | ||
473 | }; | ||
300 | }; | 474 | }; |
301 | 475 | ||
302 | eth-phy-mux { | 476 | eth-phy-mux { |
@@ -339,6 +513,10 @@ | |||
339 | clocks = <&clkc CLKID_I2C>; | 513 | clocks = <&clkc CLKID_I2C>; |
340 | }; | 514 | }; |
341 | 515 | ||
516 | &i2c_AO { | ||
517 | clocks = <&clkc CLKID_AO_I2C>; | ||
518 | }; | ||
519 | |||
342 | &i2c_B { | 520 | &i2c_B { |
343 | clocks = <&clkc CLKID_I2C>; | 521 | clocks = <&clkc CLKID_I2C>; |
344 | }; | 522 | }; |
@@ -378,6 +556,22 @@ | |||
378 | clock-names = "core", "clkin0", "clkin1"; | 556 | clock-names = "core", "clkin0", "clkin1"; |
379 | }; | 557 | }; |
380 | 558 | ||
559 | &spifc { | ||
560 | clocks = <&clkc CLKID_SPI>; | ||
561 | }; | ||
562 | |||
381 | &vpu { | 563 | &vpu { |
382 | compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; | 564 | compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; |
383 | }; | 565 | }; |
566 | |||
567 | &hdmi_tx { | ||
568 | compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; | ||
569 | resets = <&reset RESET_HDMITX_CAPB3>, | ||
570 | <&reset RESET_HDMI_SYSTEM_RESET>, | ||
571 | <&reset RESET_HDMI_TX>; | ||
572 | reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; | ||
573 | clocks = <&clkc CLKID_HDMI_PCLK>, | ||
574 | <&clkc CLKID_CLK81>, | ||
575 | <&clkc CLKID_GCLK_VENCI_INT0>; | ||
576 | clock-names = "isfr", "iahb", "venci"; | ||
577 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts index 5a337d339df1..11b0bf46a95c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | |||
@@ -100,6 +100,17 @@ | |||
100 | }; | 100 | }; |
101 | }; | 101 | }; |
102 | }; | 102 | }; |
103 | |||
104 | hdmi-connector { | ||
105 | compatible = "hdmi-connector"; | ||
106 | type = "a"; | ||
107 | |||
108 | port { | ||
109 | hdmi_connector_in: endpoint { | ||
110 | remote-endpoint = <&hdmi_tx_tmds_out>; | ||
111 | }; | ||
112 | }; | ||
113 | }; | ||
103 | }; | 114 | }; |
104 | 115 | ||
105 | /* This UART is brought out to the DB9 connector */ | 116 | /* This UART is brought out to the DB9 connector */ |
@@ -162,6 +173,8 @@ | |||
162 | /* Select external PHY by default */ | 173 | /* Select external PHY by default */ |
163 | phy-handle = <&external_phy>; | 174 | phy-handle = <&external_phy>; |
164 | 175 | ||
176 | amlogic,tx-delay-ns = <2>; | ||
177 | |||
165 | snps,reset-gpio = <&gpio GPIOZ_14 0>; | 178 | snps,reset-gpio = <&gpio GPIOZ_14 0>; |
166 | snps,reset-delays-us = <0 10000 1000000>; | 179 | snps,reset-delays-us = <0 10000 1000000>; |
167 | snps,reset-active-low; | 180 | snps,reset-active-low; |
@@ -183,3 +196,15 @@ | |||
183 | remote-endpoint = <&cvbs_connector_in>; | 196 | remote-endpoint = <&cvbs_connector_in>; |
184 | }; | 197 | }; |
185 | }; | 198 | }; |
199 | |||
200 | &hdmi_tx { | ||
201 | status = "okay"; | ||
202 | pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; | ||
203 | pinctrl-names = "default"; | ||
204 | }; | ||
205 | |||
206 | &hdmi_tx_tmds_port { | ||
207 | hdmi_tx_tmds_out: endpoint { | ||
208 | remote-endpoint = <&hdmi_connector_in>; | ||
209 | }; | ||
210 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts index 5dbc66088355..b65776b01911 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts | |||
@@ -43,12 +43,47 @@ | |||
43 | 43 | ||
44 | /dts-v1/; | 44 | /dts-v1/; |
45 | 45 | ||
46 | #include <dt-bindings/input/input.h> | ||
47 | |||
46 | #include "meson-gxm.dtsi" | 48 | #include "meson-gxm.dtsi" |
47 | #include "meson-gx-p23x-q20x.dtsi" | 49 | #include "meson-gx-p23x-q20x.dtsi" |
48 | 50 | ||
49 | / { | 51 | / { |
50 | compatible = "amlogic,q200", "amlogic,s912", "amlogic,meson-gxm"; | 52 | compatible = "amlogic,q200", "amlogic,s912", "amlogic,meson-gxm"; |
51 | model = "Amlogic Meson GXM (S912) Q200 Development Board"; | 53 | model = "Amlogic Meson GXM (S912) Q200 Development Board"; |
54 | |||
55 | adc-keys { | ||
56 | compatible = "adc-keys"; | ||
57 | io-channels = <&saradc 0>; | ||
58 | io-channel-names = "buttons"; | ||
59 | keyup-threshold-microvolt = <1710000>; | ||
60 | |||
61 | button-function { | ||
62 | label = "Update"; | ||
63 | linux,code = <KEY_VENDOR>; | ||
64 | press-threshold-microvolt = <10000>; | ||
65 | }; | ||
66 | }; | ||
67 | |||
68 | gpio-keys-polled { | ||
69 | compatible = "gpio-keys-polled"; | ||
70 | #address-cells = <1>; | ||
71 | #size-cells = <0>; | ||
72 | poll-interval = <100>; | ||
73 | |||
74 | button@0 { | ||
75 | label = "power"; | ||
76 | linux,code = <KEY_POWER>; | ||
77 | gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; | ||
78 | }; | ||
79 | }; | ||
80 | |||
81 | vddio_ao18: regulator-vddio_ao18 { | ||
82 | compatible = "regulator-fixed"; | ||
83 | regulator-name = "VDDIO_AO18"; | ||
84 | regulator-min-microvolt = <1800000>; | ||
85 | regulator-max-microvolt = <1800000>; | ||
86 | }; | ||
52 | }; | 87 | }; |
53 | 88 | ||
54 | /* Q200 has exclusive choice between internal or external PHY */ | 89 | /* Q200 has exclusive choice between internal or external PHY */ |
@@ -59,6 +94,8 @@ | |||
59 | /* Select external PHY by default */ | 94 | /* Select external PHY by default */ |
60 | phy-handle = <&external_phy>; | 95 | phy-handle = <&external_phy>; |
61 | 96 | ||
97 | amlogic,tx-delay-ns = <2>; | ||
98 | |||
62 | /* External PHY reset is shared with internal PHY Led signals */ | 99 | /* External PHY reset is shared with internal PHY Led signals */ |
63 | snps,reset-gpio = <&gpio GPIOZ_14 0>; | 100 | snps,reset-gpio = <&gpio GPIOZ_14 0>; |
64 | snps,reset-delays-us = <0 10000 1000000>; | 101 | snps,reset-delays-us = <0 10000 1000000>; |
@@ -75,3 +112,8 @@ | |||
75 | max-speed = <1000>; | 112 | max-speed = <1000>; |
76 | }; | 113 | }; |
77 | }; | 114 | }; |
115 | |||
116 | &saradc { | ||
117 | status = "okay"; | ||
118 | vref-supply = <&vddio_ao18>; | ||
119 | }; | ||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi index ddea7305c644..fe451cce93e7 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | |||
@@ -130,3 +130,6 @@ | |||
130 | compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu"; | 130 | compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu"; |
131 | }; | 131 | }; |
132 | 132 | ||
133 | &hdmi_tx { | ||
134 | compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; | ||
135 | }; | ||
diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index 8ee2022ce5d5..e5c49923a24b 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h | |||
@@ -177,7 +177,7 @@ | |||
177 | /* CLKID_FCLK_DIV4 */ | 177 | /* CLKID_FCLK_DIV4 */ |
178 | #define CLKID_FCLK_DIV5 7 | 178 | #define CLKID_FCLK_DIV5 7 |
179 | #define CLKID_FCLK_DIV7 8 | 179 | #define CLKID_FCLK_DIV7 8 |
180 | #define CLKID_GP0_PLL 9 | 180 | /* CLKID_GP0_PLL */ |
181 | #define CLKID_MPEG_SEL 10 | 181 | #define CLKID_MPEG_SEL 10 |
182 | #define CLKID_MPEG_DIV 11 | 182 | #define CLKID_MPEG_DIV 11 |
183 | /* CLKID_CLK81 */ | 183 | /* CLKID_CLK81 */ |
@@ -206,16 +206,16 @@ | |||
206 | #define CLKID_I2S_SPDIF 35 | 206 | #define CLKID_I2S_SPDIF 35 |
207 | /* CLKID_ETH */ | 207 | /* CLKID_ETH */ |
208 | #define CLKID_DEMUX 37 | 208 | #define CLKID_DEMUX 37 |
209 | #define CLKID_AIU_GLUE 38 | 209 | /* CLKID_AIU_GLUE */ |
210 | #define CLKID_IEC958 39 | 210 | #define CLKID_IEC958 39 |
211 | #define CLKID_I2S_OUT 40 | 211 | /* CLKID_I2S_OUT */ |
212 | #define CLKID_AMCLK 41 | 212 | #define CLKID_AMCLK 41 |
213 | #define CLKID_AIFIFO2 42 | 213 | #define CLKID_AIFIFO2 42 |
214 | #define CLKID_MIXER 43 | 214 | #define CLKID_MIXER 43 |
215 | #define CLKID_MIXER_IFACE 44 | 215 | /* CLKID_MIXER_IFACE */ |
216 | #define CLKID_ADC 45 | 216 | #define CLKID_ADC 45 |
217 | #define CLKID_BLKMV 46 | 217 | #define CLKID_BLKMV 46 |
218 | #define CLKID_AIU 47 | 218 | /* CLKID_AIU */ |
219 | #define CLKID_UART1 48 | 219 | #define CLKID_UART1 48 |
220 | #define CLKID_G2D 49 | 220 | #define CLKID_G2D 49 |
221 | /* CLKID_USB0 */ | 221 | /* CLKID_USB0 */ |
@@ -248,7 +248,7 @@ | |||
248 | /* CLKID_GCLK_VENCI_INT0 */ | 248 | /* CLKID_GCLK_VENCI_INT0 */ |
249 | #define CLKID_GCLK_VENCI_INT 78 | 249 | #define CLKID_GCLK_VENCI_INT 78 |
250 | #define CLKID_DAC_CLK 79 | 250 | #define CLKID_DAC_CLK 79 |
251 | #define CLKID_AOCLK_GATE 80 | 251 | /* CLKID_AOCLK_GATE */ |
252 | #define CLKID_IEC958_GATE 81 | 252 | #define CLKID_IEC958_GATE 81 |
253 | #define CLKID_ENC480P 82 | 253 | #define CLKID_ENC480P 82 |
254 | #define CLKID_RNG1 83 | 254 | #define CLKID_RNG1 83 |
@@ -268,8 +268,15 @@ | |||
268 | /* CLKID_SAR_ADC_CLK */ | 268 | /* CLKID_SAR_ADC_CLK */ |
269 | /* CLKID_SAR_ADC_SEL */ | 269 | /* CLKID_SAR_ADC_SEL */ |
270 | #define CLKID_SAR_ADC_DIV 99 | 270 | #define CLKID_SAR_ADC_DIV 99 |
271 | /* CLKID_MALI_0_SEL */ | ||
272 | #define CLKID_MALI_0_DIV 101 | ||
273 | /* CLKID_MALI_0 */ | ||
274 | /* CLKID_MALI_1_SEL */ | ||
275 | #define CLKID_MALI_1_DIV 104 | ||
276 | /* CLKID_MALI_1 */ | ||
277 | /* CLKID_MALI */ | ||
271 | 278 | ||
272 | #define NR_CLKS 100 | 279 | #define NR_CLKS 107 |
273 | 280 | ||
274 | /* include the CLKIDs that have been made part of the stable DT binding */ | 281 | /* include the CLKIDs that have been made part of the stable DT binding */ |
275 | #include <dt-bindings/clock/gxbb-clkc.h> | 282 | #include <dt-bindings/clock/gxbb-clkc.h> |
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index 692846c7941b..cce6cb5418f1 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h | |||
@@ -10,12 +10,17 @@ | |||
10 | #define CLKID_FCLK_DIV2 4 | 10 | #define CLKID_FCLK_DIV2 4 |
11 | #define CLKID_FCLK_DIV3 5 | 11 | #define CLKID_FCLK_DIV3 5 |
12 | #define CLKID_FCLK_DIV4 6 | 12 | #define CLKID_FCLK_DIV4 6 |
13 | #define CLKID_GP0_PLL 9 | ||
13 | #define CLKID_CLK81 12 | 14 | #define CLKID_CLK81 12 |
14 | #define CLKID_MPLL2 15 | 15 | #define CLKID_MPLL2 15 |
15 | #define CLKID_SPI 34 | 16 | #define CLKID_SPI 34 |
16 | #define CLKID_I2C 22 | 17 | #define CLKID_I2C 22 |
17 | #define CLKID_SAR_ADC 23 | 18 | #define CLKID_SAR_ADC 23 |
18 | #define CLKID_ETH 36 | 19 | #define CLKID_ETH 36 |
20 | #define CLKID_AIU_GLUE 38 | ||
21 | #define CLKID_I2S_OUT 40 | ||
22 | #define CLKID_MIXER_IFACE 44 | ||
23 | #define CLKID_AIU 47 | ||
19 | #define CLKID_USB0 50 | 24 | #define CLKID_USB0 50 |
20 | #define CLKID_USB1 51 | 25 | #define CLKID_USB1 51 |
21 | #define CLKID_USB 55 | 26 | #define CLKID_USB 55 |
@@ -24,11 +29,17 @@ | |||
24 | #define CLKID_USB0_DDR_BRIDGE 65 | 29 | #define CLKID_USB0_DDR_BRIDGE 65 |
25 | #define CLKID_SANA 69 | 30 | #define CLKID_SANA 69 |
26 | #define CLKID_GCLK_VENCI_INT0 77 | 31 | #define CLKID_GCLK_VENCI_INT0 77 |
32 | #define CLKID_AOCLK_GATE 80 | ||
27 | #define CLKID_AO_I2C 93 | 33 | #define CLKID_AO_I2C 93 |
28 | #define CLKID_SD_EMMC_A 94 | 34 | #define CLKID_SD_EMMC_A 94 |
29 | #define CLKID_SD_EMMC_B 95 | 35 | #define CLKID_SD_EMMC_B 95 |
30 | #define CLKID_SD_EMMC_C 96 | 36 | #define CLKID_SD_EMMC_C 96 |
31 | #define CLKID_SAR_ADC_CLK 97 | 37 | #define CLKID_SAR_ADC_CLK 97 |
32 | #define CLKID_SAR_ADC_SEL 98 | 38 | #define CLKID_SAR_ADC_SEL 98 |
39 | #define CLKID_MALI_0_SEL 100 | ||
40 | #define CLKID_MALI_0 102 | ||
41 | #define CLKID_MALI_1_SEL 103 | ||
42 | #define CLKID_MALI_1 105 | ||
43 | #define CLKID_MALI 106 | ||
33 | 44 | ||
34 | #endif /* __GXBB_CLKC_H */ | 45 | #endif /* __GXBB_CLKC_H */ |