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authorOscar Salvador <osalvador.vilardaga@gmail.com>2017-05-18 17:24:35 -0400
committerBen Skeggs <bskeggs@redhat.com>2017-06-16 00:05:02 -0400
commitdbddaaf083e255958eee9debb441fb49f3dfc0e9 (patch)
tree586a2c2f0185300f6af60e37de459f7eae57c45c
parent02e9722da85246c748894734961fbfe0e543c66d (diff)
drm/nouveau/hwmon: Add nouveau_hwmon_ops structure with .is_visible/.read_string
This patch introduces the nouveau_hwmon_ops structure, sets up .is_visible and .read_string operations and adds all the functions for these operations. This is also a preparation for the next patches, where most of the work is being done. This code doesn't interacture with the old one. It's just to make easier the review of all patches. Signed-off-by: Oscar Salvador <osalvador.vilardaga@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_hwmon.c163
1 files changed, 163 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_hwmon.c b/drivers/gpu/drm/nouveau/nouveau_hwmon.c
index 24b40c5f0836..5ae3107d73df 100644
--- a/drivers/gpu/drm/nouveau/nouveau_hwmon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_hwmon.c
@@ -764,6 +764,169 @@ static const struct hwmon_channel_info *nouveau_info[] = {
764 &nouveau_power, 764 &nouveau_power,
765 NULL 765 NULL
766}; 766};
767
768static umode_t
769nouveau_chip_is_visible(const void *data, u32 attr, int channel)
770{
771 switch (attr) {
772 case hwmon_chip_update_interval:
773 return 0444;
774 default:
775 return 0;
776 }
777}
778
779static umode_t
780nouveau_power_is_visible(const void *data, u32 attr, int channel)
781{
782 struct nouveau_drm *drm = nouveau_drm((struct drm_device *)data);
783 struct nvkm_iccsense *iccsense = nvxx_iccsense(&drm->client.device);
784
785 if (!iccsense || !iccsense->data_valid || list_empty(&iccsense->rails))
786 return 0;
787
788 switch (attr) {
789 case hwmon_power_input:
790 return 0444;
791 case hwmon_power_max:
792 if (iccsense->power_w_max)
793 return 0444;
794 return 0;
795 case hwmon_power_crit:
796 if (iccsense->power_w_crit)
797 return 0444;
798 return 0;
799 default:
800 return 0;
801 }
802}
803
804static umode_t
805nouveau_temp_is_visible(const void *data, u32 attr, int channel)
806{
807 struct nouveau_drm *drm = nouveau_drm((struct drm_device *)data);
808 struct nvkm_therm *therm = nvxx_therm(&drm->client.device);
809
810 if (therm && therm->attr_get && nvkm_therm_temp_get(therm) < 0)
811 return 0;
812
813 switch (attr) {
814 case hwmon_temp_input:
815 case hwmon_temp_max:
816 case hwmon_temp_max_hyst:
817 case hwmon_temp_crit:
818 case hwmon_temp_crit_hyst:
819 case hwmon_temp_emergency:
820 case hwmon_temp_emergency_hyst:
821 return 0444;
822 default:
823 return 0;
824 }
825}
826
827static umode_t
828nouveau_pwm_is_visible(const void *data, u32 attr, int channel)
829{
830 struct nouveau_drm *drm = nouveau_drm((struct drm_device *)data);
831 struct nvkm_therm *therm = nvxx_therm(&drm->client.device);
832
833 if (therm && therm->attr_get && therm->fan_get &&
834 therm->fan_get(therm) < 0)
835 return 0;
836
837 switch (attr) {
838 case hwmon_pwm_enable:
839 case hwmon_pwm_input:
840 return 0644;
841 default:
842 return 0;
843 }
844}
845
846static umode_t
847nouveau_input_is_visible(const void *data, u32 attr, int channel)
848{
849 struct nouveau_drm *drm = nouveau_drm((struct drm_device *)data);
850 struct nvkm_volt *volt = nvxx_volt(&drm->client.device);
851
852 if (!volt || nvkm_volt_get(volt) < 0)
853 return 0;
854
855 switch (attr) {
856 case hwmon_in_input:
857 case hwmon_in_label:
858 case hwmon_in_min:
859 case hwmon_in_max:
860 return 0444;
861 default:
862 return 0;
863 }
864}
865
866static umode_t
867nouveau_fan_is_visible(const void *data, u32 attr, int channel)
868{
869 struct nouveau_drm *drm = nouveau_drm((struct drm_device *)data);
870 struct nvkm_therm *therm = nvxx_therm(&drm->client.device);
871
872 if (!therm || !therm->attr_get || nvkm_therm_fan_sense(therm) < 0)
873 return 0;
874
875 switch (attr) {
876 case hwmon_fan_input:
877 return 0444;
878 default:
879 return 0;
880 }
881}
882
883static umode_t
884nouveau_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
885 int channel)
886{
887 switch (type) {
888 case hwmon_chip:
889 return nouveau_chip_is_visible(data, attr, channel);
890 case hwmon_temp:
891 return nouveau_temp_is_visible(data, attr, channel);
892 case hwmon_fan:
893 return nouveau_fan_is_visible(data, attr, channel);
894 case hwmon_in:
895 return nouveau_input_is_visible(data, attr, channel);
896 case hwmon_pwm:
897 return nouveau_pwm_is_visible(data, attr, channel);
898 case hwmon_power:
899 return nouveau_power_is_visible(data, attr, channel);
900 default:
901 return 0;
902 }
903}
904
905static const char input_label[] = "GPU core";
906
907static int
908nouveau_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr,
909 int channel, const char **buf)
910{
911 if (type == hwmon_in && attr == hwmon_in_label) {
912 *buf = input_label;
913 return 0;
914 }
915
916 return -EOPNOTSUPP;
917}
918
919static const struct hwmon_ops nouveau_hwmon_ops = {
920 .is_visible = nouveau_is_visible,
921 .read = NULL,
922 .read_string = nouveau_read_string,
923 .write = NULL,
924};
925
926static const struct hwmon_chip_info nouveau_chip_info = {
927 .ops = &nouveau_hwmon_ops,
928 .info = nouveau_info,
929};
767#endif 930#endif
768 931
769int 932int