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authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>2017-09-04 02:58:37 -0400
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-10-15 05:09:01 -0400
commitdba74980023656717edaec2d48baa5d35f8ff886 (patch)
treead7c4777383bf9777f64593606dc5e4687948a22
parent2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e (diff)
arm64: dts: uniphier: add nodes of thermal monitor and thermal zone for LD20
Add nodes of thermal monitor and thermal zone for UniPhier LD20 SoC. The thermal monitor node is included in sysctrl. Since the efuse might not have a calibrated value of thermal monitor, this patch gives the default value for LD20. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi45
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index a29c279b6e8e..bc8fe5529f68 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -7,6 +7,8 @@
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 */ 8 */
9 9
10#include <dt-bindings/thermal/thermal.h>
11
10/memreserve/ 0x80000000 0x02000000; 12/memreserve/ 0x80000000 0x02000000;
11 13
12/ { 14/ {
@@ -46,6 +48,7 @@
46 clocks = <&sys_clk 32>; 48 clocks = <&sys_clk 32>;
47 enable-method = "psci"; 49 enable-method = "psci";
48 operating-points-v2 = <&cluster0_opp>; 50 operating-points-v2 = <&cluster0_opp>;
51 #cooling-cells = <2>;
49 }; 52 };
50 53
51 cpu1: cpu@1 { 54 cpu1: cpu@1 {
@@ -64,6 +67,7 @@
64 clocks = <&sys_clk 33>; 67 clocks = <&sys_clk 33>;
65 enable-method = "psci"; 68 enable-method = "psci";
66 operating-points-v2 = <&cluster1_opp>; 69 operating-points-v2 = <&cluster1_opp>;
70 #cooling-cells = <2>;
67 }; 71 };
68 72
69 cpu3: cpu@101 { 73 cpu3: cpu@101 {
@@ -173,6 +177,40 @@
173 <1 10 4>; 177 <1 10 4>;
174 }; 178 };
175 179
180 thermal-zones {
181 cpu-thermal {
182 polling-delay-passive = <250>; /* 250ms */
183 polling-delay = <1000>; /* 1000ms */
184 thermal-sensors = <&pvtctl>;
185
186 trips {
187 cpu_crit: cpu-crit {
188 temperature = <110000>; /* 110C */
189 hysteresis = <2000>;
190 type = "critical";
191 };
192 cpu_alert: cpu-alert {
193 temperature = <100000>; /* 100C */
194 hysteresis = <2000>;
195 type = "passive";
196 };
197 };
198
199 cooling-maps {
200 map0 {
201 trip = <&cpu_alert>;
202 cooling-device = <&cpu0
203 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
204 };
205 map1 {
206 trip = <&cpu_alert>;
207 cooling-device = <&cpu2
208 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
209 };
210 };
211 };
212 };
213
176 soc@0 { 214 soc@0 {
177 compatible = "simple-bus"; 215 compatible = "simple-bus";
178 #address-cells = <1>; 216 #address-cells = <1>;
@@ -410,6 +448,13 @@
410 watchdog { 448 watchdog {
411 compatible = "socionext,uniphier-wdt"; 449 compatible = "socionext,uniphier-wdt";
412 }; 450 };
451
452 pvtctl: pvtctl {
453 compatible = "socionext,uniphier-ld20-thermal";
454 interrupts = <0 3 4>;
455 #thermal-sensor-cells = <0>;
456 socionext,tmod-calibration = <0x0f22 0x68ee>;
457 };
413 }; 458 };
414 459
415 nand: nand@68000000 { 460 nand: nand@68000000 {