diff options
author | Pierre-Hugues Husson <phh@phh.me> | 2017-10-13 18:53:36 -0400 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2017-10-15 08:10:14 -0400 |
commit | db2fd26dbe0e9e64ca87029e7ffe501486c66495 (patch) | |
tree | 5b59fa410b70df24298a160e79df98f75e36edb1 | |
parent | 689f2d8582eb4ce3b9eed7f15b716f929606e17a (diff) |
arm64: dts: rockchip: add the cec clk for dw-mipi-hdmi on rk3399
Add the HDMI CEC controller main clock coming from the CRU.
Signed-off-by: Pierre-Hugues Husson <phh@phh.me>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index d79e9b3265b9..4403b516d0e3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi | |||
@@ -1601,8 +1601,12 @@ | |||
1601 | compatible = "rockchip,rk3399-dw-hdmi"; | 1601 | compatible = "rockchip,rk3399-dw-hdmi"; |
1602 | reg = <0x0 0xff940000 0x0 0x20000>; | 1602 | reg = <0x0 0xff940000 0x0 0x20000>; |
1603 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>; | 1603 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>; |
1604 | clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, <&cru PLL_VPLL>, <&cru PCLK_VIO_GRF>; | 1604 | clocks = <&cru PCLK_HDMI_CTRL>, |
1605 | clock-names = "iahb", "isfr", "vpll", "grf"; | 1605 | <&cru SCLK_HDMI_SFR>, |
1606 | <&cru PLL_VPLL>, | ||
1607 | <&cru PCLK_VIO_GRF>, | ||
1608 | <&cru SCLK_HDMI_CEC>; | ||
1609 | clock-names = "iahb", "isfr", "vpll", "grf", "cec"; | ||
1606 | power-domains = <&power RK3399_PD_HDCP>; | 1610 | power-domains = <&power RK3399_PD_HDCP>; |
1607 | reg-io-width = <4>; | 1611 | reg-io-width = <4>; |
1608 | rockchip,grf = <&grf>; | 1612 | rockchip,grf = <&grf>; |