diff options
author | Tony Lindgren <tony@atomide.com> | 2016-02-22 12:22:38 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2016-02-22 12:22:38 -0500 |
commit | d9d806b90260fbcd9bd1d43db492bfcbc19f014a (patch) | |
tree | 80393451efc7ae029db349d50a39abd89d6bc0a8 | |
parent | baa10e0dd2090d7db3a9ab47978ab95cc65b76f1 (diff) |
ARM: OMAP2+: Fix out of range register access with syscon_config.max_register
If syscon_config.max_register is initialized like it should be, we have
omap_ctrl_read/write() fail with out of range register access at least
for omap3.
We have omap3.dtsi setting up a regmap range for scm_conf, but we now
have omap_ctrl_read/write() also attempt to use the regmap. However,
omap_ctrl_read/write() is also used for other register ranges in the
system control module (SCM).
Let's fix the issue by just removing the regmap_read/write() usage for
control module as suggested by Tero Kristo <t-kristo@ti.com>.
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/mach-omap2/control.c | 21 |
1 files changed, 2 insertions, 19 deletions
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index cf5855174c93..1662071bb2cc 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c | |||
@@ -36,7 +36,6 @@ | |||
36 | 36 | ||
37 | static void __iomem *omap2_ctrl_base; | 37 | static void __iomem *omap2_ctrl_base; |
38 | static s16 omap2_ctrl_offset; | 38 | static s16 omap2_ctrl_offset; |
39 | static struct regmap *omap2_ctrl_syscon; | ||
40 | 39 | ||
41 | #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) | 40 | #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) |
42 | struct omap3_scratchpad { | 41 | struct omap3_scratchpad { |
@@ -166,16 +165,9 @@ u16 omap_ctrl_readw(u16 offset) | |||
166 | 165 | ||
167 | u32 omap_ctrl_readl(u16 offset) | 166 | u32 omap_ctrl_readl(u16 offset) |
168 | { | 167 | { |
169 | u32 val; | ||
170 | |||
171 | offset &= 0xfffc; | 168 | offset &= 0xfffc; |
172 | if (!omap2_ctrl_syscon) | ||
173 | val = readl_relaxed(omap2_ctrl_base + offset); | ||
174 | else | ||
175 | regmap_read(omap2_ctrl_syscon, omap2_ctrl_offset + offset, | ||
176 | &val); | ||
177 | 169 | ||
178 | return val; | 170 | return readl_relaxed(omap2_ctrl_base + offset); |
179 | } | 171 | } |
180 | 172 | ||
181 | void omap_ctrl_writeb(u8 val, u16 offset) | 173 | void omap_ctrl_writeb(u8 val, u16 offset) |
@@ -207,11 +199,7 @@ void omap_ctrl_writew(u16 val, u16 offset) | |||
207 | void omap_ctrl_writel(u32 val, u16 offset) | 199 | void omap_ctrl_writel(u32 val, u16 offset) |
208 | { | 200 | { |
209 | offset &= 0xfffc; | 201 | offset &= 0xfffc; |
210 | if (!omap2_ctrl_syscon) | 202 | writel_relaxed(val, omap2_ctrl_base + offset); |
211 | writel_relaxed(val, omap2_ctrl_base + offset); | ||
212 | else | ||
213 | regmap_write(omap2_ctrl_syscon, omap2_ctrl_offset + offset, | ||
214 | val); | ||
215 | } | 203 | } |
216 | 204 | ||
217 | #ifdef CONFIG_ARCH_OMAP3 | 205 | #ifdef CONFIG_ARCH_OMAP3 |
@@ -715,8 +703,6 @@ int __init omap_control_init(void) | |||
715 | if (IS_ERR(syscon)) | 703 | if (IS_ERR(syscon)) |
716 | return PTR_ERR(syscon); | 704 | return PTR_ERR(syscon); |
717 | 705 | ||
718 | omap2_ctrl_syscon = syscon; | ||
719 | |||
720 | if (of_get_child_by_name(scm_conf, "clocks")) { | 706 | if (of_get_child_by_name(scm_conf, "clocks")) { |
721 | ret = omap2_clk_provider_init(scm_conf, | 707 | ret = omap2_clk_provider_init(scm_conf, |
722 | data->index, | 708 | data->index, |
@@ -724,9 +710,6 @@ int __init omap_control_init(void) | |||
724 | if (ret) | 710 | if (ret) |
725 | return ret; | 711 | return ret; |
726 | } | 712 | } |
727 | |||
728 | iounmap(omap2_ctrl_base); | ||
729 | omap2_ctrl_base = NULL; | ||
730 | } else { | 713 | } else { |
731 | /* No scm_conf found, direct access */ | 714 | /* No scm_conf found, direct access */ |
732 | ret = omap2_clk_provider_init(np, data->index, NULL, | 715 | ret = omap2_clk_provider_init(np, data->index, NULL, |