diff options
author | Christophe Leroy <christophe.leroy@c-s.fr> | 2019-05-14 05:05:15 -0400 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2019-07-04 12:06:37 -0400 |
commit | d98fc70fc139b72ae098d24fde42ad70c8ff2f81 (patch) | |
tree | f968d93729af83cf24f7eaa62b91f01d1a11ed65 | |
parent | 1cfb725fb1899dc6fdc88f8b5354a65e8ad260c6 (diff) |
powerpc/32: define helpers to get L1 cache sizes.
This patch defines C helpers to retrieve the size of
cache blocks and uses them in the cacheflush functions.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-rw-r--r-- | arch/powerpc/include/asm/cache.h | 16 | ||||
-rw-r--r-- | arch/powerpc/include/asm/cacheflush.h | 24 |
2 files changed, 29 insertions, 11 deletions
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index df8e4c407366..e84d1622eeb6 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h | |||
@@ -33,7 +33,8 @@ | |||
33 | 33 | ||
34 | #define IFETCH_ALIGN_BYTES (1 << IFETCH_ALIGN_SHIFT) | 34 | #define IFETCH_ALIGN_BYTES (1 << IFETCH_ALIGN_SHIFT) |
35 | 35 | ||
36 | #if defined(__powerpc64__) && !defined(__ASSEMBLY__) | 36 | #if !defined(__ASSEMBLY__) |
37 | #ifdef CONFIG_PPC64 | ||
37 | 38 | ||
38 | struct ppc_cache_info { | 39 | struct ppc_cache_info { |
39 | u32 size; | 40 | u32 size; |
@@ -53,7 +54,18 @@ struct ppc64_caches { | |||
53 | }; | 54 | }; |
54 | 55 | ||
55 | extern struct ppc64_caches ppc64_caches; | 56 | extern struct ppc64_caches ppc64_caches; |
56 | #endif /* __powerpc64__ && ! __ASSEMBLY__ */ | 57 | #else |
58 | static inline u32 l1_cache_shift(void) | ||
59 | { | ||
60 | return L1_CACHE_SHIFT; | ||
61 | } | ||
62 | |||
63 | static inline u32 l1_cache_bytes(void) | ||
64 | { | ||
65 | return L1_CACHE_BYTES; | ||
66 | } | ||
67 | #endif | ||
68 | #endif /* ! __ASSEMBLY__ */ | ||
57 | 69 | ||
58 | #if defined(__ASSEMBLY__) | 70 | #if defined(__ASSEMBLY__) |
59 | /* | 71 | /* |
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h index 69b6c3d78d6c..217f183aa8c4 100644 --- a/arch/powerpc/include/asm/cacheflush.h +++ b/arch/powerpc/include/asm/cacheflush.h | |||
@@ -67,11 +67,13 @@ static inline void __flush_dcache_icache_phys(unsigned long physaddr) | |||
67 | */ | 67 | */ |
68 | static inline void flush_dcache_range(unsigned long start, unsigned long stop) | 68 | static inline void flush_dcache_range(unsigned long start, unsigned long stop) |
69 | { | 69 | { |
70 | void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1)); | 70 | unsigned long shift = l1_cache_shift(); |
71 | unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1); | 71 | unsigned long bytes = l1_cache_bytes(); |
72 | void *addr = (void *)(start & ~(bytes - 1)); | ||
73 | unsigned long size = stop - (unsigned long)addr + (bytes - 1); | ||
72 | unsigned long i; | 74 | unsigned long i; |
73 | 75 | ||
74 | for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES) | 76 | for (i = 0; i < size >> shift; i++, addr += bytes) |
75 | dcbf(addr); | 77 | dcbf(addr); |
76 | mb(); /* sync */ | 78 | mb(); /* sync */ |
77 | } | 79 | } |
@@ -83,11 +85,13 @@ static inline void flush_dcache_range(unsigned long start, unsigned long stop) | |||
83 | */ | 85 | */ |
84 | static inline void clean_dcache_range(unsigned long start, unsigned long stop) | 86 | static inline void clean_dcache_range(unsigned long start, unsigned long stop) |
85 | { | 87 | { |
86 | void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1)); | 88 | unsigned long shift = l1_cache_shift(); |
87 | unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1); | 89 | unsigned long bytes = l1_cache_bytes(); |
90 | void *addr = (void *)(start & ~(bytes - 1)); | ||
91 | unsigned long size = stop - (unsigned long)addr + (bytes - 1); | ||
88 | unsigned long i; | 92 | unsigned long i; |
89 | 93 | ||
90 | for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES) | 94 | for (i = 0; i < size >> shift; i++, addr += bytes) |
91 | dcbst(addr); | 95 | dcbst(addr); |
92 | mb(); /* sync */ | 96 | mb(); /* sync */ |
93 | } | 97 | } |
@@ -100,11 +104,13 @@ static inline void clean_dcache_range(unsigned long start, unsigned long stop) | |||
100 | static inline void invalidate_dcache_range(unsigned long start, | 104 | static inline void invalidate_dcache_range(unsigned long start, |
101 | unsigned long stop) | 105 | unsigned long stop) |
102 | { | 106 | { |
103 | void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1)); | 107 | unsigned long shift = l1_cache_shift(); |
104 | unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1); | 108 | unsigned long bytes = l1_cache_bytes(); |
109 | void *addr = (void *)(start & ~(bytes - 1)); | ||
110 | unsigned long size = stop - (unsigned long)addr + (bytes - 1); | ||
105 | unsigned long i; | 111 | unsigned long i; |
106 | 112 | ||
107 | for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES) | 113 | for (i = 0; i < size >> shift; i++, addr += bytes) |
108 | dcbi(addr); | 114 | dcbi(addr); |
109 | mb(); /* sync */ | 115 | mb(); /* sync */ |
110 | } | 116 | } |