ARCv2: Enable LOCKDEP

- The asm helpers for calling into irq tracer were missing

- Add calls to above helpers in low level assembly entry code for ARCv2

- irq_save() uses CLRI to disable interrupts and returns the prev interrupt
  state (in STATUS32) in a specific encoding (and not the raw value of
  STATUS32). This is usable with SETI in irq_restore(). However
  save_flags() reads the raw value of STATUS32 which doesn't pair with
  irq_save/restore() and thus needs fixing.

Signed-off-by: Evgeny Voevodin <evgeny.voevodin@intel.com>
[vgupta: updated changelog and also added some comments]
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

3 files changed, 47 insertions, 2 deletions

diff --git a/arch/arc/include/asm/irqflags-arcv2.h b/arch/arc/include/asm/irqflags-arcv2.h
index 37c2f751eebf..d1ec7f6b31e0 100644
--- a/arch/arc/include/asm/irqflags-arcv2.h
+++ b/arch/arc/include/asm/irqflags-arcv2.h
@@ -18,6 +18,12 @@
 #define STATUS_AD_MASK          (1<<STATUS_AD_BIT)
 #define STATUS_IE_MASK          (1<<STATUS_IE_BIT)
 
+/* status32 Bits as encoded/expected by CLRI/SETI */
+#define CLRI_STATUS_IE_BIT      4
+
+#define CLRI_STATUS_E_MASK      0xF
+#define CLRI_STATUS_IE_MASK     (1 << CLRI_STATUS_IE_BIT)
+
 #define AUX_USER_SP             0x00D
 #define AUX_IRQ_CTRL            0x00E
 #define AUX_IRQ_ACT             0x043   /* Active Intr across all levels */
@@ -100,6 +106,13 @@ static inline long arch_local_save_flags(void)
         :
         : "memory");
 
+        /* To be compatible with irq_save()/irq_restore()
+         * encode the irq bits as expected by CLRI/SETI
+         * (this was needed to make CONFIG_TRACE_IRQFLAGS work)
+         */
+        temp = (1 << 5) |
+                ((!!(temp & STATUS_IE_MASK)) << CLRI_STATUS_IE_BIT) |
+                (temp & CLRI_STATUS_E_MASK);
         return temp;
 }
 
@@ -108,7 +121,7 @@ static inline long arch_local_save_flags(void)
  */
 static inline int arch_irqs_disabled_flags(unsigned long flags)
 {
-        return !(flags & (STATUS_IE_MASK));
+        return !(flags & CLRI_STATUS_IE_MASK);
 }
 
 static inline int arch_irqs_disabled(void)
@@ -128,11 +141,32 @@ static inline void arc_softirq_clear(int irq)
 
 #else
 
+#ifdef CONFIG_TRACE_IRQFLAGS
+
+.macro TRACE_ASM_IRQ_DISABLE
+        bl      trace_hardirqs_off
+.endm
+
+.macro TRACE_ASM_IRQ_ENABLE
+        bl      trace_hardirqs_on
+.endm
+
+#else
+
+.macro TRACE_ASM_IRQ_DISABLE
+.endm
+
+.macro TRACE_ASM_IRQ_ENABLE
+.endm
+
+#endif
 .macro IRQ_DISABLE  scratch
         clri
+        TRACE_ASM_IRQ_DISABLE
 .endm
 
 .macro IRQ_ENABLE  scratch
+        TRACE_ASM_IRQ_ENABLE
         seti
 .endm
 
diff --git a/arch/arc/kernel/entry-arcv2.S b/arch/arc/kernel/entry-arcv2.S
index c1264607bbff..7a1c124ff021 100644
--- a/arch/arc/kernel/entry-arcv2.S
+++ b/arch/arc/kernel/entry-arcv2.S
@@ -69,8 +69,11 @@ ENTRY(handle_interrupt)
 
         clri            ; To make status32.IE agree with CPU internal state
 
-        lr  r0, [ICAUSE]
+#ifdef CONFIG_TRACE_IRQFLAGS
+        TRACE_ASM_IRQ_DISABLE
+#endif
 
+        lr  r0, [ICAUSE]
         mov   blink, ret_from_exception
 
         b.d  arch_do_IRQ
@@ -169,6 +172,11 @@ END(EV_TLBProtV)
 
 .Lrestore_regs:
 
+        # Interrpts are actually disabled from this point on, but will get
+        # reenabled after we return from interrupt/exception.
+        # But irq tracer needs to be told now...
+        TRACE_ASM_IRQ_ENABLE
+
         ld      r0, [sp, PT_status32]   ; U/K mode at time of entry
         lr      r10, [AUX_IRQ_ACT]
 
diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S
index 431433929189..0cb0abaa0479 100644
--- a/arch/arc/kernel/entry-compact.S
+++ b/arch/arc/kernel/entry-compact.S
@@ -341,6 +341,9 @@ END(call_do_page_fault)
 
 .Lrestore_regs:
 
+        # Interrpts are actually disabled from this point on, but will get
+        # reenabled after we return from interrupt/exception.
+        # But irq tracer needs to be told now...
         TRACE_ASM_IRQ_ENABLE
 
         lr      r10, [status32]