diff options
author | Simon Horman <horms+renesas@verge.net.au> | 2016-12-13 06:45:54 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2017-01-03 04:41:35 -0500 |
commit | d8ebefc9ace7c9810fd433e6ff18559e7c2f228a (patch) | |
tree | baf66e166d5dc285986e83e21c4d20f53508d32d | |
parent | fb04f4b8bd7ecf337a8cbebe176e0bbdd954ba31 (diff) |
arm64: dts: r8a7795: Use R-Car Gen 3 fallback binding for i2c nodes
Use recently added R-Car Gen 3 fallback binding for i2c nodes in
DT for r8a7795 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7795 and the
fallback binding for R-Car Gen 3.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795.dtsi | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 91a797b18c11..3fe7e0af5989 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi | |||
@@ -792,7 +792,8 @@ | |||
792 | i2c0: i2c@e6500000 { | 792 | i2c0: i2c@e6500000 { |
793 | #address-cells = <1>; | 793 | #address-cells = <1>; |
794 | #size-cells = <0>; | 794 | #size-cells = <0>; |
795 | compatible = "renesas,i2c-r8a7795"; | 795 | compatible = "renesas,i2c-r8a7795", |
796 | "renesas,rcar-gen3-i2c"; | ||
796 | reg = <0 0xe6500000 0 0x40>; | 797 | reg = <0 0xe6500000 0 0x40>; |
797 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | 798 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
798 | clocks = <&cpg CPG_MOD 931>; | 799 | clocks = <&cpg CPG_MOD 931>; |
@@ -806,7 +807,8 @@ | |||
806 | i2c1: i2c@e6508000 { | 807 | i2c1: i2c@e6508000 { |
807 | #address-cells = <1>; | 808 | #address-cells = <1>; |
808 | #size-cells = <0>; | 809 | #size-cells = <0>; |
809 | compatible = "renesas,i2c-r8a7795"; | 810 | compatible = "renesas,i2c-r8a7795", |
811 | "renesas,rcar-gen3-i2c"; | ||
810 | reg = <0 0xe6508000 0 0x40>; | 812 | reg = <0 0xe6508000 0 0x40>; |
811 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | 813 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
812 | clocks = <&cpg CPG_MOD 930>; | 814 | clocks = <&cpg CPG_MOD 930>; |
@@ -820,7 +822,8 @@ | |||
820 | i2c2: i2c@e6510000 { | 822 | i2c2: i2c@e6510000 { |
821 | #address-cells = <1>; | 823 | #address-cells = <1>; |
822 | #size-cells = <0>; | 824 | #size-cells = <0>; |
823 | compatible = "renesas,i2c-r8a7795"; | 825 | compatible = "renesas,i2c-r8a7795", |
826 | "renesas,rcar-gen3-i2c"; | ||
824 | reg = <0 0xe6510000 0 0x40>; | 827 | reg = <0 0xe6510000 0 0x40>; |
825 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | 828 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
826 | clocks = <&cpg CPG_MOD 929>; | 829 | clocks = <&cpg CPG_MOD 929>; |
@@ -834,7 +837,8 @@ | |||
834 | i2c3: i2c@e66d0000 { | 837 | i2c3: i2c@e66d0000 { |
835 | #address-cells = <1>; | 838 | #address-cells = <1>; |
836 | #size-cells = <0>; | 839 | #size-cells = <0>; |
837 | compatible = "renesas,i2c-r8a7795"; | 840 | compatible = "renesas,i2c-r8a7795", |
841 | "renesas,rcar-gen3-i2c"; | ||
838 | reg = <0 0xe66d0000 0 0x40>; | 842 | reg = <0 0xe66d0000 0 0x40>; |
839 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | 843 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
840 | clocks = <&cpg CPG_MOD 928>; | 844 | clocks = <&cpg CPG_MOD 928>; |
@@ -848,7 +852,8 @@ | |||
848 | i2c4: i2c@e66d8000 { | 852 | i2c4: i2c@e66d8000 { |
849 | #address-cells = <1>; | 853 | #address-cells = <1>; |
850 | #size-cells = <0>; | 854 | #size-cells = <0>; |
851 | compatible = "renesas,i2c-r8a7795"; | 855 | compatible = "renesas,i2c-r8a7795", |
856 | "renesas,rcar-gen3-i2c"; | ||
852 | reg = <0 0xe66d8000 0 0x40>; | 857 | reg = <0 0xe66d8000 0 0x40>; |
853 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | 858 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
854 | clocks = <&cpg CPG_MOD 927>; | 859 | clocks = <&cpg CPG_MOD 927>; |
@@ -862,7 +867,8 @@ | |||
862 | i2c5: i2c@e66e0000 { | 867 | i2c5: i2c@e66e0000 { |
863 | #address-cells = <1>; | 868 | #address-cells = <1>; |
864 | #size-cells = <0>; | 869 | #size-cells = <0>; |
865 | compatible = "renesas,i2c-r8a7795"; | 870 | compatible = "renesas,i2c-r8a7795", |
871 | "renesas,rcar-gen3-i2c"; | ||
866 | reg = <0 0xe66e0000 0 0x40>; | 872 | reg = <0 0xe66e0000 0 0x40>; |
867 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | 873 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; |
868 | clocks = <&cpg CPG_MOD 919>; | 874 | clocks = <&cpg CPG_MOD 919>; |
@@ -876,7 +882,8 @@ | |||
876 | i2c6: i2c@e66e8000 { | 882 | i2c6: i2c@e66e8000 { |
877 | #address-cells = <1>; | 883 | #address-cells = <1>; |
878 | #size-cells = <0>; | 884 | #size-cells = <0>; |
879 | compatible = "renesas,i2c-r8a7795"; | 885 | compatible = "renesas,i2c-r8a7795", |
886 | "renesas,rcar-gen3-i2c"; | ||
880 | reg = <0 0xe66e8000 0 0x40>; | 887 | reg = <0 0xe66e8000 0 0x40>; |
881 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | 888 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; |
882 | clocks = <&cpg CPG_MOD 918>; | 889 | clocks = <&cpg CPG_MOD 918>; |