aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChangbin Du <changbin.du@intel.com>2017-06-06 03:56:10 -0400
committerZhenyu Wang <zhenyuw@linux.intel.com>2017-06-08 01:59:19 -0400
commitd8d94ba3fc4d28753d0d6ba08340d8467380e666 (patch)
treef9fb8488851189c7290b34801cb6b8a0abdfb7bd
parent65f9f6febf12ed5bbcebd3599698eb78b03e5b69 (diff)
drm/i915/gvt: Cleanup struct intel_gvt_mmio_info
The size, length, addr_mask fields actually are not necessary. Every tracked mmio has DWORD size, and addr_mask is a legacy field. Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
-rw-r--r--drivers/gpu/drm/i915/gvt/firmware.c9
-rw-r--r--drivers/gpu/drm/i915/gvt/handlers.c7
-rw-r--r--drivers/gpu/drm/i915/gvt/mmio.h3
3 files changed, 3 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/gvt/firmware.c b/drivers/gpu/drm/i915/gvt/firmware.c
index dce8d15f706f..5dad9298b2d5 100644
--- a/drivers/gpu/drm/i915/gvt/firmware.c
+++ b/drivers/gpu/drm/i915/gvt/firmware.c
@@ -102,13 +102,8 @@ static int expose_firmware_sysfs(struct intel_gvt *gvt)
102 102
103 p = firmware + h->mmio_offset; 103 p = firmware + h->mmio_offset;
104 104
105 hash_for_each(gvt->mmio.mmio_info_table, i, e, node) { 105 hash_for_each(gvt->mmio.mmio_info_table, i, e, node)
106 int j; 106 *(u32 *)(p + e->offset) = I915_READ_NOTRACE(_MMIO(e->offset));
107
108 for (j = 0; j < e->length; j += 4)
109 *(u32 *)(p + e->offset + j) =
110 I915_READ_NOTRACE(_MMIO(e->offset + j));
111 }
112 107
113 memcpy(gvt->firmware.mmio, p, info->mmio_size); 108 memcpy(gvt->firmware.mmio, p, info->mmio_size);
114 109
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 60c0db10ae15..29de07f4d219 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -131,9 +131,7 @@ static int new_mmio_info(struct intel_gvt *gvt,
131 if (p) 131 if (p)
132 gvt_err("dup mmio definition offset %x\n", 132 gvt_err("dup mmio definition offset %x\n",
133 info->offset); 133 info->offset);
134 info->size = size; 134
135 info->length = (i + 4) < end ? 4 : (end - i);
136 info->addr_mask = addr_mask;
137 info->ro_mask = ro_mask; 135 info->ro_mask = ro_mask;
138 info->device = device; 136 info->device = device;
139 info->read = read ? read : intel_vgpu_default_mmio_read; 137 info->read = read ? read : intel_vgpu_default_mmio_read;
@@ -3114,9 +3112,6 @@ int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,
3114 goto default_rw; 3112 goto default_rw;
3115 } 3113 }
3116 3114
3117 if (WARN_ON(bytes > mmio_info->size))
3118 return -EINVAL;
3119
3120 if (is_read) 3115 if (is_read)
3121 return mmio_info->read(vgpu, offset, pdata, bytes); 3116 return mmio_info->read(vgpu, offset, pdata, bytes);
3122 else { 3117 else {
diff --git a/drivers/gpu/drm/i915/gvt/mmio.h b/drivers/gpu/drm/i915/gvt/mmio.h
index 4410a323eea3..0c89e10dcce4 100644
--- a/drivers/gpu/drm/i915/gvt/mmio.h
+++ b/drivers/gpu/drm/i915/gvt/mmio.h
@@ -57,9 +57,6 @@ typedef int (*gvt_mmio_func)(struct intel_vgpu *, unsigned int, void *,
57 57
58struct intel_gvt_mmio_info { 58struct intel_gvt_mmio_info {
59 u32 offset; 59 u32 offset;
60 u32 size;
61 u32 length;
62 u32 addr_mask;
63 u64 ro_mask; 60 u64 ro_mask;
64 u32 device; 61 u32 device;
65 gvt_mmio_func read; 62 gvt_mmio_func read;