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authorChristian König <christian.koenig@amd.com>2016-05-06 11:50:03 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-05-11 13:30:31 -0400
commitd88bf583bd06eecb31f82871c90ef6a5a09b5766 (patch)
tree122631666a828a4705350d6f2e68be19c312bc74
parent92f250989b7098f4b52d50183a7b2fc4e010731b (diff)
drm/amdgpu: move VM fields into job
They are the same for all IBs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h15
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c36
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c19
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_job.c12
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/cik_sdma.c5
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c10
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c10
-rw-r--r--drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c5
-rw-r--r--drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c5
-rw-r--r--drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c3
14 files changed, 66 insertions, 66 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9b55ad351602..d4c1eb7816f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -283,7 +283,8 @@ struct amdgpu_ring_funcs {
283 int (*parse_cs)(struct amdgpu_cs_parser *p, uint32_t ib_idx); 283 int (*parse_cs)(struct amdgpu_cs_parser *p, uint32_t ib_idx);
284 /* command emit functions */ 284 /* command emit functions */
285 void (*emit_ib)(struct amdgpu_ring *ring, 285 void (*emit_ib)(struct amdgpu_ring *ring,
286 struct amdgpu_ib *ib, bool ctx_switch); 286 struct amdgpu_ib *ib,
287 unsigned vm_id, bool ctx_switch);
287 void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr, 288 void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr,
288 uint64_t seq, unsigned flags); 289 uint64_t seq, unsigned flags);
289 void (*emit_pipeline_sync)(struct amdgpu_ring *ring); 290 void (*emit_pipeline_sync)(struct amdgpu_ring *ring);
@@ -741,11 +742,6 @@ struct amdgpu_ib {
741 uint64_t gpu_addr; 742 uint64_t gpu_addr;
742 uint32_t *ptr; 743 uint32_t *ptr;
743 struct amdgpu_user_fence *user; 744 struct amdgpu_user_fence *user;
744 unsigned vm_id;
745 uint64_t vm_pd_addr;
746 uint32_t gds_base, gds_size;
747 uint32_t gws_base, gws_size;
748 uint32_t oa_base, oa_size;
749 uint32_t flags; 745 uint32_t flags;
750 /* resulting sequence number */ 746 /* resulting sequence number */
751 uint64_t sequence; 747 uint64_t sequence;
@@ -1262,6 +1258,11 @@ struct amdgpu_job {
1262 uint32_t num_ibs; 1258 uint32_t num_ibs;
1263 void *owner; 1259 void *owner;
1264 uint64_t ctx; 1260 uint64_t ctx;
1261 unsigned vm_id;
1262 uint64_t vm_pd_addr;
1263 uint32_t gds_base, gds_size;
1264 uint32_t gws_base, gws_size;
1265 uint32_t oa_base, oa_size;
1265 struct amdgpu_user_fence uf; 1266 struct amdgpu_user_fence uf;
1266}; 1267};
1267#define to_amdgpu_job(sched_job) \ 1268#define to_amdgpu_job(sched_job) \
@@ -2221,7 +2222,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
2221#define amdgpu_ring_get_rptr(r) (r)->funcs->get_rptr((r)) 2222#define amdgpu_ring_get_rptr(r) (r)->funcs->get_rptr((r))
2222#define amdgpu_ring_get_wptr(r) (r)->funcs->get_wptr((r)) 2223#define amdgpu_ring_get_wptr(r) (r)->funcs->get_wptr((r))
2223#define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r)) 2224#define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))
2224#define amdgpu_ring_emit_ib(r, ib, c) (r)->funcs->emit_ib((r), (ib), (c)) 2225#define amdgpu_ring_emit_ib(r, ib, vm_id, c) (r)->funcs->emit_ib((r), (ib), (vm_id), (c))
2225#define amdgpu_ring_emit_pipeline_sync(r) (r)->funcs->emit_pipeline_sync((r)) 2226#define amdgpu_ring_emit_pipeline_sync(r) (r)->funcs->emit_pipeline_sync((r))
2226#define amdgpu_ring_emit_vm_flush(r, vmid, addr) (r)->funcs->emit_vm_flush((r), (vmid), (addr)) 2227#define amdgpu_ring_emit_vm_flush(r, vmid, addr) (r)->funcs->emit_vm_flush((r), (vmid), (addr))
2227#define amdgpu_ring_emit_fence(r, addr, seq, flags) (r)->funcs->emit_fence((r), (addr), (seq), (flags)) 2228#define amdgpu_ring_emit_fence(r, addr, seq, flags) (r)->funcs->emit_fence((r), (addr), (seq), (flags))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 2895d63c9979..9ab2f0886a14 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -473,6 +473,9 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
473 goto error_validate; 473 goto error_validate;
474 474
475 if (p->bo_list) { 475 if (p->bo_list) {
476 struct amdgpu_bo *gds = p->bo_list->gds_obj;
477 struct amdgpu_bo *gws = p->bo_list->gws_obj;
478 struct amdgpu_bo *oa = p->bo_list->oa_obj;
476 struct amdgpu_vm *vm = &fpriv->vm; 479 struct amdgpu_vm *vm = &fpriv->vm;
477 unsigned i; 480 unsigned i;
478 481
@@ -481,6 +484,19 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
481 484
482 p->bo_list->array[i].bo_va = amdgpu_vm_bo_find(vm, bo); 485 p->bo_list->array[i].bo_va = amdgpu_vm_bo_find(vm, bo);
483 } 486 }
487
488 if (gds) {
489 p->job->gds_base = amdgpu_bo_gpu_offset(gds);
490 p->job->gds_size = amdgpu_bo_size(gds);
491 }
492 if (gws) {
493 p->job->gws_base = amdgpu_bo_gpu_offset(gws);
494 p->job->gws_size = amdgpu_bo_size(gws);
495 }
496 if (oa) {
497 p->job->oa_base = amdgpu_bo_gpu_offset(oa);
498 p->job->oa_size = amdgpu_bo_size(oa);
499 }
484 } 500 }
485 501
486error_validate: 502error_validate:
@@ -744,26 +760,6 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
744 j++; 760 j++;
745 } 761 }
746 762
747 /* add GDS resources to first IB */
748 if (parser->bo_list) {
749 struct amdgpu_bo *gds = parser->bo_list->gds_obj;
750 struct amdgpu_bo *gws = parser->bo_list->gws_obj;
751 struct amdgpu_bo *oa = parser->bo_list->oa_obj;
752 struct amdgpu_ib *ib = &parser->job->ibs[0];
753
754 if (gds) {
755 ib->gds_base = amdgpu_bo_gpu_offset(gds);
756 ib->gds_size = amdgpu_bo_size(gds);
757 }
758 if (gws) {
759 ib->gws_base = amdgpu_bo_gpu_offset(gws);
760 ib->gws_size = amdgpu_bo_size(gws);
761 }
762 if (oa) {
763 ib->oa_base = amdgpu_bo_gpu_offset(oa);
764 ib->oa_size = amdgpu_bo_size(oa);
765 }
766 }
767 /* wrap the last IB with user fence */ 763 /* wrap the last IB with user fence */
768 if (parser->job->uf.bo) { 764 if (parser->job->uf.bo) {
769 struct amdgpu_ib *ib = &parser->job->ibs[parser->job->num_ibs - 1]; 765 struct amdgpu_ib *ib = &parser->job->ibs[parser->job->num_ibs - 1];
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index dacbd2e32072..201aceb01d8a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -74,8 +74,6 @@ int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm,
74 ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo); 74 ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo);
75 } 75 }
76 76
77 ib->vm_id = 0;
78
79 return 0; 77 return 0;
80} 78}
81 79
@@ -147,7 +145,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
147 return -EINVAL; 145 return -EINVAL;
148 } 146 }
149 147
150 if (vm && !ibs->vm_id) { 148 if (vm && !job->vm_id) {
151 dev_err(adev->dev, "VM IB without ID\n"); 149 dev_err(adev->dev, "VM IB without ID\n");
152 return -EINVAL; 150 return -EINVAL;
153 } 151 }
@@ -162,10 +160,10 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
162 patch_offset = amdgpu_ring_init_cond_exec(ring); 160 patch_offset = amdgpu_ring_init_cond_exec(ring);
163 161
164 if (vm) { 162 if (vm) {
165 r = amdgpu_vm_flush(ring, ib->vm_id, ib->vm_pd_addr, 163 r = amdgpu_vm_flush(ring, job->vm_id, job->vm_pd_addr,
166 ib->gds_base, ib->gds_size, 164 job->gds_base, job->gds_size,
167 ib->gws_base, ib->gws_size, 165 job->gws_base, job->gws_size,
168 ib->oa_base, ib->oa_size); 166 job->oa_base, job->oa_size);
169 if (r) { 167 if (r) {
170 amdgpu_ring_undo(ring); 168 amdgpu_ring_undo(ring);
171 return r; 169 return r;
@@ -187,7 +185,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
187 if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && skip_preamble) 185 if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && skip_preamble)
188 continue; 186 continue;
189 187
190 amdgpu_ring_emit_ib(ring, ib, need_ctx_switch); 188 amdgpu_ring_emit_ib(ring, ib, job ? job->vm_id : 0,
189 need_ctx_switch);
191 need_ctx_switch = false; 190 need_ctx_switch = false;
192 } 191 }
193 192
@@ -197,8 +196,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
197 r = amdgpu_fence_emit(ring, &hwf); 196 r = amdgpu_fence_emit(ring, &hwf);
198 if (r) { 197 if (r) {
199 dev_err(adev->dev, "failed to emit fence (%d)\n", r); 198 dev_err(adev->dev, "failed to emit fence (%d)\n", r);
200 if (ib->vm_id) 199 if (job && job->vm_id)
201 amdgpu_vm_reset_id(adev, ib->vm_id); 200 amdgpu_vm_reset_id(adev, job->vm_id);
202 amdgpu_ring_undo(ring); 201 amdgpu_ring_undo(ring);
203 return r; 202 return r;
204 } 203 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index a0961f2a93d2..8ea68d0cfad6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -142,23 +142,15 @@ static struct fence *amdgpu_job_dependency(struct amd_sched_job *sched_job)
142 142
143 struct fence *fence = amdgpu_sync_get_fence(&job->sync); 143 struct fence *fence = amdgpu_sync_get_fence(&job->sync);
144 144
145 if (fence == NULL && vm && !job->ibs->vm_id) { 145 if (fence == NULL && vm && !job->vm_id) {
146 struct amdgpu_ring *ring = job->ring; 146 struct amdgpu_ring *ring = job->ring;
147 unsigned i, vm_id;
148 uint64_t vm_pd_addr;
149 int r; 147 int r;
150 148
151 r = amdgpu_vm_grab_id(vm, ring, &job->sync, 149 r = amdgpu_vm_grab_id(vm, ring, &job->sync,
152 &job->base.s_fence->base, 150 &job->base.s_fence->base,
153 &vm_id, &vm_pd_addr); 151 &job->vm_id, &job->vm_pd_addr);
154 if (r) 152 if (r)
155 DRM_ERROR("Error getting VM ID (%d)\n", r); 153 DRM_ERROR("Error getting VM ID (%d)\n", r);
156 else {
157 for (i = 0; i < job->num_ibs; ++i) {
158 job->ibs[i].vm_id = vm_id;
159 job->ibs[i].vm_pd_addr = vm_pd_addr;
160 }
161 }
162 154
163 fence = amdgpu_sync_get_fence(&job->sync); 155 fence = amdgpu_sync_get_fence(&job->sync);
164 } 156 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index ad91664a7649..875626a2eccb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -762,7 +762,8 @@ out:
762 * @ib: the IB to execute 762 * @ib: the IB to execute
763 * 763 *
764 */ 764 */
765void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib, bool ctx_switch) 765void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib,
766 unsigned vm_id, bool ctx_switch)
766{ 767{
767 amdgpu_ring_write(ring, VCE_CMD_IB); 768 amdgpu_ring_write(ring, VCE_CMD_IB);
768 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr)); 769 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
index 40d0650e3a37..f40cf761c66f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
@@ -34,7 +34,8 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
34 bool direct, struct fence **fence); 34 bool direct, struct fence **fence);
35void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp); 35void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp);
36int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx); 36int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
37void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib, bool ctx_switch); 37void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib,
38 unsigned vm_id, bool ctx_switch);
38void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, 39void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
39 unsigned flags); 40 unsigned flags);
40int amdgpu_vce_ring_test_ring(struct amdgpu_ring *ring); 41int amdgpu_vce_ring_test_ring(struct amdgpu_ring *ring);
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
index 6c2aa2b863b2..518dca43b133 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
@@ -210,9 +210,10 @@ static void cik_sdma_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
210 * Schedule an IB in the DMA ring (CIK). 210 * Schedule an IB in the DMA ring (CIK).
211 */ 211 */
212static void cik_sdma_ring_emit_ib(struct amdgpu_ring *ring, 212static void cik_sdma_ring_emit_ib(struct amdgpu_ring *ring,
213 struct amdgpu_ib *ib, bool ctx_switch) 213 struct amdgpu_ib *ib,
214 unsigned vm_id, bool ctx_switch)
214{ 215{
215 u32 extra_bits = ib->vm_id & 0xf; 216 u32 extra_bits = vm_id & 0xf;
216 u32 next_rptr = ring->wptr + 5; 217 u32 next_rptr = ring->wptr + 5;
217 218
218 while ((next_rptr & 7) != 4) 219 while ((next_rptr & 7) != 4)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 189ef2b23668..7f18a53ab53a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2030,7 +2030,8 @@ static void gfx_v7_0_ring_emit_fence_compute(struct amdgpu_ring *ring,
2030 * on the gfx ring for execution by the GPU. 2030 * on the gfx ring for execution by the GPU.
2031 */ 2031 */
2032static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, 2032static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
2033 struct amdgpu_ib *ib, bool ctx_switch) 2033 struct amdgpu_ib *ib,
2034 unsigned vm_id, bool ctx_switch)
2034{ 2035{
2035 u32 header, control = 0; 2036 u32 header, control = 0;
2036 u32 next_rptr = ring->wptr + 5; 2037 u32 next_rptr = ring->wptr + 5;
@@ -2056,7 +2057,7 @@ static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
2056 else 2057 else
2057 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); 2058 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);
2058 2059
2059 control |= ib->length_dw | (ib->vm_id << 24); 2060 control |= ib->length_dw | (vm_id << 24);
2060 2061
2061 amdgpu_ring_write(ring, header); 2062 amdgpu_ring_write(ring, header);
2062 amdgpu_ring_write(ring, 2063 amdgpu_ring_write(ring,
@@ -2069,7 +2070,8 @@ static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
2069} 2070}
2070 2071
2071static void gfx_v7_0_ring_emit_ib_compute(struct amdgpu_ring *ring, 2072static void gfx_v7_0_ring_emit_ib_compute(struct amdgpu_ring *ring,
2072 struct amdgpu_ib *ib, bool ctx_switch) 2073 struct amdgpu_ib *ib,
2074 unsigned vm_id, bool ctx_switch)
2073{ 2075{
2074 u32 header, control = 0; 2076 u32 header, control = 0;
2075 u32 next_rptr = ring->wptr + 5; 2077 u32 next_rptr = ring->wptr + 5;
@@ -2084,7 +2086,7 @@ static void gfx_v7_0_ring_emit_ib_compute(struct amdgpu_ring *ring,
2084 2086
2085 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); 2087 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);
2086 2088
2087 control |= ib->length_dw | (ib->vm_id << 24); 2089 control |= ib->length_dw | (vm_id << 24);
2088 2090
2089 amdgpu_ring_write(ring, header); 2091 amdgpu_ring_write(ring, header);
2090 amdgpu_ring_write(ring, 2092 amdgpu_ring_write(ring,
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 0d556c907ab6..92647fbf5b8b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5646,7 +5646,8 @@ static void gfx_v8_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring)
5646} 5646}
5647 5647
5648static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, 5648static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
5649 struct amdgpu_ib *ib, bool ctx_switch) 5649 struct amdgpu_ib *ib,
5650 unsigned vm_id, bool ctx_switch)
5650{ 5651{
5651 u32 header, control = 0; 5652 u32 header, control = 0;
5652 u32 next_rptr = ring->wptr + 5; 5653 u32 next_rptr = ring->wptr + 5;
@@ -5672,7 +5673,7 @@ static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
5672 else 5673 else
5673 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); 5674 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);
5674 5675
5675 control |= ib->length_dw | (ib->vm_id << 24); 5676 control |= ib->length_dw | (vm_id << 24);
5676 5677
5677 amdgpu_ring_write(ring, header); 5678 amdgpu_ring_write(ring, header);
5678 amdgpu_ring_write(ring, 5679 amdgpu_ring_write(ring,
@@ -5685,7 +5686,8 @@ static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
5685} 5686}
5686 5687
5687static void gfx_v8_0_ring_emit_ib_compute(struct amdgpu_ring *ring, 5688static void gfx_v8_0_ring_emit_ib_compute(struct amdgpu_ring *ring,
5688 struct amdgpu_ib *ib, bool ctx_switch) 5689 struct amdgpu_ib *ib,
5690 unsigned vm_id, bool ctx_switch)
5689{ 5691{
5690 u32 header, control = 0; 5692 u32 header, control = 0;
5691 u32 next_rptr = ring->wptr + 5; 5693 u32 next_rptr = ring->wptr + 5;
@@ -5701,7 +5703,7 @@ static void gfx_v8_0_ring_emit_ib_compute(struct amdgpu_ring *ring,
5701 5703
5702 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); 5704 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);
5703 5705
5704 control |= ib->length_dw | (ib->vm_id << 24); 5706 control |= ib->length_dw | (vm_id << 24);
5705 5707
5706 amdgpu_ring_write(ring, header); 5708 amdgpu_ring_write(ring, header);
5707 amdgpu_ring_write(ring, 5709 amdgpu_ring_write(ring,
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index de94adb2b19e..f4c3130d3fdb 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
@@ -242,9 +242,10 @@ static void sdma_v2_4_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
242 * Schedule an IB in the DMA ring (VI). 242 * Schedule an IB in the DMA ring (VI).
243 */ 243 */
244static void sdma_v2_4_ring_emit_ib(struct amdgpu_ring *ring, 244static void sdma_v2_4_ring_emit_ib(struct amdgpu_ring *ring,
245 struct amdgpu_ib *ib, bool ctx_switch) 245 struct amdgpu_ib *ib,
246 unsigned vm_id, bool ctx_switch)
246{ 247{
247 u32 vmid = ib->vm_id & 0xf; 248 u32 vmid = vm_id & 0xf;
248 u32 next_rptr = ring->wptr + 5; 249 u32 next_rptr = ring->wptr + 5;
249 250
250 while ((next_rptr & 7) != 2) 251 while ((next_rptr & 7) != 2)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index ca2aee3e88a3..063f08a9957a 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -400,9 +400,10 @@ static void sdma_v3_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
400 * Schedule an IB in the DMA ring (VI). 400 * Schedule an IB in the DMA ring (VI).
401 */ 401 */
402static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring, 402static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring,
403 struct amdgpu_ib *ib, bool ctx_switch) 403 struct amdgpu_ib *ib,
404 unsigned vm_id, bool ctx_switch)
404{ 405{
405 u32 vmid = ib->vm_id & 0xf; 406 u32 vmid = vm_id & 0xf;
406 u32 next_rptr = ring->wptr + 5; 407 u32 next_rptr = ring->wptr + 5;
407 408
408 while ((next_rptr & 7) != 2) 409 while ((next_rptr & 7) != 2)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index a75ffb5b11b2..f07551476a70 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
@@ -489,7 +489,8 @@ static int uvd_v4_2_ring_test_ring(struct amdgpu_ring *ring)
489 * Write ring commands to execute the indirect buffer 489 * Write ring commands to execute the indirect buffer
490 */ 490 */
491static void uvd_v4_2_ring_emit_ib(struct amdgpu_ring *ring, 491static void uvd_v4_2_ring_emit_ib(struct amdgpu_ring *ring,
492 struct amdgpu_ib *ib, bool ctx_switch) 492 struct amdgpu_ib *ib,
493 unsigned vm_id, bool ctx_switch)
493{ 494{
494 amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_BASE, 0)); 495 amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_BASE, 0));
495 amdgpu_ring_write(ring, ib->gpu_addr); 496 amdgpu_ring_write(ring, ib->gpu_addr);
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index ecb81014d836..e0a76a883d46 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -539,7 +539,8 @@ static int uvd_v5_0_ring_test_ring(struct amdgpu_ring *ring)
539 * Write ring commands to execute the indirect buffer 539 * Write ring commands to execute the indirect buffer
540 */ 540 */
541static void uvd_v5_0_ring_emit_ib(struct amdgpu_ring *ring, 541static void uvd_v5_0_ring_emit_ib(struct amdgpu_ring *ring,
542 struct amdgpu_ib *ib, bool ctx_switch) 542 struct amdgpu_ib *ib,
543 unsigned vm_id, bool ctx_switch)
543{ 544{
544 amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_LOW, 0)); 545 amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_LOW, 0));
545 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr)); 546 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index a43f1a7c58bc..c9929d665c01 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -631,7 +631,8 @@ static int uvd_v6_0_ring_test_ring(struct amdgpu_ring *ring)
631 * Write ring commands to execute the indirect buffer 631 * Write ring commands to execute the indirect buffer
632 */ 632 */
633static void uvd_v6_0_ring_emit_ib(struct amdgpu_ring *ring, 633static void uvd_v6_0_ring_emit_ib(struct amdgpu_ring *ring,
634 struct amdgpu_ib *ib, bool ctx_switch) 634 struct amdgpu_ib *ib,
635 unsigned vm_id, bool ctx_switch)
635{ 636{
636 amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_LOW, 0)); 637 amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_LOW, 0));
637 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr)); 638 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-11 18:01:36 -0500