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authorAlex Williamson <alex.williamson@redhat.com>2014-11-21 13:24:14 -0500
committerBjorn Helgaas <bhelgaas@google.com>2015-01-16 11:07:33 -0500
commitd84f31744643e2c439466d513ebc1bc81c4d9186 (patch)
tree3adfed84c706d1b86066e05b57453050581f84e4
parent51e537387990dc1f00752103f314fd135cb94bc6 (diff)
PCI: Mark AMD/ATI VGA devices that don't reset on D3hot->D0 transition
Some AMD/ATI GPUs report NoSoftRst- to indicate that they perform a reset when software transitions them from D3hot to D0, but there is no apparent effect on the device: the monitor remains synced and the framebuffer contents are retained. Callers of pci_reset_function() don't necessarily have a way to validate whether a reset was effective, so we don't want to rely on NoSoftRst if it's known to be inaccurate. Returning an error in such cases appears to be the better option. For users like vfio-pci, this allows the driver to escalate to the bus reset interfaces. If a device lives on the root bus, there's really no further escalation path, so we exempt PM reset as potentially better than nothing. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/pci/quirks.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index e52356aa09b8..31e7972ca1b5 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3042,6 +3042,27 @@ static void quirk_no_bus_reset(struct pci_dev *dev)
3042 */ 3042 */
3043DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset); 3043DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset);
3044 3044
3045static void quirk_no_pm_reset(struct pci_dev *dev)
3046{
3047 /*
3048 * We can't do a bus reset on root bus devices, but an ineffective
3049 * PM reset may be better than nothing.
3050 */
3051 if (!pci_is_root_bus(dev->bus))
3052 dev->dev_flags |= PCI_DEV_FLAGS_NO_PM_RESET;
3053}
3054
3055/*
3056 * Some AMD/ATI GPUS (HD8570 - Oland) report that a D3hot->D0 transition
3057 * causes a reset (i.e., they advertise NoSoftRst-). This transition seems
3058 * to have no effect on the device: it retains the framebuffer contents and
3059 * monitor sync. Advertising this support makes other layers, like VFIO,
3060 * assume pci_reset_function() is viable for this device. Mark it as
3061 * unavailable to skip it when testing reset methods.
3062 */
3063DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_ATI, PCI_ANY_ID,
3064 PCI_CLASS_DISPLAY_VGA, 8, quirk_no_pm_reset);
3065
3045#ifdef CONFIG_ACPI 3066#ifdef CONFIG_ACPI
3046/* 3067/*
3047 * Apple: Shutdown Cactus Ridge Thunderbolt controller. 3068 * Apple: Shutdown Cactus Ridge Thunderbolt controller.