diff options
author | Rob Herring <robh@kernel.org> | 2015-02-03 15:46:29 -0500 |
---|---|---|
committer | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2015-09-05 13:37:17 -0400 |
commit | d6679c48c13ce896a428d392ffe8a62ad6a75b77 (patch) | |
tree | 7f9745905ead5623dcc8e80576ad4c73b69a24c9 | |
parent | 90d0ae8e9583355725583e9d1ff0ebdc97936f39 (diff) |
ARM: sa1100: remove unused RTC register definitions
Now that register definitions have been moved to the driver, we can remove
them from machine specific code.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/SA-1100.h | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h index 0ac6cc08a19c..7972617cca64 100644 --- a/arch/arm/mach-sa1100/include/mach/SA-1100.h +++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h | |||
@@ -858,40 +858,6 @@ | |||
858 | 858 | ||
859 | 859 | ||
860 | /* | 860 | /* |
861 | * Real-Time Clock (RTC) control registers | ||
862 | * | ||
863 | * Registers | ||
864 | * RTAR Real-Time Clock (RTC) Alarm Register (read/write). | ||
865 | * RCNR Real-Time Clock (RTC) CouNt Register (read/write). | ||
866 | * RTTR Real-Time Clock (RTC) Trim Register (read/write). | ||
867 | * RTSR Real-Time Clock (RTC) Status Register (read/write). | ||
868 | * | ||
869 | * Clocks | ||
870 | * frtx, Trtx Frequency, period of the real-time clock crystal | ||
871 | * (32.768 kHz nominal). | ||
872 | * frtc, Trtc Frequency, period of the real-time clock counter | ||
873 | * (1 Hz nominal). | ||
874 | */ | ||
875 | |||
876 | #define RTAR __REG(0x90010000) /* RTC Alarm Reg. */ | ||
877 | #define RCNR __REG(0x90010004) /* RTC CouNt Reg. */ | ||
878 | #define RTTR __REG(0x90010008) /* RTC Trim Reg. */ | ||
879 | #define RTSR __REG(0x90010010) /* RTC Status Reg. */ | ||
880 | |||
881 | #define RTTR_C Fld (16, 0) /* clock divider Count - 1 */ | ||
882 | #define RTTR_D Fld (10, 16) /* trim Delete count */ | ||
883 | /* frtc = (1023*(C + 1) - D)*frtx/ */ | ||
884 | /* (1023*(C + 1)^2) */ | ||
885 | /* Trtc = (1023*(C + 1)^2)*Trtx/ */ | ||
886 | /* (1023*(C + 1) - D) */ | ||
887 | |||
888 | #define RTSR_AL 0x00000001 /* ALarm detected */ | ||
889 | #define RTSR_HZ 0x00000002 /* 1 Hz clock detected */ | ||
890 | #define RTSR_ALE 0x00000004 /* ALarm interrupt Enable */ | ||
891 | #define RTSR_HZE 0x00000008 /* 1 Hz clock interrupt Enable */ | ||
892 | |||
893 | |||
894 | /* | ||
895 | * Power Manager (PM) control registers | 861 | * Power Manager (PM) control registers |
896 | * | 862 | * |
897 | * Registers | 863 | * Registers |