aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChris Wilson <chris@chris-wilson.co.uk>2015-11-18 10:19:39 -0500
committerJani Nikula <jani.nikula@intel.com>2015-12-22 07:00:52 -0500
commitd5f384de5bf16aa79095a1af5da65b9ffc3fe71d (patch)
tree41ece7d432a565fa616c5b8c5a4cdba9ee1fc685
parent7447a2b221cd4df3960e82478a4ee29312589611 (diff)
drm/i915: Move Braswell stop_machine GGTT insertion workaround
There was a silent conflict between commit 0a878716265e9af9f697264dc2e858fcc060d833 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu Oct 15 14:23:01 2015 +0200 drm/i915: restore ggtt double-bind avoidance and commit 5bab6f60cb4d1417ad7c599166bcfec87529c1a2 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Fri Oct 23 18:43:32 2015 +0100 drm/i915: Serialise updates to GGTT with access through GGTT on Braswell thankfully caught by the extra WARN safegaurd in 0a878716. Since we now override the GGTT insert_pages callback when installing the aliasing ppgtt, we assert that the callback is the original ggtt routine. However, on Braswell we now use a different insertion routine to serialise access through the GGTT with updating the PTE and hence the conflict. To avoid the conflict, move the custom insertion routine for Braswell down a level. Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Michel Thierry <michel.thierry@intel.com> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1447859979-20107-1-git-send-email-chris@chris-wilson.co.uk Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: drm-intel-fixes@lists.freedesktop.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit c140330b5e6b5bc2262ffb2f50bfeea06a482699) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c50
1 files changed, 28 insertions, 22 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 52bc6c3dfe04..56f4f2e58d53 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2384,6 +2384,32 @@ static void gen8_ggtt_insert_entries(struct i915_address_space *vm,
2384 assert_rpm_atomic_end(dev_priv, rpm_atomic_seq); 2384 assert_rpm_atomic_end(dev_priv, rpm_atomic_seq);
2385} 2385}
2386 2386
2387struct insert_entries {
2388 struct i915_address_space *vm;
2389 struct sg_table *st;
2390 uint64_t start;
2391 enum i915_cache_level level;
2392 u32 flags;
2393};
2394
2395static int gen8_ggtt_insert_entries__cb(void *_arg)
2396{
2397 struct insert_entries *arg = _arg;
2398 gen8_ggtt_insert_entries(arg->vm, arg->st,
2399 arg->start, arg->level, arg->flags);
2400 return 0;
2401}
2402
2403static void gen8_ggtt_insert_entries__BKL(struct i915_address_space *vm,
2404 struct sg_table *st,
2405 uint64_t start,
2406 enum i915_cache_level level,
2407 u32 flags)
2408{
2409 struct insert_entries arg = { vm, st, start, level, flags };
2410 stop_machine(gen8_ggtt_insert_entries__cb, &arg, NULL);
2411}
2412
2387/* 2413/*
2388 * Binds an object into the global gtt with the specified cache level. The object 2414 * Binds an object into the global gtt with the specified cache level. The object
2389 * will be accessible to the GPU via commands whose operands reference offsets 2415 * will be accessible to the GPU via commands whose operands reference offsets
@@ -2560,26 +2586,6 @@ static int ggtt_bind_vma(struct i915_vma *vma,
2560 return 0; 2586 return 0;
2561} 2587}
2562 2588
2563struct ggtt_bind_vma__cb {
2564 struct i915_vma *vma;
2565 enum i915_cache_level cache_level;
2566 u32 flags;
2567};
2568
2569static int ggtt_bind_vma__cb(void *_arg)
2570{
2571 struct ggtt_bind_vma__cb *arg = _arg;
2572 return ggtt_bind_vma(arg->vma, arg->cache_level, arg->flags);
2573}
2574
2575static int ggtt_bind_vma__BKL(struct i915_vma *vma,
2576 enum i915_cache_level cache_level,
2577 u32 flags)
2578{
2579 struct ggtt_bind_vma__cb arg = { vma, cache_level, flags };
2580 return stop_machine(ggtt_bind_vma__cb, &arg, NULL);
2581}
2582
2583static int aliasing_gtt_bind_vma(struct i915_vma *vma, 2589static int aliasing_gtt_bind_vma(struct i915_vma *vma,
2584 enum i915_cache_level cache_level, 2590 enum i915_cache_level cache_level,
2585 u32 flags) 2591 u32 flags)
@@ -3048,8 +3054,8 @@ static int gen8_gmch_probe(struct drm_device *dev,
3048 dev_priv->gtt.base.bind_vma = ggtt_bind_vma; 3054 dev_priv->gtt.base.bind_vma = ggtt_bind_vma;
3049 dev_priv->gtt.base.unbind_vma = ggtt_unbind_vma; 3055 dev_priv->gtt.base.unbind_vma = ggtt_unbind_vma;
3050 3056
3051 if (IS_CHERRYVIEW(dev)) 3057 if (IS_CHERRYVIEW(dev_priv))
3052 dev_priv->gtt.base.bind_vma = ggtt_bind_vma__BKL; 3058 dev_priv->gtt.base.insert_entries = gen8_ggtt_insert_entries__BKL;
3053 3059
3054 return ret; 3060 return ret;
3055} 3061}