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authorFabrice Gasnier <fabrice.gasnier@st.com>2018-03-13 10:23:06 -0400
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2018-03-17 18:33:21 -0400
commitd58109dcf37fc9baec354385ec9fdcd8878d174d (patch)
treec6b710162241bef3d49f18f03dc59e501a445f3d
parent7531cf59bfa082769887ec70c2029838ea139f11 (diff)
iio: adc: stm32-dfsdm: fix sample rate for div2 spi clock
When channel clk source is set to "CLKOUT_F" or "CLKOUT_R" (e.g. div2), sample rate is currently set to half the requested value. Fixes: eca949800d2d ("IIO: ADC: add stm32 DFSDM support for PDM microphone") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Acked-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
-rw-r--r--drivers/iio/adc/stm32-dfsdm-adc.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c
index dc911b6fedd6..b28a716a23b2 100644
--- a/drivers/iio/adc/stm32-dfsdm-adc.c
+++ b/drivers/iio/adc/stm32-dfsdm-adc.c
@@ -771,7 +771,7 @@ static int stm32_dfsdm_write_raw(struct iio_dev *indio_dev,
771 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 771 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
772 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id]; 772 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id];
773 struct stm32_dfsdm_channel *ch = &adc->dfsdm->ch_list[chan->channel]; 773 struct stm32_dfsdm_channel *ch = &adc->dfsdm->ch_list[chan->channel];
774 unsigned int spi_freq = adc->spi_freq; 774 unsigned int spi_freq;
775 int ret = -EINVAL; 775 int ret = -EINVAL;
776 776
777 switch (mask) { 777 switch (mask) {
@@ -785,8 +785,18 @@ static int stm32_dfsdm_write_raw(struct iio_dev *indio_dev,
785 case IIO_CHAN_INFO_SAMP_FREQ: 785 case IIO_CHAN_INFO_SAMP_FREQ:
786 if (!val) 786 if (!val)
787 return -EINVAL; 787 return -EINVAL;
788 if (ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL) 788
789 switch (ch->src) {
790 case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL:
789 spi_freq = adc->dfsdm->spi_master_freq; 791 spi_freq = adc->dfsdm->spi_master_freq;
792 break;
793 case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING:
794 case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING:
795 spi_freq = adc->dfsdm->spi_master_freq / 2;
796 break;
797 default:
798 spi_freq = adc->spi_freq;
799 }
790 800
791 if (spi_freq % val) 801 if (spi_freq % val)
792 dev_warn(&indio_dev->dev, 802 dev_warn(&indio_dev->dev,