diff options
author | Fabio Estevam <festevam@gmail.com> | 2013-06-27 23:23:09 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2013-06-28 06:56:04 -0400 |
commit | d55f0cc4c9a70e3105f1e813ab5f221a65ac2ec3 (patch) | |
tree | 64c7ebbb32548469c876494e5d334f310b2a3be8 | |
parent | 2779db8d37d4b542d9ca2575f5f178dbeaca6c86 (diff) |
genirq: generic-chip: Export some irq_gc_ functions
When building imx_v6_v7_defconfig with imx-drm drivers selected as
modules, we get the following build errors:
ERROR: "irq_gc_mask_clr_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_mask_set_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_ack_set_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined!
Export the required functions to avoid this problem.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Cc: shawn.guo@linaro.org
Cc: kernel@pengutronix.de
Link: http://lkml.kernel.org/r/1372389789-7048-1-git-send-email-festevam@gmail.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | kernel/irq/generic-chip.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index a746a8f54dae..76ea748324f5 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c | |||
@@ -62,6 +62,7 @@ void irq_gc_mask_set_bit(struct irq_data *d) | |||
62 | irq_reg_writel(*ct->mask_cache, gc->reg_base + ct->regs.mask); | 62 | irq_reg_writel(*ct->mask_cache, gc->reg_base + ct->regs.mask); |
63 | irq_gc_unlock(gc); | 63 | irq_gc_unlock(gc); |
64 | } | 64 | } |
65 | EXPORT_SYMBOL_GPL(irq_gc_mask_set_bit); | ||
65 | 66 | ||
66 | /** | 67 | /** |
67 | * irq_gc_mask_set_mask_bit - Mask chip via clearing bit in mask register | 68 | * irq_gc_mask_set_mask_bit - Mask chip via clearing bit in mask register |
@@ -81,6 +82,7 @@ void irq_gc_mask_clr_bit(struct irq_data *d) | |||
81 | irq_reg_writel(*ct->mask_cache, gc->reg_base + ct->regs.mask); | 82 | irq_reg_writel(*ct->mask_cache, gc->reg_base + ct->regs.mask); |
82 | irq_gc_unlock(gc); | 83 | irq_gc_unlock(gc); |
83 | } | 84 | } |
85 | EXPORT_SYMBOL_GPL(irq_gc_mask_clr_bit); | ||
84 | 86 | ||
85 | /** | 87 | /** |
86 | * irq_gc_unmask_enable_reg - Unmask chip via enable register | 88 | * irq_gc_unmask_enable_reg - Unmask chip via enable register |
@@ -115,6 +117,7 @@ void irq_gc_ack_set_bit(struct irq_data *d) | |||
115 | irq_reg_writel(mask, gc->reg_base + ct->regs.ack); | 117 | irq_reg_writel(mask, gc->reg_base + ct->regs.ack); |
116 | irq_gc_unlock(gc); | 118 | irq_gc_unlock(gc); |
117 | } | 119 | } |
120 | EXPORT_SYMBOL_GPL(irq_gc_ack_set_bit); | ||
118 | 121 | ||
119 | /** | 122 | /** |
120 | * irq_gc_ack_clr_bit - Ack pending interrupt via clearing bit | 123 | * irq_gc_ack_clr_bit - Ack pending interrupt via clearing bit |