diff options
author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2015-06-09 12:47:09 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2015-06-10 07:40:27 -0400 |
commit | d4974c16ed22f6b19b67d95d63c7244dbe87d95b (patch) | |
tree | 2c37e568b3b10ff24dffe10bbd0d866c5550b55a | |
parent | dae5597f253ae2d44432c8648d9a9205de057ddf (diff) |
pinctrl: mvebu: armada-{370,375}: normalize PCIe pins
This commit normalizes the naming of PCIe pins to use 'rstout' instead
of 'rstoutn' or 'rst-out'.
Since only the subnames are changed, DT compatibility is not affected.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
4 files changed, 13 insertions, 13 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt index e6dce5d7ef8d..24a745008a33 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt | |||
@@ -86,7 +86,7 @@ mpp57 57 gpio, dev(cs3), uart1(rxd), tdm(fsync), sata0(prsnt), | |||
86 | mpp58 58 gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk), | 86 | mpp58 58 gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk), |
87 | uart0(rts) | 87 | uart0(rts) |
88 | mpp59 59 gpo, dev(ale0), uart1(rts), uart0(rts), audio(bclk) | 88 | mpp59 59 gpo, dev(ale0), uart1(rts), uart0(rts), audio(bclk) |
89 | mpp60 60 gpio, dev(ale1), uart1(rxd), sata0(prsnt), pcie(rst-out), | 89 | mpp60 60 gpio, dev(ale1), uart1(rxd), sata0(prsnt), pcie(rstout), |
90 | audio(sdi) | 90 | audio(sdi) |
91 | mpp61 61 gpo, dev(we1), uart1(txd), audio(rclk) | 91 | mpp61 61 gpo, dev(we1), uart1(txd), audio(rclk) |
92 | mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0), | 92 | mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0), |
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt index 314032481ccf..f942a006a814 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt | |||
@@ -26,7 +26,7 @@ mpp9 9 gpio, spi0(sck), spi1(sck), nand(we) | |||
26 | mpp10 10 gpio, dram(vttctrl), led(c1), nand(re) | 26 | mpp10 10 gpio, dram(vttctrl), led(c1), nand(re) |
27 | mpp11 11 gpio, dev(a0), led(c2), audio(sdo) | 27 | mpp11 11 gpio, dev(a0), led(c2), audio(sdo) |
28 | mpp12 12 gpio, dev(a1), audio(bclk) | 28 | mpp12 12 gpio, dev(a1), audio(bclk) |
29 | mpp13 13 gpio, dev(ready), pcie0(rstoutn), pcie1(rstoutn) | 29 | mpp13 13 gpio, dev(ready), pcie0(rstout), pcie1(rstout) |
30 | mpp14 14 gpio, i2c0(sda), uart1(txd) | 30 | mpp14 14 gpio, i2c0(sda), uart1(txd) |
31 | mpp15 15 gpio, i2c0(sck), uart1(rxd) | 31 | mpp15 15 gpio, i2c0(sck), uart1(rxd) |
32 | mpp16 16 gpio, uart0(txd) | 32 | mpp16 16 gpio, uart0(txd) |
@@ -58,7 +58,7 @@ mpp41 41 gpio, uart1(rxd) | |||
58 | mpp42 42 gpio, spi1(cs2), led(c0) | 58 | mpp42 42 gpio, spi1(cs2), led(c0) |
59 | mpp43 43 gpio, sata0(prsnt), dram(vttctrl) | 59 | mpp43 43 gpio, sata0(prsnt), dram(vttctrl) |
60 | mpp44 44 gpio, sata0(prsnt) | 60 | mpp44 44 gpio, sata0(prsnt) |
61 | mpp45 45 gpio, spi0(cs2), pcie0(rstoutn) | 61 | mpp45 45 gpio, spi0(cs2), pcie0(rstout) |
62 | mpp46 46 gpio, led(p0), ge0(txd0), ge1(txd0), dev(we1) | 62 | mpp46 46 gpio, led(p0), ge0(txd0), ge1(txd0), dev(we1) |
63 | mpp47 47 gpio, led(p1), ge0(txd1), ge1(txd1) | 63 | mpp47 47 gpio, led(p1), ge0(txd1), ge1(txd1) |
64 | mpp48 48 gpio, led(p2), ge0(txd2), ge1(txd2) | 64 | mpp48 48 gpio, led(p2), ge0(txd2), ge1(txd2) |
@@ -66,8 +66,8 @@ mpp49 49 gpio, led(p3), ge0(txd3), ge1(txd3) | |||
66 | mpp50 50 gpio, led(c0), ge0(rxd0), ge1(rxd0) | 66 | mpp50 50 gpio, led(c0), ge0(rxd0), ge1(rxd0) |
67 | mpp51 51 gpio, led(c1), ge0(rxd1), ge1(rxd1) | 67 | mpp51 51 gpio, led(c1), ge0(rxd1), ge1(rxd1) |
68 | mpp52 52 gpio, led(c2), ge0(rxd2), ge1(rxd2) | 68 | mpp52 52 gpio, led(c2), ge0(rxd2), ge1(rxd2) |
69 | mpp53 53 gpio, pcie1(rstoutn), ge0(rxd3), ge1(rxd3) | 69 | mpp53 53 gpio, pcie1(rstout), ge0(rxd3), ge1(rxd3) |
70 | mpp54 54 gpio, pcie0(rstoutn), ge0(rxctl), ge1(rxctl) | 70 | mpp54 54 gpio, pcie0(rstout), ge0(rxctl), ge1(rxctl) |
71 | mpp55 55 gpio, ge0(rxclk), ge1(rxclk) | 71 | mpp55 55 gpio, ge0(rxclk), ge1(rxclk) |
72 | mpp56 56 gpio, ge0(txclkout), ge1(txclkout) | 72 | mpp56 56 gpio, ge0(txclkout), ge1(txclkout) |
73 | mpp57 57 gpio, ge0(txctl), ge1(txctl), dev(we0) | 73 | mpp57 57 gpio, ge0(txctl), ge1(txctl), dev(we0) |
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c index fe5cfd11ed66..6ecec9071276 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c | |||
@@ -348,7 +348,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = { | |||
348 | MPP_FUNCTION(0x1, "dev", "ale1"), | 348 | MPP_FUNCTION(0x1, "dev", "ale1"), |
349 | MPP_FUNCTION(0x2, "uart1", "rxd"), | 349 | MPP_FUNCTION(0x2, "uart1", "rxd"), |
350 | MPP_FUNCTION(0x3, "sata0", "prsnt"), | 350 | MPP_FUNCTION(0x3, "sata0", "prsnt"), |
351 | MPP_FUNCTION(0x4, "pcie", "rst-out"), | 351 | MPP_FUNCTION(0x4, "pcie", "rstout"), |
352 | MPP_FUNCTION(0x5, "audio", "sdi")), | 352 | MPP_FUNCTION(0x5, "audio", "sdi")), |
353 | MPP_MODE(61, | 353 | MPP_MODE(61, |
354 | MPP_FUNCTION(0x0, "gpo", NULL), | 354 | MPP_FUNCTION(0x0, "gpo", NULL), |
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-375.c b/drivers/pinctrl/mvebu/pinctrl-armada-375.c index c41dd19f321a..4d3e23517bed 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-375.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-375.c | |||
@@ -121,8 +121,8 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = { | |||
121 | MPP_MODE(13, | 121 | MPP_MODE(13, |
122 | MPP_FUNCTION(0x0, "gpio", NULL), | 122 | MPP_FUNCTION(0x0, "gpio", NULL), |
123 | MPP_FUNCTION(0x1, "dev", "ready"), | 123 | MPP_FUNCTION(0x1, "dev", "ready"), |
124 | MPP_FUNCTION(0x2, "pcie0", "rstoutn"), | 124 | MPP_FUNCTION(0x2, "pcie0", "rstout"), |
125 | MPP_FUNCTION(0x3, "pcie1", "rstoutn"), | 125 | MPP_FUNCTION(0x3, "pcie1", "rstout"), |
126 | MPP_FUNCTION(0x5, "nand", "rb"), | 126 | MPP_FUNCTION(0x5, "nand", "rb"), |
127 | MPP_FUNCTION(0x6, "spi1", "mosi")), | 127 | MPP_FUNCTION(0x6, "spi1", "mosi")), |
128 | MPP_MODE(14, | 128 | MPP_MODE(14, |
@@ -201,7 +201,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = { | |||
201 | MPP_FUNCTION(0x2, "ge1", "rxclk"), | 201 | MPP_FUNCTION(0x2, "ge1", "rxclk"), |
202 | MPP_FUNCTION(0x3, "sd", "d3"), | 202 | MPP_FUNCTION(0x3, "sd", "d3"), |
203 | MPP_FUNCTION(0x5, "spi0", "sck"), | 203 | MPP_FUNCTION(0x5, "spi0", "sck"), |
204 | MPP_FUNCTION(0x6, "pcie0", "rstoutn")), | 204 | MPP_FUNCTION(0x6, "pcie0", "rstout")), |
205 | MPP_MODE(30, | 205 | MPP_MODE(30, |
206 | MPP_FUNCTION(0x0, "gpio", NULL), | 206 | MPP_FUNCTION(0x0, "gpio", NULL), |
207 | MPP_FUNCTION(0x2, "ge1", "txd0"), | 207 | MPP_FUNCTION(0x2, "ge1", "txd0"), |
@@ -276,7 +276,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = { | |||
276 | MPP_MODE(45, | 276 | MPP_MODE(45, |
277 | MPP_FUNCTION(0x0, "gpio", NULL), | 277 | MPP_FUNCTION(0x0, "gpio", NULL), |
278 | MPP_FUNCTION(0x2, "spi0", "cs2"), | 278 | MPP_FUNCTION(0x2, "spi0", "cs2"), |
279 | MPP_FUNCTION(0x4, "pcie0", "rstoutn"), | 279 | MPP_FUNCTION(0x4, "pcie0", "rstout"), |
280 | MPP_FUNCTION(0x5, "led", "c2"), | 280 | MPP_FUNCTION(0x5, "led", "c2"), |
281 | MPP_FUNCTION(0x6, "spi1", "cs2")), | 281 | MPP_FUNCTION(0x6, "spi1", "cs2")), |
282 | MPP_MODE(46, | 282 | MPP_MODE(46, |
@@ -326,14 +326,14 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = { | |||
326 | MPP_FUNCTION(0x6, "dev", "ad9")), | 326 | MPP_FUNCTION(0x6, "dev", "ad9")), |
327 | MPP_MODE(53, | 327 | MPP_MODE(53, |
328 | MPP_FUNCTION(0x0, "gpio", NULL), | 328 | MPP_FUNCTION(0x0, "gpio", NULL), |
329 | MPP_FUNCTION(0x1, "pcie1", "rstoutn"), | 329 | MPP_FUNCTION(0x1, "pcie1", "rstout"), |
330 | MPP_FUNCTION(0x2, "ge0", "rxd3"), | 330 | MPP_FUNCTION(0x2, "ge0", "rxd3"), |
331 | MPP_FUNCTION(0x3, "ge1", "rxd3"), | 331 | MPP_FUNCTION(0x3, "ge1", "rxd3"), |
332 | MPP_FUNCTION(0x5, "i2c0", "sck"), | 332 | MPP_FUNCTION(0x5, "i2c0", "sck"), |
333 | MPP_FUNCTION(0x6, "dev", "ad10")), | 333 | MPP_FUNCTION(0x6, "dev", "ad10")), |
334 | MPP_MODE(54, | 334 | MPP_MODE(54, |
335 | MPP_FUNCTION(0x0, "gpio", NULL), | 335 | MPP_FUNCTION(0x0, "gpio", NULL), |
336 | MPP_FUNCTION(0x1, "pcie0", "rstoutn"), | 336 | MPP_FUNCTION(0x1, "pcie0", "rstout"), |
337 | MPP_FUNCTION(0x2, "ge0", "rxctl"), | 337 | MPP_FUNCTION(0x2, "ge0", "rxctl"), |
338 | MPP_FUNCTION(0x3, "ge1", "rxctl"), | 338 | MPP_FUNCTION(0x3, "ge1", "rxctl"), |
339 | MPP_FUNCTION(0x6, "dev", "ad11")), | 339 | MPP_FUNCTION(0x6, "dev", "ad11")), |
@@ -391,7 +391,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = { | |||
391 | MPP_FUNCTION(0x0, "gpio", NULL), | 391 | MPP_FUNCTION(0x0, "gpio", NULL), |
392 | MPP_FUNCTION(0x2, "ptp", "evreq"), | 392 | MPP_FUNCTION(0x2, "ptp", "evreq"), |
393 | MPP_FUNCTION(0x4, "spi1", "cs3"), | 393 | MPP_FUNCTION(0x4, "spi1", "cs3"), |
394 | MPP_FUNCTION(0x5, "pcie0", "rstoutn"), | 394 | MPP_FUNCTION(0x5, "pcie0", "rstout"), |
395 | MPP_FUNCTION(0x6, "dev", "cs3")), | 395 | MPP_FUNCTION(0x6, "dev", "cs3")), |
396 | }; | 396 | }; |
397 | 397 | ||