diff options
author | Joel Stanley <joel@jms.id.au> | 2016-03-16 07:33:37 -0400 |
---|---|---|
committer | Joel Stanley <joel@jms.id.au> | 2016-05-09 04:11:58 -0400 |
commit | d44a1138cd829d232899ef4fe5cd59e861ed3984 (patch) | |
tree | 62f464ebf2cbe041df94d50fe14017bfb15a3d63 | |
parent | 5f1a7ab28e92e082dd8155961a0fe26db04c4f49 (diff) |
arm/dts: Add Aspeed ast2400 device tree
A common device tree for all forth gen/ast2400 systems and a board
specific dts for the Palmetto OpenPower developemnt machine which was
used for testing.
Signed-off-by: Joel Stanley <joel@jms.id.au>
-rw-r--r-- | arch/arm/boot/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 25 | ||||
-rw-r--r-- | arch/arm/boot/dts/aspeed-g4.dtsi | 161 |
3 files changed, 187 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 95c1923ce6fa..dee3a92cbd3c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -839,6 +839,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ | |||
839 | mt8127-moose.dtb \ | 839 | mt8127-moose.dtb \ |
840 | mt8135-evbp1.dtb | 840 | mt8135-evbp1.dtb |
841 | dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb | 841 | dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb |
842 | dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb | ||
842 | endif | 843 | endif |
843 | 844 | ||
844 | dtstree := $(srctree)/$(src) | 845 | dtstree := $(srctree)/$(src) |
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts new file mode 100644 index 000000000000..cc5fcf2940bf --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | |||
@@ -0,0 +1,25 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | #include "aspeed-g4.dtsi" | ||
4 | |||
5 | / { | ||
6 | model = "Palmetto BMC"; | ||
7 | compatible = "tyan,palmetto-bmc", "aspeed,ast2400"; | ||
8 | |||
9 | aliases { | ||
10 | serial4 = &uart5; | ||
11 | }; | ||
12 | |||
13 | chosen { | ||
14 | stdout-path = &uart5; | ||
15 | bootargs = "console=ttyS4,38400 earlyprintk"; | ||
16 | }; | ||
17 | |||
18 | memory { | ||
19 | reg = <0x40000000 0x10000000>; | ||
20 | }; | ||
21 | }; | ||
22 | |||
23 | &uart5 { | ||
24 | status = "okay"; | ||
25 | }; | ||
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi new file mode 100644 index 000000000000..22dee5937d5c --- /dev/null +++ b/arch/arm/boot/dts/aspeed-g4.dtsi | |||
@@ -0,0 +1,161 @@ | |||
1 | #include "skeleton.dtsi" | ||
2 | |||
3 | / { | ||
4 | model = "Aspeed BMC"; | ||
5 | compatible = "aspeed,ast2400"; | ||
6 | #address-cells = <1>; | ||
7 | #size-cells = <1>; | ||
8 | interrupt-parent = <&vic>; | ||
9 | |||
10 | cpus { | ||
11 | #address-cells = <1>; | ||
12 | #size-cells = <0>; | ||
13 | |||
14 | cpu@0 { | ||
15 | compatible = "arm,arm926ej-s"; | ||
16 | device_type = "cpu"; | ||
17 | reg = <0>; | ||
18 | }; | ||
19 | }; | ||
20 | |||
21 | clocks { | ||
22 | clk_clkin: clk_clkin { | ||
23 | #clock-cells = <0>; | ||
24 | compatible = "fixed-clock"; | ||
25 | clock-frequency = <48000000>; | ||
26 | }; | ||
27 | |||
28 | }; | ||
29 | |||
30 | ahb { | ||
31 | compatible = "simple-bus"; | ||
32 | #address-cells = <1>; | ||
33 | #size-cells = <1>; | ||
34 | ranges; | ||
35 | |||
36 | vic: interrupt-controller@1e6c0080 { | ||
37 | compatible = "aspeed,ast2400-vic"; | ||
38 | interrupt-controller; | ||
39 | #interrupt-cells = <1>; | ||
40 | valid-sources = <0xffffffff 0x0007ffff>; | ||
41 | reg = <0x1e6c0080 0x80>; | ||
42 | }; | ||
43 | |||
44 | apb { | ||
45 | compatible = "simple-bus"; | ||
46 | #address-cells = <1>; | ||
47 | #size-cells = <1>; | ||
48 | ranges; | ||
49 | |||
50 | clk_hpll: clk_hpll@1e6e2070 { | ||
51 | #clock-cells = <0>; | ||
52 | compatible = "aspeed,g4-hpll-clock"; | ||
53 | reg = <0x1e6e2070 0x4>; | ||
54 | clocks = <&clk_clkin>; | ||
55 | }; | ||
56 | |||
57 | clk_apb: clk_apb@1e6e2008 { | ||
58 | #clock-cells = <0>; | ||
59 | compatible = "aspeed,g4-apb-clock"; | ||
60 | reg = <0x1e6e2008 0x4>; | ||
61 | clocks = <&clk_hpll>; | ||
62 | }; | ||
63 | |||
64 | clk_uart: clk_uart@1e6e2008 { | ||
65 | #clock-cells = <0>; | ||
66 | compatible = "aspeed,uart-clock"; | ||
67 | reg = <0x1e6e202c 0x4>; | ||
68 | }; | ||
69 | |||
70 | sram@1e720000 { | ||
71 | compatible = "mmio-sram"; | ||
72 | reg = <0x1e720000 0x8000>; // 32K | ||
73 | }; | ||
74 | |||
75 | timer: timer@1e782000 { | ||
76 | compatible = "aspeed,ast2400-timer"; | ||
77 | reg = <0x1e782000 0x90>; | ||
78 | // The moxart_timer driver registers only one | ||
79 | // interrupt and assumes it's for timer 1 | ||
80 | //interrupts = <16 17 18 35 36 37 38 39>; | ||
81 | interrupts = <16>; | ||
82 | clocks = <&clk_apb>; | ||
83 | }; | ||
84 | |||
85 | wdt1: wdt@1e785000 { | ||
86 | compatible = "aspeed,wdt"; | ||
87 | reg = <0x1e785000 0x1c>; | ||
88 | interrupts = <27>; | ||
89 | }; | ||
90 | |||
91 | wdt2: wdt@1e785020 { | ||
92 | compatible = "aspeed,wdt"; | ||
93 | reg = <0x1e785020 0x1c>; | ||
94 | interrupts = <27>; | ||
95 | clocks = <&clk_apb>; | ||
96 | status = "disabled"; | ||
97 | }; | ||
98 | |||
99 | uart1: serial@1e783000 { | ||
100 | compatible = "ns16550a"; | ||
101 | reg = <0x1e783000 0x1000>; | ||
102 | reg-shift = <2>; | ||
103 | interrupts = <9>; | ||
104 | clocks = <&clk_uart>; | ||
105 | no-loopback-test; | ||
106 | status = "disabled"; | ||
107 | }; | ||
108 | |||
109 | uart2: serial@1e78d000 { | ||
110 | compatible = "ns16550a"; | ||
111 | reg = <0x1e78d000 0x1000>; | ||
112 | reg-shift = <2>; | ||
113 | interrupts = <32>; | ||
114 | clocks = <&clk_uart>; | ||
115 | no-loopback-test; | ||
116 | status = "disabled"; | ||
117 | }; | ||
118 | |||
119 | uart3: serial@1e78e000 { | ||
120 | compatible = "ns16550a"; | ||
121 | reg = <0x1e78e000 0x1000>; | ||
122 | reg-shift = <2>; | ||
123 | interrupts = <33>; | ||
124 | clocks = <&clk_uart>; | ||
125 | no-loopback-test; | ||
126 | status = "disabled"; | ||
127 | }; | ||
128 | |||
129 | uart4: serial@1e78f000 { | ||
130 | compatible = "ns16550a"; | ||
131 | reg = <0x1e78f000 0x1000>; | ||
132 | reg-shift = <2>; | ||
133 | interrupts = <34>; | ||
134 | clocks = <&clk_uart>; | ||
135 | no-loopback-test; | ||
136 | status = "disabled"; | ||
137 | }; | ||
138 | |||
139 | uart5: serial@1e784000 { | ||
140 | compatible = "ns16550a"; | ||
141 | reg = <0x1e784000 0x1000>; | ||
142 | reg-shift = <2>; | ||
143 | interrupts = <10>; | ||
144 | clocks = <&clk_uart>; | ||
145 | current-speed = <38400>; | ||
146 | no-loopback-test; | ||
147 | status = "disabled"; | ||
148 | }; | ||
149 | |||
150 | uart6: serial@1e787000 { | ||
151 | compatible = "ns16550a"; | ||
152 | reg = <0x1e787000 0x1000>; | ||
153 | reg-shift = <2>; | ||
154 | interrupts = <10>; | ||
155 | clocks = <&clk_uart>; | ||
156 | no-loopback-test; | ||
157 | status = "disabled"; | ||
158 | }; | ||
159 | }; | ||
160 | }; | ||
161 | }; | ||