diff options
author | Yoshinori Sato <ysato@users.sourceforge.jp> | 2015-12-04 12:48:18 -0500 |
---|---|---|
committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2015-12-16 11:20:13 -0500 |
commit | d33f250af4e67d449f2c748b861ba99d50955469 (patch) | |
tree | e105795f67812451d115d7bfce0e76ceaea11f77 | |
parent | 6f2b611db23404426a2b21b343392dc1d9584f92 (diff) |
clocksource/drivers/h8300: Use ioread / iowrite
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-rw-r--r-- | drivers/clocksource/h8300_timer16.c | 43 | ||||
-rw-r--r-- | drivers/clocksource/h8300_timer8.c | 28 | ||||
-rw-r--r-- | drivers/clocksource/h8300_tpu.c | 22 |
3 files changed, 50 insertions, 43 deletions
diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c index 934ed0bceec5..75c44079b345 100644 --- a/drivers/clocksource/h8300_timer16.c +++ b/drivers/clocksource/h8300_timer16.c | |||
@@ -19,6 +19,9 @@ | |||
19 | #define TCR 0 | 19 | #define TCR 0 |
20 | #define TCNT 2 | 20 | #define TCNT 2 |
21 | 21 | ||
22 | #define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a)) | ||
23 | #define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a)) | ||
24 | |||
22 | struct timer16_priv { | 25 | struct timer16_priv { |
23 | struct clocksource cs; | 26 | struct clocksource cs; |
24 | unsigned long total_cycles; | 27 | unsigned long total_cycles; |
@@ -28,23 +31,22 @@ struct timer16_priv { | |||
28 | unsigned char enb; | 31 | unsigned char enb; |
29 | unsigned char ovf; | 32 | unsigned char ovf; |
30 | unsigned char ovie; | 33 | unsigned char ovie; |
31 | struct clk *clk; | ||
32 | }; | 34 | }; |
33 | 35 | ||
34 | static unsigned long timer16_get_counter(struct timer16_priv *p) | 36 | static unsigned long timer16_get_counter(struct timer16_priv *p) |
35 | { | 37 | { |
36 | unsigned long v1, v2, v3; | 38 | unsigned short v1, v2, v3; |
37 | int o1, o2; | 39 | unsigned char o1, o2; |
38 | 40 | ||
39 | o1 = readb(p->mapcommon + TISRC) & p->ovf; | 41 | o1 = ioread8(p->mapcommon + TISRC) & p->ovf; |
40 | 42 | ||
41 | /* Make sure the timer value is stable. Stolen from acpi_pm.c */ | 43 | /* Make sure the timer value is stable. Stolen from acpi_pm.c */ |
42 | do { | 44 | do { |
43 | o2 = o1; | 45 | o2 = o1; |
44 | v1 = readw(p->mapbase + TCNT); | 46 | v1 = ioread16be(p->mapbase + TCNT); |
45 | v2 = readw(p->mapbase + TCNT); | 47 | v2 = ioread16be(p->mapbase + TCNT); |
46 | v3 = readw(p->mapbase + TCNT); | 48 | v3 = ioread16be(p->mapbase + TCNT); |
47 | o1 = readb(p->mapcommon + TISRC) & p->ovf; | 49 | o1 = ioread8(p->mapcommon + TISRC) & p->ovf; |
48 | } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) | 50 | } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) |
49 | || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); | 51 | || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); |
50 | 52 | ||
@@ -59,8 +61,7 @@ static irqreturn_t timer16_interrupt(int irq, void *dev_id) | |||
59 | { | 61 | { |
60 | struct timer16_priv *p = (struct timer16_priv *)dev_id; | 62 | struct timer16_priv *p = (struct timer16_priv *)dev_id; |
61 | 63 | ||
62 | writeb(readb(p->mapcommon + TISRC) & ~p->ovf, | 64 | bclr(p->ovf, p->mapcommon + TISRC); |
63 | p->mapcommon + TISRC); | ||
64 | p->total_cycles += 0x10000; | 65 | p->total_cycles += 0x10000; |
65 | 66 | ||
66 | return IRQ_HANDLED; | 67 | return IRQ_HANDLED; |
@@ -89,12 +90,10 @@ static int timer16_enable(struct clocksource *cs) | |||
89 | WARN_ON(p->cs_enabled); | 90 | WARN_ON(p->cs_enabled); |
90 | 91 | ||
91 | p->total_cycles = 0; | 92 | p->total_cycles = 0; |
92 | writew(0x0000, p->mapbase + TCNT); | 93 | iowrite16be(0x0000, p->mapbase + TCNT); |
93 | writeb(0x83, p->mapbase + TCR); | 94 | iowrite8(0x83, p->mapbase + TCR); |
94 | writeb(readb(p->mapcommon + TSTR) | p->enb, | 95 | bset(p->ovie, p->mapcommon + TISRC); |
95 | p->mapcommon + TSTR); | 96 | bset(p->enb, p->mapcommon + TSTR); |
96 | writeb(readb(p->mapcommon + TISRC) | p->ovie, | ||
97 | p->mapcommon + TSTR); | ||
98 | 97 | ||
99 | p->cs_enabled = true; | 98 | p->cs_enabled = true; |
100 | return 0; | 99 | return 0; |
@@ -106,8 +105,8 @@ static void timer16_disable(struct clocksource *cs) | |||
106 | 105 | ||
107 | WARN_ON(!p->cs_enabled); | 106 | WARN_ON(!p->cs_enabled); |
108 | 107 | ||
109 | writeb(readb(p->mapcommon + TSTR) & ~p->enb, | 108 | bclr(p->ovie, p->mapcommon + TISRC); |
110 | p->mapcommon + TSTR); | 109 | bclr(p->enb, p->mapcommon + TSTR); |
111 | 110 | ||
112 | p->cs_enabled = false; | 111 | p->cs_enabled = false; |
113 | } | 112 | } |
@@ -162,9 +161,9 @@ static void __init h8300_16timer_init(struct device_node *node) | |||
162 | 161 | ||
163 | timer16_priv.mapbase = base[REG_CH]; | 162 | timer16_priv.mapbase = base[REG_CH]; |
164 | timer16_priv.mapcommon = base[REG_COMM]; | 163 | timer16_priv.mapcommon = base[REG_COMM]; |
165 | timer16_priv.enb = 1 << ch; | 164 | timer16_priv.enb = ch; |
166 | timer16_priv.ovf = 1 << ch; | 165 | timer16_priv.ovf = ch; |
167 | timer16_priv.ovie = 1 << (4 + ch); | 166 | timer16_priv.ovie = 4 + ch; |
168 | 167 | ||
169 | ret = request_irq(irq, timer16_interrupt, | 168 | ret = request_irq(irq, timer16_interrupt, |
170 | IRQF_TIMER, timer16_priv.cs.name, &timer16_priv); | 169 | IRQF_TIMER, timer16_priv.cs.name, &timer16_priv); |
@@ -174,7 +173,7 @@ static void __init h8300_16timer_init(struct device_node *node) | |||
174 | } | 173 | } |
175 | 174 | ||
176 | clocksource_register_hz(&timer16_priv.cs, | 175 | clocksource_register_hz(&timer16_priv.cs, |
177 | clk_get_rate(timer16_priv.clk) / 8); | 176 | clk_get_rate(clk) / 8); |
178 | return; | 177 | return; |
179 | 178 | ||
180 | unmap_comm: | 179 | unmap_comm: |
diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c index 9087dd27ec69..c151941e1956 100644 --- a/drivers/clocksource/h8300_timer8.c +++ b/drivers/clocksource/h8300_timer8.c | |||
@@ -24,10 +24,16 @@ | |||
24 | #define TCORB 6 | 24 | #define TCORB 6 |
25 | #define _8TCNT 8 | 25 | #define _8TCNT 8 |
26 | 26 | ||
27 | #define CMIEA 6 | ||
28 | #define CMFA 6 | ||
29 | |||
27 | #define FLAG_STARTED (1 << 3) | 30 | #define FLAG_STARTED (1 << 3) |
28 | 31 | ||
29 | #define SCALE 64 | 32 | #define SCALE 64 |
30 | 33 | ||
34 | #define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a)) | ||
35 | #define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a)) | ||
36 | |||
31 | struct timer8_priv { | 37 | struct timer8_priv { |
32 | struct clock_event_device ced; | 38 | struct clock_event_device ced; |
33 | void __iomem *mapbase; | 39 | void __iomem *mapbase; |
@@ -40,12 +46,11 @@ static irqreturn_t timer8_interrupt(int irq, void *dev_id) | |||
40 | struct timer8_priv *p = dev_id; | 46 | struct timer8_priv *p = dev_id; |
41 | 47 | ||
42 | if (clockevent_state_oneshot(&p->ced)) | 48 | if (clockevent_state_oneshot(&p->ced)) |
43 | writew(0x0000, p->mapbase + _8TCR); | 49 | iowrite16be(0x0000, p->mapbase + _8TCR); |
44 | 50 | ||
45 | p->ced.event_handler(&p->ced); | 51 | p->ced.event_handler(&p->ced); |
46 | 52 | ||
47 | writeb(readb(p->mapbase + _8TCSR) & ~0x40, | 53 | bclr(CMFA, p->mapbase + _8TCSR); |
48 | p->mapbase + _8TCSR); | ||
49 | 54 | ||
50 | return IRQ_HANDLED; | 55 | return IRQ_HANDLED; |
51 | } | 56 | } |
@@ -54,17 +59,18 @@ static void timer8_set_next(struct timer8_priv *p, unsigned long delta) | |||
54 | { | 59 | { |
55 | if (delta >= 0x10000) | 60 | if (delta >= 0x10000) |
56 | pr_warn("delta out of range\n"); | 61 | pr_warn("delta out of range\n"); |
57 | writeb(readb(p->mapbase + _8TCR) & ~0x40, p->mapbase + _8TCR); | 62 | bclr(CMIEA, p->mapbase + _8TCR); |
58 | writew(0, p->mapbase + _8TCNT); | 63 | iowrite16be(delta, p->mapbase + TCORA); |
59 | writew(delta, p->mapbase + TCORA); | 64 | iowrite16be(0x0000, p->mapbase + _8TCNT); |
60 | writeb(readb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR); | 65 | bclr(CMFA, p->mapbase + _8TCSR); |
66 | bset(CMIEA, p->mapbase + _8TCR); | ||
61 | } | 67 | } |
62 | 68 | ||
63 | static int timer8_enable(struct timer8_priv *p) | 69 | static int timer8_enable(struct timer8_priv *p) |
64 | { | 70 | { |
65 | writew(0xffff, p->mapbase + TCORA); | 71 | iowrite16be(0xffff, p->mapbase + TCORA); |
66 | writew(0x0000, p->mapbase + _8TCNT); | 72 | iowrite16be(0x0000, p->mapbase + _8TCNT); |
67 | writew(0x0c02, p->mapbase + _8TCR); | 73 | iowrite16be(0x0c02, p->mapbase + _8TCR); |
68 | 74 | ||
69 | return 0; | 75 | return 0; |
70 | } | 76 | } |
@@ -85,7 +91,7 @@ static int timer8_start(struct timer8_priv *p) | |||
85 | 91 | ||
86 | static void timer8_stop(struct timer8_priv *p) | 92 | static void timer8_stop(struct timer8_priv *p) |
87 | { | 93 | { |
88 | writew(0x0000, p->mapbase + _8TCR); | 94 | iowrite16be(0x0000, p->mapbase + _8TCR); |
89 | } | 95 | } |
90 | 96 | ||
91 | static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced) | 97 | static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced) |
diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c index 91bf1992320e..d4c1a287c262 100644 --- a/drivers/clocksource/h8300_tpu.c +++ b/drivers/clocksource/h8300_tpu.c | |||
@@ -19,6 +19,8 @@ | |||
19 | #define TSR 0x5 | 19 | #define TSR 0x5 |
20 | #define TCNT 0x6 | 20 | #define TCNT 0x6 |
21 | 21 | ||
22 | #define TCFV 0x10 | ||
23 | |||
22 | struct tpu_priv { | 24 | struct tpu_priv { |
23 | struct clocksource cs; | 25 | struct clocksource cs; |
24 | void __iomem *mapbase1; | 26 | void __iomem *mapbase1; |
@@ -31,8 +33,8 @@ static inline unsigned long read_tcnt32(struct tpu_priv *p) | |||
31 | { | 33 | { |
32 | unsigned long tcnt; | 34 | unsigned long tcnt; |
33 | 35 | ||
34 | tcnt = readw(p->mapbase1 + TCNT) << 16; | 36 | tcnt = ioread16be(p->mapbase1 + TCNT) << 16; |
35 | tcnt |= readw(p->mapbase2 + TCNT); | 37 | tcnt |= ioread16be(p->mapbase2 + TCNT); |
36 | return tcnt; | 38 | return tcnt; |
37 | } | 39 | } |
38 | 40 | ||
@@ -41,7 +43,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val) | |||
41 | unsigned long v1, v2, v3; | 43 | unsigned long v1, v2, v3; |
42 | int o1, o2; | 44 | int o1, o2; |
43 | 45 | ||
44 | o1 = readb(p->mapbase1 + TSR) & 0x10; | 46 | o1 = ioread8(p->mapbase1 + TSR) & TCFV; |
45 | 47 | ||
46 | /* Make sure the timer value is stable. Stolen from acpi_pm.c */ | 48 | /* Make sure the timer value is stable. Stolen from acpi_pm.c */ |
47 | do { | 49 | do { |
@@ -49,7 +51,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val) | |||
49 | v1 = read_tcnt32(p); | 51 | v1 = read_tcnt32(p); |
50 | v2 = read_tcnt32(p); | 52 | v2 = read_tcnt32(p); |
51 | v3 = read_tcnt32(p); | 53 | v3 = read_tcnt32(p); |
52 | o1 = readb(p->mapbase1 + TSR) & 0x10; | 54 | o1 = ioread8(p->mapbase1 + TSR) & TCFV; |
53 | } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) | 55 | } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) |
54 | || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); | 56 | || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); |
55 | 57 | ||
@@ -82,10 +84,10 @@ static int tpu_clocksource_enable(struct clocksource *cs) | |||
82 | 84 | ||
83 | WARN_ON(p->cs_enabled); | 85 | WARN_ON(p->cs_enabled); |
84 | 86 | ||
85 | writew(0, p->mapbase1 + TCNT); | 87 | iowrite16be(0, p->mapbase1 + TCNT); |
86 | writew(0, p->mapbase2 + TCNT); | 88 | iowrite16be(0, p->mapbase2 + TCNT); |
87 | writeb(0x0f, p->mapbase1 + TCR); | 89 | iowrite8(0x0f, p->mapbase1 + TCR); |
88 | writeb(0x03, p->mapbase2 + TCR); | 90 | iowrite8(0x03, p->mapbase2 + TCR); |
89 | 91 | ||
90 | p->cs_enabled = true; | 92 | p->cs_enabled = true; |
91 | return 0; | 93 | return 0; |
@@ -97,8 +99,8 @@ static void tpu_clocksource_disable(struct clocksource *cs) | |||
97 | 99 | ||
98 | WARN_ON(!p->cs_enabled); | 100 | WARN_ON(!p->cs_enabled); |
99 | 101 | ||
100 | writeb(0, p->mapbase1 + TCR); | 102 | iowrite8(0, p->mapbase1 + TCR); |
101 | writeb(0, p->mapbase2 + TCR); | 103 | iowrite8(0, p->mapbase2 + TCR); |
102 | p->cs_enabled = false; | 104 | p->cs_enabled = false; |
103 | } | 105 | } |
104 | 106 | ||