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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2018-02-09 12:24:37 -0500
committerAndreas Färber <afaerber@suse.de>2018-09-30 12:42:48 -0400
commitd3105e47b5192d7986b1af03874402aa2b2acd00 (patch)
tree1007024a0a0e72b376f8b2ac1dfe499e9160ec18
parent4db4a57fe01bfb50e7fe3b810a297527f0942548 (diff)
arm64: dts: actions: s900: Source CMU clock for UARTs
Remove fixed clock in Bubblegum-96 board and source CMU (Clock Management Unit) clock for UART nodes in Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [AF: Move/add clocks to SoC] Signed-off-by: Andreas Färber <afaerber@suse.de>
-rw-r--r--arch/arm64/boot/dts/actions/s900-bubblegum-96.dts7
-rw-r--r--arch/arm64/boot/dts/actions/s900.dtsi7
2 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
index 562d89df811c..84d42dc07787 100644
--- a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
+++ b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
@@ -23,12 +23,6 @@
23 device_type = "memory"; 23 device_type = "memory";
24 reg = <0x0 0x0 0x0 0x80000000>; 24 reg = <0x0 0x0 0x0 0x80000000>;
25 }; 25 };
26
27 uart5_clk: uart5-clk {
28 compatible = "fixed-clock";
29 clock-frequency = <921600>;
30 #clock-cells = <0>;
31 };
32}; 26};
33 27
34&timer { 28&timer {
@@ -37,5 +31,4 @@
37 31
38&uart5 { 32&uart5 {
39 status = "okay"; 33 status = "okay";
40 clocks = <&uart5_clk>;
41}; 34};
diff --git a/arch/arm64/boot/dts/actions/s900.dtsi b/arch/arm64/boot/dts/actions/s900.dtsi
index 19ccad4faae8..f254b1843db2 100644
--- a/arch/arm64/boot/dts/actions/s900.dtsi
+++ b/arch/arm64/boot/dts/actions/s900.dtsi
@@ -120,6 +120,7 @@
120 uart0: serial@e0120000 { 120 uart0: serial@e0120000 {
121 compatible = "actions,s900-uart", "actions,owl-uart"; 121 compatible = "actions,s900-uart", "actions,owl-uart";
122 reg = <0x0 0xe0120000 0x0 0x2000>; 122 reg = <0x0 0xe0120000 0x0 0x2000>;
123 clocks = <&cmu CLK_UART0>;
123 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 124 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
124 status = "disabled"; 125 status = "disabled";
125 }; 126 };
@@ -127,6 +128,7 @@
127 uart1: serial@e0122000 { 128 uart1: serial@e0122000 {
128 compatible = "actions,s900-uart", "actions,owl-uart"; 129 compatible = "actions,s900-uart", "actions,owl-uart";
129 reg = <0x0 0xe0122000 0x0 0x2000>; 130 reg = <0x0 0xe0122000 0x0 0x2000>;
131 clocks = <&cmu CLK_UART1>;
130 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 132 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
131 status = "disabled"; 133 status = "disabled";
132 }; 134 };
@@ -134,6 +136,7 @@
134 uart2: serial@e0124000 { 136 uart2: serial@e0124000 {
135 compatible = "actions,s900-uart", "actions,owl-uart"; 137 compatible = "actions,s900-uart", "actions,owl-uart";
136 reg = <0x0 0xe0124000 0x0 0x2000>; 138 reg = <0x0 0xe0124000 0x0 0x2000>;
139 clocks = <&cmu CLK_UART2>;
137 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 140 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
138 status = "disabled"; 141 status = "disabled";
139 }; 142 };
@@ -141,6 +144,7 @@
141 uart3: serial@e0126000 { 144 uart3: serial@e0126000 {
142 compatible = "actions,s900-uart", "actions,owl-uart"; 145 compatible = "actions,s900-uart", "actions,owl-uart";
143 reg = <0x0 0xe0126000 0x0 0x2000>; 146 reg = <0x0 0xe0126000 0x0 0x2000>;
147 clocks = <&cmu CLK_UART3>;
144 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 148 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
145 status = "disabled"; 149 status = "disabled";
146 }; 150 };
@@ -148,6 +152,7 @@
148 uart4: serial@e0128000 { 152 uart4: serial@e0128000 {
149 compatible = "actions,s900-uart", "actions,owl-uart"; 153 compatible = "actions,s900-uart", "actions,owl-uart";
150 reg = <0x0 0xe0128000 0x0 0x2000>; 154 reg = <0x0 0xe0128000 0x0 0x2000>;
155 clocks = <&cmu CLK_UART4>;
151 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 156 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
152 status = "disabled"; 157 status = "disabled";
153 }; 158 };
@@ -155,6 +160,7 @@
155 uart5: serial@e012a000 { 160 uart5: serial@e012a000 {
156 compatible = "actions,s900-uart", "actions,owl-uart"; 161 compatible = "actions,s900-uart", "actions,owl-uart";
157 reg = <0x0 0xe012a000 0x0 0x2000>; 162 reg = <0x0 0xe012a000 0x0 0x2000>;
163 clocks = <&cmu CLK_UART5>;
158 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 164 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
159 status = "disabled"; 165 status = "disabled";
160 }; 166 };
@@ -162,6 +168,7 @@
162 uart6: serial@e012c000 { 168 uart6: serial@e012c000 {
163 compatible = "actions,s900-uart", "actions,owl-uart"; 169 compatible = "actions,s900-uart", "actions,owl-uart";
164 reg = <0x0 0xe012c000 0x0 0x2000>; 170 reg = <0x0 0xe012c000 0x0 0x2000>;
171 clocks = <&cmu CLK_UART6>;
165 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 172 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
166 status = "disabled"; 173 status = "disabled";
167 }; 174 };