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authorJeremy Linton <jeremy.linton@arm.com>2019-04-15 17:21:26 -0400
committerWill Deacon <will.deacon@arm.com>2019-04-26 11:31:36 -0400
commitd2532e27b5638bb2e2dd52b80b7ea2ec65135377 (patch)
tree31f1be21c8df7abee8f3235afcad6fa411fb133c
parent8c1e3d2bb44cbb998cb28ff9a18f105fee7f1eb3 (diff)
arm64: add sysfs vulnerability show for spectre-v2
Track whether all the cores in the machine are vulnerable to Spectre-v2, and whether all the vulnerable cores have been mitigated. We then expose this information to userspace via sysfs. Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
-rw-r--r--arch/arm64/kernel/cpu_errata.c27
1 files changed, 26 insertions, 1 deletions
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index a9c3ad4f7948..d2bbafa04b3c 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -512,6 +512,10 @@ cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused)
512 .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, \ 512 .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, \
513 CAP_MIDR_RANGE_LIST(midr_list) 513 CAP_MIDR_RANGE_LIST(midr_list)
514 514
515/* Track overall mitigation state. We are only mitigated if all cores are ok */
516static bool __hardenbp_enab = true;
517static bool __spectrev2_safe = true;
518
515/* 519/*
516 * List of CPUs that do not need any Spectre-v2 mitigation at all. 520 * List of CPUs that do not need any Spectre-v2 mitigation at all.
517 */ 521 */
@@ -522,6 +526,10 @@ static const struct midr_range spectre_v2_safe_list[] = {
522 { /* sentinel */ } 526 { /* sentinel */ }
523}; 527};
524 528
529/*
530 * Track overall bp hardening for all heterogeneous cores in the machine.
531 * We are only considered "safe" if all booted cores are known safe.
532 */
525static bool __maybe_unused 533static bool __maybe_unused
526check_branch_predictor(const struct arm64_cpu_capabilities *entry, int scope) 534check_branch_predictor(const struct arm64_cpu_capabilities *entry, int scope)
527{ 535{
@@ -543,6 +551,8 @@ check_branch_predictor(const struct arm64_cpu_capabilities *entry, int scope)
543 if (!need_wa) 551 if (!need_wa)
544 return false; 552 return false;
545 553
554 __spectrev2_safe = false;
555
546 if (!IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR)) { 556 if (!IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR)) {
547 pr_warn_once("spectrev2 mitigation disabled by kernel configuration\n"); 557 pr_warn_once("spectrev2 mitigation disabled by kernel configuration\n");
548 __hardenbp_enab = false; 558 __hardenbp_enab = false;
@@ -552,11 +562,14 @@ check_branch_predictor(const struct arm64_cpu_capabilities *entry, int scope)
552 /* forced off */ 562 /* forced off */
553 if (__nospectre_v2) { 563 if (__nospectre_v2) {
554 pr_info_once("spectrev2 mitigation disabled by command line option\n"); 564 pr_info_once("spectrev2 mitigation disabled by command line option\n");
565 __hardenbp_enab = false;
555 return false; 566 return false;
556 } 567 }
557 568
558 if (need_wa < 0) 569 if (need_wa < 0) {
559 pr_warn_once("ARM_SMCCC_ARCH_WORKAROUND_1 missing from firmware\n"); 570 pr_warn_once("ARM_SMCCC_ARCH_WORKAROUND_1 missing from firmware\n");
571 __hardenbp_enab = false;
572 }
560 573
561 return (need_wa > 0); 574 return (need_wa > 0);
562} 575}
@@ -779,3 +792,15 @@ ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr,
779{ 792{
780 return sprintf(buf, "Mitigation: __user pointer sanitization\n"); 793 return sprintf(buf, "Mitigation: __user pointer sanitization\n");
781} 794}
795
796ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr,
797 char *buf)
798{
799 if (__spectrev2_safe)
800 return sprintf(buf, "Not affected\n");
801
802 if (__hardenbp_enab)
803 return sprintf(buf, "Mitigation: Branch predictor hardening\n");
804
805 return sprintf(buf, "Vulnerable\n");
806}