diff options
author | Jeremy Linton <jeremy.linton@arm.com> | 2019-06-26 17:37:17 -0400 |
---|---|---|
committer | Will Deacon <will@kernel.org> | 2019-06-27 11:53:42 -0400 |
commit | d24a0c7099b32b6981d7f126c45348e381718350 (patch) | |
tree | 457f98ff0662d5de5fb64df10b5bc1bdf1f062a4 | |
parent | 56855a99f3d0d1e9f1f4e24f5851f9bf14c83296 (diff) |
arm_pmu: acpi: spe: Add initial MADT/SPE probing
ACPI 6.3 adds additional fields to the MADT GICC
structure to describe SPE PPI's. We pick these out
of the cached reference to the madt_gicc structure
similarly to the core PMU code. We then create a platform
device referring to the IRQ and let the user/module loader
decide whether to load the SPE driver.
Tested-by: Hanjun Guo <hanjun.guo@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
-rw-r--r-- | arch/arm64/include/asm/acpi.h | 3 | ||||
-rw-r--r-- | drivers/perf/arm_pmu_acpi.c | 72 | ||||
-rw-r--r-- | include/linux/perf/arm_pmu.h | 2 |
3 files changed, 77 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 7628efbe6c12..d10399b9f998 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h | |||
@@ -41,6 +41,9 @@ | |||
41 | (!(entry) || (entry)->header.length < ACPI_MADT_GICC_MIN_LENGTH || \ | 41 | (!(entry) || (entry)->header.length < ACPI_MADT_GICC_MIN_LENGTH || \ |
42 | (unsigned long)(entry) + (entry)->header.length > (end)) | 42 | (unsigned long)(entry) + (entry)->header.length > (end)) |
43 | 43 | ||
44 | #define ACPI_MADT_GICC_SPE (ACPI_OFFSET(struct acpi_madt_generic_interrupt, \ | ||
45 | spe_interrupt) + sizeof(u16)) | ||
46 | |||
44 | /* Basic configuration for ACPI */ | 47 | /* Basic configuration for ACPI */ |
45 | #ifdef CONFIG_ACPI | 48 | #ifdef CONFIG_ACPI |
46 | pgprot_t __acpi_get_mem_attribute(phys_addr_t addr); | 49 | pgprot_t __acpi_get_mem_attribute(phys_addr_t addr); |
diff --git a/drivers/perf/arm_pmu_acpi.c b/drivers/perf/arm_pmu_acpi.c index 0f197516d708..864d7ebe45e9 100644 --- a/drivers/perf/arm_pmu_acpi.c +++ b/drivers/perf/arm_pmu_acpi.c | |||
@@ -74,6 +74,76 @@ static void arm_pmu_acpi_unregister_irq(int cpu) | |||
74 | acpi_unregister_gsi(gsi); | 74 | acpi_unregister_gsi(gsi); |
75 | } | 75 | } |
76 | 76 | ||
77 | #if IS_ENABLED(CONFIG_ARM_SPE_PMU) | ||
78 | static struct resource spe_resources[] = { | ||
79 | { | ||
80 | /* irq */ | ||
81 | .flags = IORESOURCE_IRQ, | ||
82 | } | ||
83 | }; | ||
84 | |||
85 | static struct platform_device spe_dev = { | ||
86 | .name = ARMV8_SPE_PDEV_NAME, | ||
87 | .id = -1, | ||
88 | .resource = spe_resources, | ||
89 | .num_resources = ARRAY_SIZE(spe_resources) | ||
90 | }; | ||
91 | |||
92 | /* | ||
93 | * For lack of a better place, hook the normal PMU MADT walk | ||
94 | * and create a SPE device if we detect a recent MADT with | ||
95 | * a homogeneous PPI mapping. | ||
96 | */ | ||
97 | static void arm_spe_acpi_register_device(void) | ||
98 | { | ||
99 | int cpu, hetid, irq, ret; | ||
100 | bool first = true; | ||
101 | u16 gsi = 0; | ||
102 | |||
103 | /* | ||
104 | * Sanity check all the GICC tables for the same interrupt number. | ||
105 | * For now, we only support homogeneous ACPI/SPE machines. | ||
106 | */ | ||
107 | for_each_possible_cpu(cpu) { | ||
108 | struct acpi_madt_generic_interrupt *gicc; | ||
109 | |||
110 | gicc = acpi_cpu_get_madt_gicc(cpu); | ||
111 | if (gicc->header.length < ACPI_MADT_GICC_SPE) | ||
112 | return; | ||
113 | |||
114 | if (first) { | ||
115 | gsi = gicc->spe_interrupt; | ||
116 | if (!gsi) | ||
117 | return; | ||
118 | hetid = find_acpi_cpu_topology_hetero_id(cpu); | ||
119 | first = false; | ||
120 | } else if ((gsi != gicc->spe_interrupt) || | ||
121 | (hetid != find_acpi_cpu_topology_hetero_id(cpu))) { | ||
122 | pr_warn("ACPI: SPE must be homogeneous\n"); | ||
123 | return; | ||
124 | } | ||
125 | } | ||
126 | |||
127 | irq = acpi_register_gsi(NULL, gsi, ACPI_LEVEL_SENSITIVE, | ||
128 | ACPI_ACTIVE_HIGH); | ||
129 | if (irq < 0) { | ||
130 | pr_warn("ACPI: SPE Unable to register interrupt: %d\n", gsi); | ||
131 | return; | ||
132 | } | ||
133 | |||
134 | spe_resources[0].start = irq; | ||
135 | ret = platform_device_register(&spe_dev); | ||
136 | if (ret < 0) { | ||
137 | pr_warn("ACPI: SPE: Unable to register device\n"); | ||
138 | acpi_unregister_gsi(gsi); | ||
139 | } | ||
140 | } | ||
141 | #else | ||
142 | static inline void arm_spe_acpi_register_device(void) | ||
143 | { | ||
144 | } | ||
145 | #endif /* CONFIG_ARM_SPE_PMU */ | ||
146 | |||
77 | static int arm_pmu_acpi_parse_irqs(void) | 147 | static int arm_pmu_acpi_parse_irqs(void) |
78 | { | 148 | { |
79 | int irq, cpu, irq_cpu, err; | 149 | int irq, cpu, irq_cpu, err; |
@@ -279,6 +349,8 @@ static int arm_pmu_acpi_init(void) | |||
279 | if (acpi_disabled) | 349 | if (acpi_disabled) |
280 | return 0; | 350 | return 0; |
281 | 351 | ||
352 | arm_spe_acpi_register_device(); | ||
353 | |||
282 | ret = arm_pmu_acpi_parse_irqs(); | 354 | ret = arm_pmu_acpi_parse_irqs(); |
283 | if (ret) | 355 | if (ret) |
284 | return ret; | 356 | return ret; |
diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 4641e850b204..784bc58f165a 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h | |||
@@ -175,4 +175,6 @@ void armpmu_free_irq(int irq, int cpu); | |||
175 | 175 | ||
176 | #endif /* CONFIG_ARM_PMU */ | 176 | #endif /* CONFIG_ARM_PMU */ |
177 | 177 | ||
178 | #define ARMV8_SPE_PDEV_NAME "arm,spe-v1" | ||
179 | |||
178 | #endif /* __ARM_PMU_H__ */ | 180 | #endif /* __ARM_PMU_H__ */ |