diff options
author | Max Filippov <jcmvbkbc@gmail.com> | 2015-09-22 08:20:32 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-10-04 14:11:05 -0400 |
commit | d215d80957ce98c318064c249ad0b7800c63a19d (patch) | |
tree | da8d0de101959f318a438d9e4924c39b4c6ffbd0 | |
parent | 616ea8d2d644b93ec634a3cb97e04f1ec3b0a491 (diff) |
serial_core: support native endianness
There are three natural ways in which devices may be wired to the system:
little endian (device receives correctly ordered bits of a word written
by little-endian CPU to its register, but big-endian CPU needs to swap
bytes of a word before writing it), big endian (same, but with big-endian
CPU in more favourable position) and native endian (CPU of either
endianness may do word-sized I/O without need for byteswapping).
Adding an option for native endianness allows using single kernel command
line for boards with native-endian serial ports on bi-endian
architectures. This goes in parallel with 'native-endian' DTS attribute.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/tty/serial/serial_core.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index 603d2cc3f424..df4271ae7414 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c | |||
@@ -1819,8 +1819,8 @@ uart_get_console(struct uart_port *ports, int nr, struct console *co) | |||
1819 | * @options: ptr for <options> field; NULL if not present (out) | 1819 | * @options: ptr for <options> field; NULL if not present (out) |
1820 | * | 1820 | * |
1821 | * Decodes earlycon kernel command line parameters of the form | 1821 | * Decodes earlycon kernel command line parameters of the form |
1822 | * earlycon=<name>,io|mmio|mmio32|mmio32be,<addr>,<options> | 1822 | * earlycon=<name>,io|mmio|mmio32|mmio32be|mmio32native,<addr>,<options> |
1823 | * console=<name>,io|mmio|mmio32|mmio32be,<addr>,<options> | 1823 | * console=<name>,io|mmio|mmio32|mmio32be|mmio32native,<addr>,<options> |
1824 | * | 1824 | * |
1825 | * The optional form | 1825 | * The optional form |
1826 | * earlycon=<name>,0x<addr>,<options> | 1826 | * earlycon=<name>,0x<addr>,<options> |
@@ -1841,6 +1841,10 @@ int uart_parse_earlycon(char *p, unsigned char *iotype, unsigned long *addr, | |||
1841 | } else if (strncmp(p, "mmio32be,", 9) == 0) { | 1841 | } else if (strncmp(p, "mmio32be,", 9) == 0) { |
1842 | *iotype = UPIO_MEM32BE; | 1842 | *iotype = UPIO_MEM32BE; |
1843 | p += 9; | 1843 | p += 9; |
1844 | } else if (strncmp(p, "mmio32native,", 13) == 0) { | ||
1845 | *iotype = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) ? | ||
1846 | UPIO_MEM32BE : UPIO_MEM32; | ||
1847 | p += 13; | ||
1844 | } else if (strncmp(p, "io,", 3) == 0) { | 1848 | } else if (strncmp(p, "io,", 3) == 0) { |
1845 | *iotype = UPIO_PORT; | 1849 | *iotype = UPIO_PORT; |
1846 | p += 3; | 1850 | p += 3; |