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authorLinus Torvalds <torvalds@linux-foundation.org>2018-03-18 14:59:14 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2018-03-18 14:59:14 -0400
commitd2149e13e5fba83752b7050edfaefcf954a18c00 (patch)
treeec235e63cbd2220bb8d7bd5b5e4290a219e4eeed
parent23fe85ae4f67916a26cffd4dd5f29fcae5105a19 (diff)
parenta2f9e6500fc194929605a06ff985d4a47ebff489 (diff)
Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Thomas Gleixner: "Three fixes for irq chip drivers: - Make sure the allocations in the GIC-V3 ITS driver are large enough to accomodate the interrupt space - Fix a misplaced __iomem annotation which causes a splat of 26 sparse warnings - Remove an unused function in the IMX GPCV2 driver which causes build warnings" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/irq-imx-gpcv2: Remove unused function irqchip/gic-v3-its: Ensure nr_ites >= nr_lpis irqchip/gic-v3-its: Fix misplaced __iomem annotations
-rw-r--r--drivers/irqchip/irq-gic-v3-its.c13
-rw-r--r--drivers/irqchip/irq-imx-gpcv2.c14
2 files changed, 6 insertions, 21 deletions
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 1d3056f53747..2cbb19cddbf8 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -1412,7 +1412,7 @@ static struct irq_chip its_irq_chip = {
1412 * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 1412 * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations.
1413 */ 1413 */
1414#define IRQS_PER_CHUNK_SHIFT 5 1414#define IRQS_PER_CHUNK_SHIFT 5
1415#define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 1415#define IRQS_PER_CHUNK (1UL << IRQS_PER_CHUNK_SHIFT)
1416#define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1416#define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */
1417 1417
1418static unsigned long *lpi_bitmap; 1418static unsigned long *lpi_bitmap;
@@ -2119,11 +2119,10 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
2119 2119
2120 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2120 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
2121 /* 2121 /*
2122 * At least one bit of EventID is being used, hence a minimum 2122 * We allocate at least one chunk worth of LPIs bet device,
2123 * of two entries. No, the architecture doesn't let you 2123 * and thus that many ITEs. The device may require less though.
2124 * express an ITT with a single entry.
2125 */ 2124 */
2126 nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 2125 nr_ites = max(IRQS_PER_CHUNK, roundup_pow_of_two(nvecs));
2127 sz = nr_ites * its->ite_size; 2126 sz = nr_ites * its->ite_size;
2128 sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 2127 sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
2129 itt = kzalloc(sz, GFP_KERNEL); 2128 itt = kzalloc(sz, GFP_KERNEL);
@@ -2495,7 +2494,7 @@ static int its_vpe_set_affinity(struct irq_data *d,
2495 2494
2496static void its_vpe_schedule(struct its_vpe *vpe) 2495static void its_vpe_schedule(struct its_vpe *vpe)
2497{ 2496{
2498 void * __iomem vlpi_base = gic_data_rdist_vlpi_base(); 2497 void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
2499 u64 val; 2498 u64 val;
2500 2499
2501 /* Schedule the VPE */ 2500 /* Schedule the VPE */
@@ -2527,7 +2526,7 @@ static void its_vpe_schedule(struct its_vpe *vpe)
2527 2526
2528static void its_vpe_deschedule(struct its_vpe *vpe) 2527static void its_vpe_deschedule(struct its_vpe *vpe)
2529{ 2528{
2530 void * __iomem vlpi_base = gic_data_rdist_vlpi_base(); 2529 void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
2531 u32 count = 1000000; /* 1s! */ 2530 u32 count = 1000000; /* 1s! */
2532 bool clean; 2531 bool clean;
2533 u64 val; 2532 u64 val;
diff --git a/drivers/irqchip/irq-imx-gpcv2.c b/drivers/irqchip/irq-imx-gpcv2.c
index 675eda5ff2b8..4760307ab43f 100644
--- a/drivers/irqchip/irq-imx-gpcv2.c
+++ b/drivers/irqchip/irq-imx-gpcv2.c
@@ -28,20 +28,6 @@ struct gpcv2_irqchip_data {
28 28
29static struct gpcv2_irqchip_data *imx_gpcv2_instance; 29static struct gpcv2_irqchip_data *imx_gpcv2_instance;
30 30
31/*
32 * Interface for the low level wakeup code.
33 */
34u32 imx_gpcv2_get_wakeup_source(u32 **sources)
35{
36 if (!imx_gpcv2_instance)
37 return 0;
38
39 if (sources)
40 *sources = imx_gpcv2_instance->wakeup_sources;
41
42 return IMR_NUM;
43}
44
45static int gpcv2_wakeup_source_save(void) 31static int gpcv2_wakeup_source_save(void)
46{ 32{
47 struct gpcv2_irqchip_data *cd; 33 struct gpcv2_irqchip_data *cd;