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authorJoonwoo Park <joonwoop@codeaurora.org>2015-11-17 19:35:46 -0500
committerLinus Walleij <linus.walleij@linaro.org>2015-12-01 04:29:03 -0500
commitd1b49b68609c673f70a6da4858cc16d7749df6a3 (patch)
tree28268690e255b5515e2f0e2a8229d2f0c90b318d
parentab4256cfeab91569e1d96e7f0014538fe0845259 (diff)
pinctrl: qcom: Add msm8996 pinctrl driver
Add initial pinctrl driver to support pin configuration with pinctrl framework for msm8996. Cc: <devicetree@vger.kernel.org> Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org> [sboyd@codeaurora.org: Remove duplicate entries and enums] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt199
-rw-r--r--drivers/pinctrl/qcom/Kconfig8
-rw-r--r--drivers/pinctrl/qcom/Makefile1
-rw-r--r--drivers/pinctrl/qcom/pinctrl-msm8996.c1942
4 files changed, 2150 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt
new file mode 100644
index 000000000000..e312a71b2f94
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt
@@ -0,0 +1,199 @@
1Qualcomm MSM8996 TLMM block
2
3This binding describes the Top Level Mode Multiplexer block found in the
4MSM8996 platform.
5
6- compatible:
7 Usage: required
8 Value type: <string>
9 Definition: must be "qcom,msm8996-pinctrl"
10
11- reg:
12 Usage: required
13 Value type: <prop-encoded-array>
14 Definition: the base address and size of the TLMM register space.
15
16- interrupts:
17 Usage: required
18 Value type: <prop-encoded-array>
19 Definition: should specify the TLMM summary IRQ.
20
21- interrupt-controller:
22 Usage: required
23 Value type: <none>
24 Definition: identifies this node as an interrupt controller
25
26- #interrupt-cells:
27 Usage: required
28 Value type: <u32>
29 Definition: must be 2. Specifying the pin number and flags, as defined
30 in <dt-bindings/interrupt-controller/irq.h>
31
32- gpio-controller:
33 Usage: required
34 Value type: <none>
35 Definition: identifies this node as a gpio controller
36
37- #gpio-cells:
38 Usage: required
39 Value type: <u32>
40 Definition: must be 2. Specifying the pin number and flags, as defined
41 in <dt-bindings/gpio/gpio.h>
42
43Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
44a general description of GPIO and interrupt bindings.
45
46Please refer to pinctrl-bindings.txt in this directory for details of the
47common pinctrl bindings used by client devices, including the meaning of the
48phrase "pin configuration node".
49
50The pin configuration nodes act as a container for an arbitrary number of
51subnodes. Each of these subnodes represents some desired configuration for a
52pin, a group, or a list of pins or groups. This configuration can include the
53mux function to select on those pin(s)/group(s), and various pin configuration
54parameters, such as pull-up, drive strength, etc.
55
56
57PIN CONFIGURATION NODES:
58
59The name of each subnode is not important; all subnodes should be enumerated
60and processed purely based on their content.
61
62Each subnode only affects those parameters that are explicitly listed. In
63other words, a subnode that lists a mux function but no pin configuration
64parameters implies no information about any pin configuration parameters.
65Similarly, a pin subnode that describes a pullup parameter implies no
66information about e.g. the mux function.
67
68
69The following generic properties as defined in pinctrl-bindings.txt are valid
70to specify in a pin configuration subnode:
71
72- pins:
73 Usage: required
74 Value type: <string-array>
75 Definition: List of gpio pins affected by the properties specified in
76 this subnode.
77
78 Valid pins are:
79 gpio0-gpio149
80 Supports mux, bias and drive-strength
81
82 sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd,
83 sdc2_data sdc1_rclk
84 Supports bias and drive-strength
85
86- function:
87 Usage: required
88 Value type: <string>
89 Definition: Specify the alternative function to be configured for the
90 specified pins. Functions are only valid for gpio pins.
91 Valid values are:
92
93 blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens,
94 bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8,
95 qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b,
96 dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10,
97 blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12,
98 mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11,
99 atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio, atest_char,
100 cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8, qdss_tracedata_b,
101 pll_reset, qdss_stm6, qdss_stm5, qdss_stm4, atest_usb2, cci_i2c,
102 qdss_stm3, dac_calib3, atest_usb23, atest_char3, dac_calib4,
103 qdss_stm2, atest_usb22, atest_char2, qdss_stm1, dac_calib5,
104 atest_usb21, atest_char1, dbg_out, qdss_stm0, dac_calib6,
105 atest_usb20, atest_char0, dac_calib10, qdss_stm10,
106 qdss_cti_trig_in_a, cci_timer4, blsp_spi6, blsp_uart6, blsp_uim6,
107 blsp2_spi, qdss_stm9, qdss_cti_trig_out_a, dac_calib11,
108 qdss_stm8, cci_timer0, qdss_stm13, dac_calib7, cci_timer1,
109 qdss_stm12, dac_calib8, cci_timer2, blsp1_spi, qdss_stm11,
110 dac_calib9, cci_timer3, cci_async, dac_calib12, blsp_i2c6,
111 qdss_tracectl_a, dac_calib13, qdss_traceclk_a, dac_calib14,
112 dac_calib15, hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem,
113 dac_calib17, hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto,
114 dac_calib19, hdmi_hot, dac_calib20, dac_calib21, pci_e0,
115 dac_calib22, dac_calib23, dac_calib24, tsif1_sync, dac_calib25,
116 sd_write, tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2,
117 qdss_cti, blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3,
118 uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9,
119 blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7,
120 qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11, blsp_uart11,
121 blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a, blsp_i2c11, cri_trng0,
122 cri_trng1, cri_trng, qdss_stm18, pri_mi2s, qdss_stm17, blsp_spi4,
123 blsp_uart4, blsp_uim4, qdss_stm16, qdss_stm15, blsp_i2c4,
124 qdss_stm14, dac_calib26, spkr_i2s, audio_ref, lpass_slimbus,
125 isense_dbg, tsense_pwm1, tsense_pwm2, btfm_slimbus, ter_mi2s,
126 qdss_stm22, qdss_stm21, qdss_stm20, qdss_stm19, gcc_gp1_clk_b,
127 sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp2_clk_b,
128 gcc_gp3_clk_b, blsp_i2c5, blsp_spi12, blsp_uart12, blsp_uim12,
129 qdss_stm25, qdss_stm31, blsp_i2c12, qdss_stm30, qdss_stm29,
130 tsif1_clk, qdss_stm28, tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27,
131 qdss_traceclk_b, tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk,
132 sdc4_clk, qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b,
133 sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b,
134 ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b, blsp11_uart_rx_b,
135 blsp11_i2c_sda_b, prng_rosc, blsp11_i2c_scl_b, uim2, uim1, uim_batt,
136 pci_e2, pa_indicator, adsp_ext, ddr_bist, qdss_tracedata_11,
137 qdss_tracedata_12, modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx,
138 qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3,
139 gpio
140
141- bias-disable:
142 Usage: optional
143 Value type: <none>
144 Definition: The specified pins should be configued as no pull.
145
146- bias-pull-down:
147 Usage: optional
148 Value type: <none>
149 Definition: The specified pins should be configued as pull down.
150
151- bias-pull-up:
152 Usage: optional
153 Value type: <none>
154 Definition: The specified pins should be configued as pull up.
155
156- output-high:
157 Usage: optional
158 Value type: <none>
159 Definition: The specified pins are configured in output mode, driven
160 high.
161 Not valid for sdc pins.
162
163- output-low:
164 Usage: optional
165 Value type: <none>
166 Definition: The specified pins are configured in output mode, driven
167 low.
168 Not valid for sdc pins.
169
170- drive-strength:
171 Usage: optional
172 Value type: <u32>
173 Definition: Selects the drive strength for the specified pins, in mA.
174 Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
175
176Example:
177
178 tlmm: pinctrl@01010000 {
179 compatible = "qcom,msm8996-pinctrl";
180 reg = <0x01010000 0x300000>;
181 interrupts = <0 208 0>;
182 gpio-controller;
183 #gpio-cells = <2>;
184 interrupt-controller;
185 #interrupt-cells = <2>;
186
187 uart_console_active: uart_console_active {
188 mux {
189 pins = "gpio4", "gpio5";
190 function = "blsp_uart8";
191 };
192
193 config {
194 pins = "gpio4", "gpio5";
195 drive-strength = <2>;
196 bias-disable;
197 };
198 };
199 };
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index 383263a92e59..eeac8cba8a21 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -63,6 +63,14 @@ config PINCTRL_MSM8916
63 This is the pinctrl, pinmux, pinconf and gpiolib driver for the 63 This is the pinctrl, pinmux, pinconf and gpiolib driver for the
64 Qualcomm TLMM block found on the Qualcomm 8916 platform. 64 Qualcomm TLMM block found on the Qualcomm 8916 platform.
65 65
66config PINCTRL_MSM8996
67 tristate "Qualcomm MSM8996 pin controller driver"
68 depends on GPIOLIB && OF
69 select PINCTRL_MSM
70 help
71 This is the pinctrl, pinmux, pinconf and gpiolib driver for the
72 Qualcomm TLMM block found in the Qualcomm MSM8996 platform.
73
66config PINCTRL_QDF2XXX 74config PINCTRL_QDF2XXX
67 tristate "Qualcomm Technologies QDF2xxx pin controller driver" 75 tristate "Qualcomm Technologies QDF2xxx pin controller driver"
68 depends on GPIOLIB && ACPI 76 depends on GPIOLIB && ACPI
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
index 13b190e72c21..dfb50a9fe04a 100644
--- a/drivers/pinctrl/qcom/Makefile
+++ b/drivers/pinctrl/qcom/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_PINCTRL_MSM8660) += pinctrl-msm8660.o
7obj-$(CONFIG_PINCTRL_MSM8960) += pinctrl-msm8960.o 7obj-$(CONFIG_PINCTRL_MSM8960) += pinctrl-msm8960.o
8obj-$(CONFIG_PINCTRL_MSM8X74) += pinctrl-msm8x74.o 8obj-$(CONFIG_PINCTRL_MSM8X74) += pinctrl-msm8x74.o
9obj-$(CONFIG_PINCTRL_MSM8916) += pinctrl-msm8916.o 9obj-$(CONFIG_PINCTRL_MSM8916) += pinctrl-msm8916.o
10obj-$(CONFIG_PINCTRL_MSM8996) += pinctrl-msm8996.o
10obj-$(CONFIG_PINCTRL_QDF2XXX) += pinctrl-qdf2xxx.o 11obj-$(CONFIG_PINCTRL_QDF2XXX) += pinctrl-qdf2xxx.o
11obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-gpio.o 12obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-gpio.o
12obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-mpp.o 13obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-mpp.o
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8996.c b/drivers/pinctrl/qcom/pinctrl-msm8996.c
new file mode 100644
index 000000000000..c257927bea05
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-msm8996.c
@@ -0,0 +1,1942 @@
1/*
2 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/module.h>
15#include <linux/of.h>
16#include <linux/platform_device.h>
17#include <linux/pinctrl/pinctrl.h>
18
19#include "pinctrl-msm.h"
20
21#define FUNCTION(fname) \
22 [msm_mux_##fname] = { \
23 .name = #fname, \
24 .groups = fname##_groups, \
25 .ngroups = ARRAY_SIZE(fname##_groups), \
26 }
27
28#define REG_BASE 0x0
29#define REG_SIZE 0x1000
30#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
31 { \
32 .name = "gpio" #id, \
33 .pins = gpio##id##_pins, \
34 .npins = (unsigned)ARRAY_SIZE(gpio##id##_pins), \
35 .funcs = (int[]){ \
36 msm_mux_gpio, /* gpio mode */ \
37 msm_mux_##f1, \
38 msm_mux_##f2, \
39 msm_mux_##f3, \
40 msm_mux_##f4, \
41 msm_mux_##f5, \
42 msm_mux_##f6, \
43 msm_mux_##f7, \
44 msm_mux_##f8, \
45 msm_mux_##f9 \
46 }, \
47 .nfuncs = 10, \
48 .ctl_reg = REG_BASE + REG_SIZE * id, \
49 .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
50 .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
51 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
52 .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
53 .mux_bit = 2, \
54 .pull_bit = 0, \
55 .drv_bit = 6, \
56 .oe_bit = 9, \
57 .in_bit = 0, \
58 .out_bit = 1, \
59 .intr_enable_bit = 0, \
60 .intr_status_bit = 0, \
61 .intr_target_bit = 5, \
62 .intr_target_kpss_val = 3, \
63 .intr_raw_status_bit = 4, \
64 .intr_polarity_bit = 1, \
65 .intr_detection_bit = 2, \
66 .intr_detection_width = 2, \
67 }
68
69#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
70 { \
71 .name = #pg_name, \
72 .pins = pg_name##_pins, \
73 .npins = (unsigned)ARRAY_SIZE(pg_name##_pins), \
74 .ctl_reg = ctl, \
75 .io_reg = 0, \
76 .intr_cfg_reg = 0, \
77 .intr_status_reg = 0, \
78 .intr_target_reg = 0, \
79 .mux_bit = -1, \
80 .pull_bit = pull, \
81 .drv_bit = drv, \
82 .oe_bit = -1, \
83 .in_bit = -1, \
84 .out_bit = -1, \
85 .intr_enable_bit = -1, \
86 .intr_status_bit = -1, \
87 .intr_target_bit = -1, \
88 .intr_raw_status_bit = -1, \
89 .intr_polarity_bit = -1, \
90 .intr_detection_bit = -1, \
91 .intr_detection_width = -1, \
92 }
93static const struct pinctrl_pin_desc msm8996_pins[] = {
94 PINCTRL_PIN(0, "GPIO_0"),
95 PINCTRL_PIN(1, "GPIO_1"),
96 PINCTRL_PIN(2, "GPIO_2"),
97 PINCTRL_PIN(3, "GPIO_3"),
98 PINCTRL_PIN(4, "GPIO_4"),
99 PINCTRL_PIN(5, "GPIO_5"),
100 PINCTRL_PIN(6, "GPIO_6"),
101 PINCTRL_PIN(7, "GPIO_7"),
102 PINCTRL_PIN(8, "GPIO_8"),
103 PINCTRL_PIN(9, "GPIO_9"),
104 PINCTRL_PIN(10, "GPIO_10"),
105 PINCTRL_PIN(11, "GPIO_11"),
106 PINCTRL_PIN(12, "GPIO_12"),
107 PINCTRL_PIN(13, "GPIO_13"),
108 PINCTRL_PIN(14, "GPIO_14"),
109 PINCTRL_PIN(15, "GPIO_15"),
110 PINCTRL_PIN(16, "GPIO_16"),
111 PINCTRL_PIN(17, "GPIO_17"),
112 PINCTRL_PIN(18, "GPIO_18"),
113 PINCTRL_PIN(19, "GPIO_19"),
114 PINCTRL_PIN(20, "GPIO_20"),
115 PINCTRL_PIN(21, "GPIO_21"),
116 PINCTRL_PIN(22, "GPIO_22"),
117 PINCTRL_PIN(23, "GPIO_23"),
118 PINCTRL_PIN(24, "GPIO_24"),
119 PINCTRL_PIN(25, "GPIO_25"),
120 PINCTRL_PIN(26, "GPIO_26"),
121 PINCTRL_PIN(27, "GPIO_27"),
122 PINCTRL_PIN(28, "GPIO_28"),
123 PINCTRL_PIN(29, "GPIO_29"),
124 PINCTRL_PIN(30, "GPIO_30"),
125 PINCTRL_PIN(31, "GPIO_31"),
126 PINCTRL_PIN(32, "GPIO_32"),
127 PINCTRL_PIN(33, "GPIO_33"),
128 PINCTRL_PIN(34, "GPIO_34"),
129 PINCTRL_PIN(35, "GPIO_35"),
130 PINCTRL_PIN(36, "GPIO_36"),
131 PINCTRL_PIN(37, "GPIO_37"),
132 PINCTRL_PIN(38, "GPIO_38"),
133 PINCTRL_PIN(39, "GPIO_39"),
134 PINCTRL_PIN(40, "GPIO_40"),
135 PINCTRL_PIN(41, "GPIO_41"),
136 PINCTRL_PIN(42, "GPIO_42"),
137 PINCTRL_PIN(43, "GPIO_43"),
138 PINCTRL_PIN(44, "GPIO_44"),
139 PINCTRL_PIN(45, "GPIO_45"),
140 PINCTRL_PIN(46, "GPIO_46"),
141 PINCTRL_PIN(47, "GPIO_47"),
142 PINCTRL_PIN(48, "GPIO_48"),
143 PINCTRL_PIN(49, "GPIO_49"),
144 PINCTRL_PIN(50, "GPIO_50"),
145 PINCTRL_PIN(51, "GPIO_51"),
146 PINCTRL_PIN(52, "GPIO_52"),
147 PINCTRL_PIN(53, "GPIO_53"),
148 PINCTRL_PIN(54, "GPIO_54"),
149 PINCTRL_PIN(55, "GPIO_55"),
150 PINCTRL_PIN(56, "GPIO_56"),
151 PINCTRL_PIN(57, "GPIO_57"),
152 PINCTRL_PIN(58, "GPIO_58"),
153 PINCTRL_PIN(59, "GPIO_59"),
154 PINCTRL_PIN(60, "GPIO_60"),
155 PINCTRL_PIN(61, "GPIO_61"),
156 PINCTRL_PIN(62, "GPIO_62"),
157 PINCTRL_PIN(63, "GPIO_63"),
158 PINCTRL_PIN(64, "GPIO_64"),
159 PINCTRL_PIN(65, "GPIO_65"),
160 PINCTRL_PIN(66, "GPIO_66"),
161 PINCTRL_PIN(67, "GPIO_67"),
162 PINCTRL_PIN(68, "GPIO_68"),
163 PINCTRL_PIN(69, "GPIO_69"),
164 PINCTRL_PIN(70, "GPIO_70"),
165 PINCTRL_PIN(71, "GPIO_71"),
166 PINCTRL_PIN(72, "GPIO_72"),
167 PINCTRL_PIN(73, "GPIO_73"),
168 PINCTRL_PIN(74, "GPIO_74"),
169 PINCTRL_PIN(75, "GPIO_75"),
170 PINCTRL_PIN(76, "GPIO_76"),
171 PINCTRL_PIN(77, "GPIO_77"),
172 PINCTRL_PIN(78, "GPIO_78"),
173 PINCTRL_PIN(79, "GPIO_79"),
174 PINCTRL_PIN(80, "GPIO_80"),
175 PINCTRL_PIN(81, "GPIO_81"),
176 PINCTRL_PIN(82, "GPIO_82"),
177 PINCTRL_PIN(83, "GPIO_83"),
178 PINCTRL_PIN(84, "GPIO_84"),
179 PINCTRL_PIN(85, "GPIO_85"),
180 PINCTRL_PIN(86, "GPIO_86"),
181 PINCTRL_PIN(87, "GPIO_87"),
182 PINCTRL_PIN(88, "GPIO_88"),
183 PINCTRL_PIN(89, "GPIO_89"),
184 PINCTRL_PIN(90, "GPIO_90"),
185 PINCTRL_PIN(91, "GPIO_91"),
186 PINCTRL_PIN(92, "GPIO_92"),
187 PINCTRL_PIN(93, "GPIO_93"),
188 PINCTRL_PIN(94, "GPIO_94"),
189 PINCTRL_PIN(95, "GPIO_95"),
190 PINCTRL_PIN(96, "GPIO_96"),
191 PINCTRL_PIN(97, "GPIO_97"),
192 PINCTRL_PIN(98, "GPIO_98"),
193 PINCTRL_PIN(99, "GPIO_99"),
194 PINCTRL_PIN(100, "GPIO_100"),
195 PINCTRL_PIN(101, "GPIO_101"),
196 PINCTRL_PIN(102, "GPIO_102"),
197 PINCTRL_PIN(103, "GPIO_103"),
198 PINCTRL_PIN(104, "GPIO_104"),
199 PINCTRL_PIN(105, "GPIO_105"),
200 PINCTRL_PIN(106, "GPIO_106"),
201 PINCTRL_PIN(107, "GPIO_107"),
202 PINCTRL_PIN(108, "GPIO_108"),
203 PINCTRL_PIN(109, "GPIO_109"),
204 PINCTRL_PIN(110, "GPIO_110"),
205 PINCTRL_PIN(111, "GPIO_111"),
206 PINCTRL_PIN(112, "GPIO_112"),
207 PINCTRL_PIN(113, "GPIO_113"),
208 PINCTRL_PIN(114, "GPIO_114"),
209 PINCTRL_PIN(115, "GPIO_115"),
210 PINCTRL_PIN(116, "GPIO_116"),
211 PINCTRL_PIN(117, "GPIO_117"),
212 PINCTRL_PIN(118, "GPIO_118"),
213 PINCTRL_PIN(119, "GPIO_119"),
214 PINCTRL_PIN(120, "GPIO_120"),
215 PINCTRL_PIN(121, "GPIO_121"),
216 PINCTRL_PIN(122, "GPIO_122"),
217 PINCTRL_PIN(123, "GPIO_123"),
218 PINCTRL_PIN(124, "GPIO_124"),
219 PINCTRL_PIN(125, "GPIO_125"),
220 PINCTRL_PIN(126, "GPIO_126"),
221 PINCTRL_PIN(127, "GPIO_127"),
222 PINCTRL_PIN(128, "GPIO_128"),
223 PINCTRL_PIN(129, "GPIO_129"),
224 PINCTRL_PIN(130, "GPIO_130"),
225 PINCTRL_PIN(131, "GPIO_131"),
226 PINCTRL_PIN(132, "GPIO_132"),
227 PINCTRL_PIN(133, "GPIO_133"),
228 PINCTRL_PIN(134, "GPIO_134"),
229 PINCTRL_PIN(135, "GPIO_135"),
230 PINCTRL_PIN(136, "GPIO_136"),
231 PINCTRL_PIN(137, "GPIO_137"),
232 PINCTRL_PIN(138, "GPIO_138"),
233 PINCTRL_PIN(139, "GPIO_139"),
234 PINCTRL_PIN(140, "GPIO_140"),
235 PINCTRL_PIN(141, "GPIO_141"),
236 PINCTRL_PIN(142, "GPIO_142"),
237 PINCTRL_PIN(143, "GPIO_143"),
238 PINCTRL_PIN(144, "GPIO_144"),
239 PINCTRL_PIN(145, "GPIO_145"),
240 PINCTRL_PIN(146, "GPIO_146"),
241 PINCTRL_PIN(147, "GPIO_147"),
242 PINCTRL_PIN(148, "GPIO_148"),
243 PINCTRL_PIN(149, "GPIO_149"),
244 PINCTRL_PIN(150, "SDC1_CLK"),
245 PINCTRL_PIN(151, "SDC1_CMD"),
246 PINCTRL_PIN(152, "SDC1_DATA"),
247 PINCTRL_PIN(153, "SDC2_CLK"),
248 PINCTRL_PIN(154, "SDC2_CMD"),
249 PINCTRL_PIN(155, "SDC2_DATA"),
250 PINCTRL_PIN(156, "SDC1_RCLK"),
251};
252
253#define DECLARE_MSM_GPIO_PINS(pin) \
254 static const unsigned int gpio##pin##_pins[] = { pin }
255DECLARE_MSM_GPIO_PINS(0);
256DECLARE_MSM_GPIO_PINS(1);
257DECLARE_MSM_GPIO_PINS(2);
258DECLARE_MSM_GPIO_PINS(3);
259DECLARE_MSM_GPIO_PINS(4);
260DECLARE_MSM_GPIO_PINS(5);
261DECLARE_MSM_GPIO_PINS(6);
262DECLARE_MSM_GPIO_PINS(7);
263DECLARE_MSM_GPIO_PINS(8);
264DECLARE_MSM_GPIO_PINS(9);
265DECLARE_MSM_GPIO_PINS(10);
266DECLARE_MSM_GPIO_PINS(11);
267DECLARE_MSM_GPIO_PINS(12);
268DECLARE_MSM_GPIO_PINS(13);
269DECLARE_MSM_GPIO_PINS(14);
270DECLARE_MSM_GPIO_PINS(15);
271DECLARE_MSM_GPIO_PINS(16);
272DECLARE_MSM_GPIO_PINS(17);
273DECLARE_MSM_GPIO_PINS(18);
274DECLARE_MSM_GPIO_PINS(19);
275DECLARE_MSM_GPIO_PINS(20);
276DECLARE_MSM_GPIO_PINS(21);
277DECLARE_MSM_GPIO_PINS(22);
278DECLARE_MSM_GPIO_PINS(23);
279DECLARE_MSM_GPIO_PINS(24);
280DECLARE_MSM_GPIO_PINS(25);
281DECLARE_MSM_GPIO_PINS(26);
282DECLARE_MSM_GPIO_PINS(27);
283DECLARE_MSM_GPIO_PINS(28);
284DECLARE_MSM_GPIO_PINS(29);
285DECLARE_MSM_GPIO_PINS(30);
286DECLARE_MSM_GPIO_PINS(31);
287DECLARE_MSM_GPIO_PINS(32);
288DECLARE_MSM_GPIO_PINS(33);
289DECLARE_MSM_GPIO_PINS(34);
290DECLARE_MSM_GPIO_PINS(35);
291DECLARE_MSM_GPIO_PINS(36);
292DECLARE_MSM_GPIO_PINS(37);
293DECLARE_MSM_GPIO_PINS(38);
294DECLARE_MSM_GPIO_PINS(39);
295DECLARE_MSM_GPIO_PINS(40);
296DECLARE_MSM_GPIO_PINS(41);
297DECLARE_MSM_GPIO_PINS(42);
298DECLARE_MSM_GPIO_PINS(43);
299DECLARE_MSM_GPIO_PINS(44);
300DECLARE_MSM_GPIO_PINS(45);
301DECLARE_MSM_GPIO_PINS(46);
302DECLARE_MSM_GPIO_PINS(47);
303DECLARE_MSM_GPIO_PINS(48);
304DECLARE_MSM_GPIO_PINS(49);
305DECLARE_MSM_GPIO_PINS(50);
306DECLARE_MSM_GPIO_PINS(51);
307DECLARE_MSM_GPIO_PINS(52);
308DECLARE_MSM_GPIO_PINS(53);
309DECLARE_MSM_GPIO_PINS(54);
310DECLARE_MSM_GPIO_PINS(55);
311DECLARE_MSM_GPIO_PINS(56);
312DECLARE_MSM_GPIO_PINS(57);
313DECLARE_MSM_GPIO_PINS(58);
314DECLARE_MSM_GPIO_PINS(59);
315DECLARE_MSM_GPIO_PINS(60);
316DECLARE_MSM_GPIO_PINS(61);
317DECLARE_MSM_GPIO_PINS(62);
318DECLARE_MSM_GPIO_PINS(63);
319DECLARE_MSM_GPIO_PINS(64);
320DECLARE_MSM_GPIO_PINS(65);
321DECLARE_MSM_GPIO_PINS(66);
322DECLARE_MSM_GPIO_PINS(67);
323DECLARE_MSM_GPIO_PINS(68);
324DECLARE_MSM_GPIO_PINS(69);
325DECLARE_MSM_GPIO_PINS(70);
326DECLARE_MSM_GPIO_PINS(71);
327DECLARE_MSM_GPIO_PINS(72);
328DECLARE_MSM_GPIO_PINS(73);
329DECLARE_MSM_GPIO_PINS(74);
330DECLARE_MSM_GPIO_PINS(75);
331DECLARE_MSM_GPIO_PINS(76);
332DECLARE_MSM_GPIO_PINS(77);
333DECLARE_MSM_GPIO_PINS(78);
334DECLARE_MSM_GPIO_PINS(79);
335DECLARE_MSM_GPIO_PINS(80);
336DECLARE_MSM_GPIO_PINS(81);
337DECLARE_MSM_GPIO_PINS(82);
338DECLARE_MSM_GPIO_PINS(83);
339DECLARE_MSM_GPIO_PINS(84);
340DECLARE_MSM_GPIO_PINS(85);
341DECLARE_MSM_GPIO_PINS(86);
342DECLARE_MSM_GPIO_PINS(87);
343DECLARE_MSM_GPIO_PINS(88);
344DECLARE_MSM_GPIO_PINS(89);
345DECLARE_MSM_GPIO_PINS(90);
346DECLARE_MSM_GPIO_PINS(91);
347DECLARE_MSM_GPIO_PINS(92);
348DECLARE_MSM_GPIO_PINS(93);
349DECLARE_MSM_GPIO_PINS(94);
350DECLARE_MSM_GPIO_PINS(95);
351DECLARE_MSM_GPIO_PINS(96);
352DECLARE_MSM_GPIO_PINS(97);
353DECLARE_MSM_GPIO_PINS(98);
354DECLARE_MSM_GPIO_PINS(99);
355DECLARE_MSM_GPIO_PINS(100);
356DECLARE_MSM_GPIO_PINS(101);
357DECLARE_MSM_GPIO_PINS(102);
358DECLARE_MSM_GPIO_PINS(103);
359DECLARE_MSM_GPIO_PINS(104);
360DECLARE_MSM_GPIO_PINS(105);
361DECLARE_MSM_GPIO_PINS(106);
362DECLARE_MSM_GPIO_PINS(107);
363DECLARE_MSM_GPIO_PINS(108);
364DECLARE_MSM_GPIO_PINS(109);
365DECLARE_MSM_GPIO_PINS(110);
366DECLARE_MSM_GPIO_PINS(111);
367DECLARE_MSM_GPIO_PINS(112);
368DECLARE_MSM_GPIO_PINS(113);
369DECLARE_MSM_GPIO_PINS(114);
370DECLARE_MSM_GPIO_PINS(115);
371DECLARE_MSM_GPIO_PINS(116);
372DECLARE_MSM_GPIO_PINS(117);
373DECLARE_MSM_GPIO_PINS(118);
374DECLARE_MSM_GPIO_PINS(119);
375DECLARE_MSM_GPIO_PINS(120);
376DECLARE_MSM_GPIO_PINS(121);
377DECLARE_MSM_GPIO_PINS(122);
378DECLARE_MSM_GPIO_PINS(123);
379DECLARE_MSM_GPIO_PINS(124);
380DECLARE_MSM_GPIO_PINS(125);
381DECLARE_MSM_GPIO_PINS(126);
382DECLARE_MSM_GPIO_PINS(127);
383DECLARE_MSM_GPIO_PINS(128);
384DECLARE_MSM_GPIO_PINS(129);
385DECLARE_MSM_GPIO_PINS(130);
386DECLARE_MSM_GPIO_PINS(131);
387DECLARE_MSM_GPIO_PINS(132);
388DECLARE_MSM_GPIO_PINS(133);
389DECLARE_MSM_GPIO_PINS(134);
390DECLARE_MSM_GPIO_PINS(135);
391DECLARE_MSM_GPIO_PINS(136);
392DECLARE_MSM_GPIO_PINS(137);
393DECLARE_MSM_GPIO_PINS(138);
394DECLARE_MSM_GPIO_PINS(139);
395DECLARE_MSM_GPIO_PINS(140);
396DECLARE_MSM_GPIO_PINS(141);
397DECLARE_MSM_GPIO_PINS(142);
398DECLARE_MSM_GPIO_PINS(143);
399DECLARE_MSM_GPIO_PINS(144);
400DECLARE_MSM_GPIO_PINS(145);
401DECLARE_MSM_GPIO_PINS(146);
402DECLARE_MSM_GPIO_PINS(147);
403DECLARE_MSM_GPIO_PINS(148);
404DECLARE_MSM_GPIO_PINS(149);
405
406static const unsigned int sdc1_clk_pins[] = { 150 };
407static const unsigned int sdc1_cmd_pins[] = { 151 };
408static const unsigned int sdc1_data_pins[] = { 152 };
409static const unsigned int sdc2_clk_pins[] = { 153 };
410static const unsigned int sdc2_cmd_pins[] = { 154 };
411static const unsigned int sdc2_data_pins[] = { 155 };
412static const unsigned int sdc1_rclk_pins[] = { 156 };
413
414enum msm8996_functions {
415 msm_mux_adsp_ext,
416 msm_mux_atest_bbrx0,
417 msm_mux_atest_bbrx1,
418 msm_mux_atest_char,
419 msm_mux_atest_char0,
420 msm_mux_atest_char1,
421 msm_mux_atest_char2,
422 msm_mux_atest_char3,
423 msm_mux_atest_gpsadc0,
424 msm_mux_atest_gpsadc1,
425 msm_mux_atest_tsens,
426 msm_mux_atest_tsens2,
427 msm_mux_atest_usb1,
428 msm_mux_atest_usb10,
429 msm_mux_atest_usb11,
430 msm_mux_atest_usb12,
431 msm_mux_atest_usb13,
432 msm_mux_atest_usb2,
433 msm_mux_atest_usb20,
434 msm_mux_atest_usb21,
435 msm_mux_atest_usb22,
436 msm_mux_atest_usb23,
437 msm_mux_audio_ref,
438 msm_mux_bimc_dte0,
439 msm_mux_bimc_dte1,
440 msm_mux_blsp10_spi,
441 msm_mux_blsp11_i2c_scl_b,
442 msm_mux_blsp11_i2c_sda_b,
443 msm_mux_blsp11_uart_rx_b,
444 msm_mux_blsp11_uart_tx_b,
445 msm_mux_blsp1_spi,
446 msm_mux_blsp2_spi,
447 msm_mux_blsp_i2c1,
448 msm_mux_blsp_i2c10,
449 msm_mux_blsp_i2c11,
450 msm_mux_blsp_i2c12,
451 msm_mux_blsp_i2c2,
452 msm_mux_blsp_i2c3,
453 msm_mux_blsp_i2c4,
454 msm_mux_blsp_i2c5,
455 msm_mux_blsp_i2c6,
456 msm_mux_blsp_i2c7,
457 msm_mux_blsp_i2c8,
458 msm_mux_blsp_i2c9,
459 msm_mux_blsp_spi1,
460 msm_mux_blsp_spi10,
461 msm_mux_blsp_spi11,
462 msm_mux_blsp_spi12,
463 msm_mux_blsp_spi2,
464 msm_mux_blsp_spi3,
465 msm_mux_blsp_spi4,
466 msm_mux_blsp_spi5,
467 msm_mux_blsp_spi6,
468 msm_mux_blsp_spi7,
469 msm_mux_blsp_spi8,
470 msm_mux_blsp_spi9,
471 msm_mux_blsp_uart1,
472 msm_mux_blsp_uart10,
473 msm_mux_blsp_uart11,
474 msm_mux_blsp_uart12,
475 msm_mux_blsp_uart2,
476 msm_mux_blsp_uart3,
477 msm_mux_blsp_uart4,
478 msm_mux_blsp_uart5,
479 msm_mux_blsp_uart6,
480 msm_mux_blsp_uart7,
481 msm_mux_blsp_uart8,
482 msm_mux_blsp_uart9,
483 msm_mux_blsp_uim1,
484 msm_mux_blsp_uim10,
485 msm_mux_blsp_uim11,
486 msm_mux_blsp_uim12,
487 msm_mux_blsp_uim2,
488 msm_mux_blsp_uim3,
489 msm_mux_blsp_uim4,
490 msm_mux_blsp_uim5,
491 msm_mux_blsp_uim6,
492 msm_mux_blsp_uim7,
493 msm_mux_blsp_uim8,
494 msm_mux_blsp_uim9,
495 msm_mux_btfm_slimbus,
496 msm_mux_cam_mclk,
497 msm_mux_cci_async,
498 msm_mux_cci_i2c,
499 msm_mux_cci_timer0,
500 msm_mux_cci_timer1,
501 msm_mux_cci_timer2,
502 msm_mux_cci_timer3,
503 msm_mux_cci_timer4,
504 msm_mux_cri_trng,
505 msm_mux_cri_trng0,
506 msm_mux_cri_trng1,
507 msm_mux_dac_calib0,
508 msm_mux_dac_calib1,
509 msm_mux_dac_calib10,
510 msm_mux_dac_calib11,
511 msm_mux_dac_calib12,
512 msm_mux_dac_calib13,
513 msm_mux_dac_calib14,
514 msm_mux_dac_calib15,
515 msm_mux_dac_calib16,
516 msm_mux_dac_calib17,
517 msm_mux_dac_calib18,
518 msm_mux_dac_calib19,
519 msm_mux_dac_calib2,
520 msm_mux_dac_calib20,
521 msm_mux_dac_calib21,
522 msm_mux_dac_calib22,
523 msm_mux_dac_calib23,
524 msm_mux_dac_calib24,
525 msm_mux_dac_calib25,
526 msm_mux_dac_calib26,
527 msm_mux_dac_calib3,
528 msm_mux_dac_calib4,
529 msm_mux_dac_calib5,
530 msm_mux_dac_calib6,
531 msm_mux_dac_calib7,
532 msm_mux_dac_calib8,
533 msm_mux_dac_calib9,
534 msm_mux_dac_gpio,
535 msm_mux_dbg_out,
536 msm_mux_ddr_bist,
537 msm_mux_edp_hot,
538 msm_mux_edp_lcd,
539 msm_mux_gcc_gp1_clk_a,
540 msm_mux_gcc_gp1_clk_b,
541 msm_mux_gcc_gp2_clk_a,
542 msm_mux_gcc_gp2_clk_b,
543 msm_mux_gcc_gp3_clk_a,
544 msm_mux_gcc_gp3_clk_b,
545 msm_mux_gsm_tx,
546 msm_mux_hdmi_cec,
547 msm_mux_hdmi_ddc,
548 msm_mux_hdmi_hot,
549 msm_mux_hdmi_rcv,
550 msm_mux_isense_dbg,
551 msm_mux_ldo_en,
552 msm_mux_ldo_update,
553 msm_mux_lpass_slimbus,
554 msm_mux_m_voc,
555 msm_mux_mdp_vsync,
556 msm_mux_mdp_vsync_p_b,
557 msm_mux_mdp_vsync_s_b,
558 msm_mux_modem_tsync,
559 msm_mux_mss_lte,
560 msm_mux_nav_dr,
561 msm_mux_nav_pps,
562 msm_mux_pa_indicator,
563 msm_mux_pci_e0,
564 msm_mux_pci_e1,
565 msm_mux_pci_e2,
566 msm_mux_pll_bypassnl,
567 msm_mux_pll_reset,
568 msm_mux_pri_mi2s,
569 msm_mux_prng_rosc,
570 msm_mux_pwr_crypto,
571 msm_mux_pwr_modem,
572 msm_mux_pwr_nav,
573 msm_mux_qdss_cti,
574 msm_mux_qdss_cti_trig_in_a,
575 msm_mux_qdss_cti_trig_in_b,
576 msm_mux_qdss_cti_trig_out_a,
577 msm_mux_qdss_cti_trig_out_b,
578 msm_mux_qdss_stm0,
579 msm_mux_qdss_stm1,
580 msm_mux_qdss_stm10,
581 msm_mux_qdss_stm11,
582 msm_mux_qdss_stm12,
583 msm_mux_qdss_stm13,
584 msm_mux_qdss_stm14,
585 msm_mux_qdss_stm15,
586 msm_mux_qdss_stm16,
587 msm_mux_qdss_stm17,
588 msm_mux_qdss_stm18,
589 msm_mux_qdss_stm19,
590 msm_mux_qdss_stm2,
591 msm_mux_qdss_stm20,
592 msm_mux_qdss_stm21,
593 msm_mux_qdss_stm22,
594 msm_mux_qdss_stm23,
595 msm_mux_qdss_stm24,
596 msm_mux_qdss_stm25,
597 msm_mux_qdss_stm26,
598 msm_mux_qdss_stm27,
599 msm_mux_qdss_stm28,
600 msm_mux_qdss_stm29,
601 msm_mux_qdss_stm3,
602 msm_mux_qdss_stm30,
603 msm_mux_qdss_stm31,
604 msm_mux_qdss_stm4,
605 msm_mux_qdss_stm5,
606 msm_mux_qdss_stm6,
607 msm_mux_qdss_stm7,
608 msm_mux_qdss_stm8,
609 msm_mux_qdss_stm9,
610 msm_mux_qdss_traceclk_a,
611 msm_mux_qdss_traceclk_b,
612 msm_mux_qdss_tracectl_a,
613 msm_mux_qdss_tracectl_b,
614 msm_mux_qdss_tracedata_11,
615 msm_mux_qdss_tracedata_12,
616 msm_mux_qdss_tracedata_a,
617 msm_mux_qdss_tracedata_b,
618 msm_mux_qspi0,
619 msm_mux_qspi1,
620 msm_mux_qspi2,
621 msm_mux_qspi3,
622 msm_mux_qspi_clk,
623 msm_mux_qspi_cs,
624 msm_mux_qua_mi2s,
625 msm_mux_sd_card,
626 msm_mux_sd_write,
627 msm_mux_sdc40,
628 msm_mux_sdc41,
629 msm_mux_sdc42,
630 msm_mux_sdc43,
631 msm_mux_sdc4_clk,
632 msm_mux_sdc4_cmd,
633 msm_mux_sec_mi2s,
634 msm_mux_spkr_i2s,
635 msm_mux_ssbi1,
636 msm_mux_ssbi2,
637 msm_mux_ssc_irq,
638 msm_mux_ter_mi2s,
639 msm_mux_tsense_pwm1,
640 msm_mux_tsense_pwm2,
641 msm_mux_tsif1_clk,
642 msm_mux_tsif1_data,
643 msm_mux_tsif1_en,
644 msm_mux_tsif1_error,
645 msm_mux_tsif1_sync,
646 msm_mux_tsif2_clk,
647 msm_mux_tsif2_data,
648 msm_mux_tsif2_en,
649 msm_mux_tsif2_error,
650 msm_mux_tsif2_sync,
651 msm_mux_uim1,
652 msm_mux_uim2,
653 msm_mux_uim3,
654 msm_mux_uim4,
655 msm_mux_uim_batt,
656 msm_mux_vfr_1,
657 msm_mux_gpio,
658 msm_mux_NA,
659};
660
661static const char * const gpio_groups[] = {
662 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
663 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
664 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
665 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
666 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
667 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
668 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
669 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
670 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
671 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
672 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
673 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
674 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
675 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
676 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
677 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
678 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
679 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
680 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
681 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
682 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
683 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
684 "gpio147", "gpio148", "gpio149"
685};
686
687
688static const char * const blsp_uart1_groups[] = {
689 "gpio0", "gpio1", "gpio2", "gpio3",
690};
691static const char * const blsp_spi1_groups[] = {
692 "gpio0", "gpio1", "gpio2", "gpio3",
693};
694static const char * const blsp_i2c1_groups[] = {
695 "gpio2", "gpio3",
696};
697static const char * const blsp_uim1_groups[] = {
698 "gpio0", "gpio1",
699};
700static const char * const atest_tsens_groups[] = {
701 "gpio3",
702};
703static const char * const bimc_dte1_groups[] = {
704 "gpio3", "gpio5",
705};
706static const char * const blsp_spi8_groups[] = {
707 "gpio4", "gpio5", "gpio6", "gpio7",
708};
709static const char * const blsp_uart8_groups[] = {
710 "gpio4", "gpio5", "gpio6", "gpio7",
711};
712static const char * const blsp_uim8_groups[] = {
713 "gpio4", "gpio5",
714};
715static const char * const qdss_cti_trig_out_b_groups[] = {
716 "gpio4",
717};
718static const char * const dac_calib0_groups[] = {
719 "gpio4", "gpio41",
720};
721static const char * const bimc_dte0_groups[] = {
722 "gpio4", "gpio6",
723};
724static const char * const qdss_cti_trig_in_b_groups[] = {
725 "gpio5",
726};
727static const char * const dac_calib1_groups[] = {
728 "gpio5", "gpio42",
729};
730static const char * const dac_calib2_groups[] = {
731 "gpio6", "gpio43",
732};
733static const char * const atest_tsens2_groups[] = {
734 "gpio7",
735};
736static const char * const blsp_spi10_groups[] = {
737 "gpio8", "gpio9", "gpio10", "gpio11",
738};
739static const char * const blsp_uart10_groups[] = {
740 "gpio8", "gpio9", "gpio10", "gpio11",
741};
742static const char * const blsp_uim10_groups[] = {
743 "gpio8", "gpio9",
744};
745static const char * const atest_bbrx1_groups[] = {
746 "gpio8",
747};
748static const char * const atest_usb12_groups[] = {
749 "gpio9",
750};
751static const char * const mdp_vsync_groups[] = {
752 "gpio10", "gpio11", "gpio12",
753};
754static const char * const edp_lcd_groups[] = {
755 "gpio10",
756};
757static const char * const blsp_i2c10_groups[] = {
758 "gpio10", "gpio11",
759};
760static const char * const atest_usb11_groups[] = {
761 "gpio10",
762};
763static const char * const atest_gpsadc0_groups[] = {
764 "gpio11",
765};
766static const char * const edp_hot_groups[] = {
767 "gpio11",
768};
769static const char * const atest_usb10_groups[] = {
770 "gpio11",
771};
772static const char * const m_voc_groups[] = {
773 "gpio12",
774};
775static const char * const dac_gpio_groups[] = {
776 "gpio12",
777};
778static const char * const atest_char_groups[] = {
779 "gpio12",
780};
781static const char * const cam_mclk_groups[] = {
782 "gpio13", "gpio14", "gpio15", "gpio16",
783};
784static const char * const pll_bypassnl_groups[] = {
785 "gpio13",
786};
787static const char * const qdss_stm7_groups[] = {
788 "gpio13",
789};
790static const char * const blsp_i2c8_groups[] = {
791 "gpio6", "gpio7",
792};
793static const char * const atest_usb1_groups[] = {
794 "gpio7",
795};
796static const char * const atest_usb13_groups[] = {
797 "gpio8",
798};
799static const char * const atest_bbrx0_groups[] = {
800 "gpio9",
801};
802static const char * const atest_gpsadc1_groups[] = {
803 "gpio10",
804};
805static const char * const qdss_tracedata_b_groups[] = {
806 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19",
807 "gpio21", "gpio22", "gpio23", "gpio26", "gpio29", "gpio57", "gpio58",
808 "gpio92", "gpio93",
809};
810static const char * const pll_reset_groups[] = {
811 "gpio14",
812};
813static const char * const qdss_stm6_groups[] = {
814 "gpio14",
815};
816static const char * const qdss_stm5_groups[] = {
817 "gpio15",
818};
819static const char * const qdss_stm4_groups[] = {
820 "gpio16",
821};
822static const char * const atest_usb2_groups[] = {
823 "gpio16",
824};
825static const char * const dac_calib3_groups[] = {
826 "gpio17", "gpio44",
827};
828static const char * const cci_i2c_groups[] = {
829 "gpio17", "gpio18", "gpio19", "gpio20",
830};
831static const char * const qdss_stm3_groups[] = {
832 "gpio17",
833};
834static const char * const atest_usb23_groups[] = {
835 "gpio17",
836};
837static const char * const atest_char3_groups[] = {
838 "gpio17",
839};
840static const char * const dac_calib4_groups[] = {
841 "gpio18", "gpio45",
842};
843static const char * const qdss_stm2_groups[] = {
844 "gpio18",
845};
846static const char * const atest_usb22_groups[] = {
847 "gpio18",
848};
849static const char * const atest_char2_groups[] = {
850 "gpio18",
851};
852static const char * const dac_calib5_groups[] = {
853 "gpio19", "gpio46",
854};
855static const char * const qdss_stm1_groups[] = {
856 "gpio19",
857};
858static const char * const atest_usb21_groups[] = {
859 "gpio19",
860};
861static const char * const atest_char1_groups[] = {
862 "gpio19",
863};
864static const char * const dac_calib6_groups[] = {
865 "gpio20", "gpio47",
866};
867static const char * const dbg_out_groups[] = {
868 "gpio20",
869};
870static const char * const qdss_stm0_groups[] = {
871 "gpio20",
872};
873static const char * const atest_usb20_groups[] = {
874 "gpio20",
875};
876static const char * const atest_char0_groups[] = {
877 "gpio20",
878};
879static const char * const dac_calib7_groups[] = {
880 "gpio21", "gpio48",
881};
882static const char * const cci_timer0_groups[] = {
883 "gpio21",
884};
885static const char * const qdss_stm13_groups[] = {
886 "gpio21",
887};
888static const char * const dac_calib8_groups[] = {
889 "gpio22", "gpio49",
890};
891static const char * const cci_timer1_groups[] = {
892 "gpio22",
893};
894static const char * const qdss_stm12_groups[] = {
895 "gpio22",
896};
897static const char * const dac_calib9_groups[] = {
898 "gpio23", "gpio50",
899};
900static const char * const cci_timer2_groups[] = {
901 "gpio23",
902};
903static const char * const qdss_stm11_groups[] = {
904 "gpio23",
905};
906static const char * const dac_calib10_groups[] = {
907 "gpio24", "gpio51",
908};
909static const char * const cci_timer3_groups[] = {
910 "gpio24",
911};
912static const char * const cci_async_groups[] = {
913 "gpio24", "gpio25", "gpio26",
914};
915static const char * const blsp1_spi_groups[] = {
916 "gpio24", "gpio27", "gpio28", "gpio90",
917};
918static const char * const qdss_stm10_groups[] = {
919 "gpio24",
920};
921static const char * const qdss_cti_trig_in_a_groups[] = {
922 "gpio24",
923};
924static const char * const dac_calib11_groups[] = {
925 "gpio25", "gpio52",
926};
927static const char * const cci_timer4_groups[] = {
928 "gpio25",
929};
930static const char * const blsp_spi6_groups[] = {
931 "gpio25", "gpio26", "gpio27", "gpio28",
932};
933static const char * const blsp_uart6_groups[] = {
934 "gpio25", "gpio26", "gpio27", "gpio28",
935};
936static const char * const blsp_uim6_groups[] = {
937 "gpio25", "gpio26",
938};
939static const char * const blsp2_spi_groups[] = {
940 "gpio25", "gpio29", "gpio30",
941};
942static const char * const qdss_stm9_groups[] = {
943 "gpio25",
944};
945static const char * const qdss_cti_trig_out_a_groups[] = {
946 "gpio25",
947};
948static const char * const dac_calib12_groups[] = {
949 "gpio26", "gpio53",
950};
951static const char * const qdss_stm8_groups[] = {
952 "gpio26",
953};
954static const char * const dac_calib13_groups[] = {
955 "gpio27", "gpio54",
956};
957static const char * const blsp_i2c6_groups[] = {
958 "gpio27", "gpio28",
959};
960static const char * const qdss_tracectl_a_groups[] = {
961 "gpio27",
962};
963static const char * const dac_calib14_groups[] = {
964 "gpio28", "gpio55",
965};
966static const char * const qdss_traceclk_a_groups[] = {
967 "gpio28",
968};
969static const char * const dac_calib15_groups[] = {
970 "gpio29", "gpio56",
971};
972static const char * const dac_calib16_groups[] = {
973 "gpio30", "gpio57",
974};
975static const char * const hdmi_rcv_groups[] = {
976 "gpio30",
977};
978static const char * const dac_calib17_groups[] = {
979 "gpio31", "gpio58",
980};
981static const char * const pwr_modem_groups[] = {
982 "gpio31",
983};
984static const char * const hdmi_cec_groups[] = {
985 "gpio31",
986};
987static const char * const pwr_nav_groups[] = {
988 "gpio32",
989};
990static const char * const dac_calib18_groups[] = {
991 "gpio32", "gpio59",
992};
993static const char * const hdmi_ddc_groups[] = {
994 "gpio32", "gpio33",
995};
996static const char * const pwr_crypto_groups[] = {
997 "gpio33",
998};
999static const char * const dac_calib19_groups[] = {
1000 "gpio33", "gpio60",
1001};
1002static const char * const dac_calib20_groups[] = {
1003 "gpio34", "gpio61",
1004};
1005static const char * const hdmi_hot_groups[] = {
1006 "gpio34",
1007};
1008static const char * const dac_calib21_groups[] = {
1009 "gpio35", "gpio62",
1010};
1011static const char * const pci_e0_groups[] = {
1012 "gpio35", "gpio36",
1013};
1014static const char * const dac_calib22_groups[] = {
1015 "gpio36", "gpio63",
1016};
1017static const char * const dac_calib23_groups[] = {
1018 "gpio37", "gpio64",
1019};
1020static const char * const blsp_i2c2_groups[] = {
1021 "gpio43", "gpio44",
1022};
1023static const char * const blsp_spi3_groups[] = {
1024 "gpio45", "gpio46", "gpio47", "gpio48",
1025};
1026static const char * const blsp_uart3_groups[] = {
1027 "gpio45", "gpio46", "gpio47", "gpio48",
1028};
1029static const char * const blsp_uim3_groups[] = {
1030 "gpio45", "gpio46",
1031};
1032static const char * const blsp_i2c3_groups[] = {
1033 "gpio47", "gpio48",
1034};
1035static const char * const dac_calib24_groups[] = {
1036 "gpio38", "gpio65",
1037};
1038static const char * const dac_calib25_groups[] = {
1039 "gpio39", "gpio66",
1040};
1041static const char * const tsif1_sync_groups[] = {
1042 "gpio39",
1043};
1044static const char * const sd_write_groups[] = {
1045 "gpio40",
1046};
1047static const char * const tsif1_error_groups[] = {
1048 "gpio40",
1049};
1050static const char * const blsp_spi2_groups[] = {
1051 "gpio41", "gpio42", "gpio43", "gpio44",
1052};
1053static const char * const blsp_uart2_groups[] = {
1054 "gpio41", "gpio42", "gpio43", "gpio44",
1055};
1056static const char * const blsp_uim2_groups[] = {
1057 "gpio41", "gpio42",
1058};
1059static const char * const qdss_cti_groups[] = {
1060 "gpio41", "gpio42", "gpio100", "gpio101",
1061};
1062static const char * const uim3_groups[] = {
1063 "gpio49", "gpio50", "gpio51", "gpio52",
1064};
1065static const char * const blsp_spi9_groups[] = {
1066 "gpio49", "gpio50", "gpio51", "gpio52",
1067};
1068static const char * const blsp_uart9_groups[] = {
1069 "gpio49", "gpio50", "gpio51", "gpio52",
1070};
1071static const char * const blsp_uim9_groups[] = {
1072 "gpio49", "gpio50",
1073};
1074static const char * const blsp10_spi_groups[] = {
1075 "gpio49", "gpio50", "gpio51", "gpio52", "gpio88",
1076};
1077static const char * const blsp_i2c9_groups[] = {
1078 "gpio51", "gpio52",
1079};
1080static const char * const blsp_spi7_groups[] = {
1081 "gpio53", "gpio54", "gpio55", "gpio56",
1082};
1083static const char * const blsp_uart7_groups[] = {
1084 "gpio53", "gpio54", "gpio55", "gpio56",
1085};
1086static const char * const blsp_uim7_groups[] = {
1087 "gpio53", "gpio54",
1088};
1089static const char * const qdss_tracedata_a_groups[] = {
1090 "gpio53", "gpio54", "gpio63", "gpio64", "gpio65", "gpio66", "gpio67",
1091 "gpio74", "gpio75", "gpio76", "gpio77", "gpio85", "gpio86", "gpio87",
1092 "gpio89", "gpio90",
1093};
1094static const char * const blsp_i2c7_groups[] = {
1095 "gpio55", "gpio56",
1096};
1097static const char * const qua_mi2s_groups[] = {
1098 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
1099};
1100static const char * const gcc_gp1_clk_a_groups[] = {
1101 "gpio57",
1102};
1103static const char * const uim4_groups[] = {
1104 "gpio58", "gpio59", "gpio60", "gpio61",
1105};
1106static const char * const blsp_spi11_groups[] = {
1107 "gpio58", "gpio59", "gpio60", "gpio61",
1108};
1109static const char * const blsp_uart11_groups[] = {
1110 "gpio58", "gpio59", "gpio60", "gpio61",
1111};
1112static const char * const blsp_uim11_groups[] = {
1113 "gpio58", "gpio59",
1114};
1115static const char * const gcc_gp2_clk_a_groups[] = {
1116 "gpio58",
1117};
1118static const char * const gcc_gp3_clk_a_groups[] = {
1119 "gpio59",
1120};
1121static const char * const blsp_i2c11_groups[] = {
1122 "gpio60", "gpio61",
1123};
1124static const char * const cri_trng0_groups[] = {
1125 "gpio60",
1126};
1127static const char * const cri_trng1_groups[] = {
1128 "gpio61",
1129};
1130static const char * const cri_trng_groups[] = {
1131 "gpio62",
1132};
1133static const char * const qdss_stm18_groups[] = {
1134 "gpio63",
1135};
1136static const char * const pri_mi2s_groups[] = {
1137 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68",
1138};
1139static const char * const qdss_stm17_groups[] = {
1140 "gpio64",
1141};
1142static const char * const blsp_spi4_groups[] = {
1143 "gpio65", "gpio66", "gpio67", "gpio68",
1144};
1145static const char * const blsp_uart4_groups[] = {
1146 "gpio65", "gpio66", "gpio67", "gpio68",
1147};
1148static const char * const blsp_uim4_groups[] = {
1149 "gpio65", "gpio66",
1150};
1151static const char * const qdss_stm16_groups[] = {
1152 "gpio65",
1153};
1154static const char * const qdss_stm15_groups[] = {
1155 "gpio66",
1156};
1157static const char * const dac_calib26_groups[] = {
1158 "gpio67",
1159};
1160static const char * const blsp_i2c4_groups[] = {
1161 "gpio67", "gpio68",
1162};
1163static const char * const qdss_stm14_groups[] = {
1164 "gpio67",
1165};
1166static const char * const spkr_i2s_groups[] = {
1167 "gpio69", "gpio70", "gpio71", "gpio72",
1168};
1169static const char * const audio_ref_groups[] = {
1170 "gpio69",
1171};
1172static const char * const lpass_slimbus_groups[] = {
1173 "gpio70", "gpio71", "gpio72",
1174};
1175static const char * const isense_dbg_groups[] = {
1176 "gpio70",
1177};
1178static const char * const tsense_pwm1_groups[] = {
1179 "gpio71",
1180};
1181static const char * const tsense_pwm2_groups[] = {
1182 "gpio71",
1183};
1184static const char * const btfm_slimbus_groups[] = {
1185 "gpio73", "gpio74",
1186};
1187static const char * const ter_mi2s_groups[] = {
1188 "gpio74", "gpio75", "gpio76", "gpio77", "gpio78",
1189};
1190static const char * const qdss_stm22_groups[] = {
1191 "gpio74",
1192};
1193static const char * const qdss_stm21_groups[] = {
1194 "gpio75",
1195};
1196static const char * const qdss_stm20_groups[] = {
1197 "gpio76",
1198};
1199static const char * const qdss_stm19_groups[] = {
1200 "gpio77",
1201};
1202static const char * const ssc_irq_groups[] = {
1203 "gpio78", "gpio79", "gpio80", "gpio117", "gpio118", "gpio119",
1204 "gpio120", "gpio121", "gpio122", "gpio123", "gpio124", "gpio125",
1205};
1206static const char * const gcc_gp1_clk_b_groups[] = {
1207 "gpio78",
1208};
1209static const char * const sec_mi2s_groups[] = {
1210 "gpio79", "gpio80", "gpio81", "gpio82", "gpio83",
1211};
1212static const char * const blsp_spi5_groups[] = {
1213 "gpio81", "gpio82", "gpio83", "gpio84",
1214};
1215static const char * const blsp_uart5_groups[] = {
1216 "gpio81", "gpio82", "gpio83", "gpio84",
1217};
1218static const char * const blsp_uim5_groups[] = {
1219 "gpio81", "gpio82",
1220};
1221static const char * const gcc_gp2_clk_b_groups[] = {
1222 "gpio81",
1223};
1224static const char * const gcc_gp3_clk_b_groups[] = {
1225 "gpio82",
1226};
1227static const char * const blsp_i2c5_groups[] = {
1228 "gpio83", "gpio84",
1229};
1230static const char * const blsp_spi12_groups[] = {
1231 "gpio85", "gpio86", "gpio87", "gpio88",
1232};
1233static const char * const blsp_uart12_groups[] = {
1234 "gpio85", "gpio86", "gpio87", "gpio88",
1235};
1236static const char * const blsp_uim12_groups[] = {
1237 "gpio85", "gpio86",
1238};
1239static const char * const qdss_stm25_groups[] = {
1240 "gpio85",
1241};
1242static const char * const qdss_stm31_groups[] = {
1243 "gpio86",
1244};
1245static const char * const blsp_i2c12_groups[] = {
1246 "gpio87", "gpio88",
1247};
1248static const char * const qdss_stm30_groups[] = {
1249 "gpio87",
1250};
1251static const char * const qdss_stm29_groups[] = {
1252 "gpio88",
1253};
1254static const char * const tsif1_clk_groups[] = {
1255 "gpio89",
1256};
1257static const char * const qdss_stm28_groups[] = {
1258 "gpio89",
1259};
1260static const char * const tsif1_en_groups[] = {
1261 "gpio90",
1262};
1263static const char * const tsif1_data_groups[] = {
1264 "gpio91",
1265};
1266static const char * const sdc4_cmd_groups[] = {
1267 "gpio91",
1268};
1269static const char * const qdss_stm27_groups[] = {
1270 "gpio91",
1271};
1272static const char * const qdss_traceclk_b_groups[] = {
1273 "gpio91",
1274};
1275static const char * const tsif2_error_groups[] = {
1276 "gpio92",
1277};
1278static const char * const sdc43_groups[] = {
1279 "gpio92",
1280};
1281static const char * const vfr_1_groups[] = {
1282 "gpio92",
1283};
1284static const char * const qdss_stm26_groups[] = {
1285 "gpio92",
1286};
1287static const char * const tsif2_clk_groups[] = {
1288 "gpio93",
1289};
1290static const char * const sdc4_clk_groups[] = {
1291 "gpio93",
1292};
1293static const char * const qdss_stm24_groups[] = {
1294 "gpio93",
1295};
1296static const char * const tsif2_en_groups[] = {
1297 "gpio94",
1298};
1299static const char * const sdc42_groups[] = {
1300 "gpio94",
1301};
1302static const char * const qdss_stm23_groups[] = {
1303 "gpio94",
1304};
1305static const char * const qdss_tracectl_b_groups[] = {
1306 "gpio94",
1307};
1308static const char * const sd_card_groups[] = {
1309 "gpio95",
1310};
1311static const char * const tsif2_data_groups[] = {
1312 "gpio95",
1313};
1314static const char * const sdc41_groups[] = {
1315 "gpio95",
1316};
1317static const char * const tsif2_sync_groups[] = {
1318 "gpio96",
1319};
1320static const char * const sdc40_groups[] = {
1321 "gpio96",
1322};
1323static const char * const mdp_vsync_p_b_groups[] = {
1324 "gpio97",
1325};
1326static const char * const ldo_en_groups[] = {
1327 "gpio97",
1328};
1329static const char * const mdp_vsync_s_b_groups[] = {
1330 "gpio98",
1331};
1332static const char * const ldo_update_groups[] = {
1333 "gpio98",
1334};
1335static const char * const blsp11_uart_tx_b_groups[] = {
1336 "gpio100",
1337};
1338static const char * const blsp11_uart_rx_b_groups[] = {
1339 "gpio101",
1340};
1341static const char * const blsp11_i2c_sda_b_groups[] = {
1342 "gpio102",
1343};
1344static const char * const prng_rosc_groups[] = {
1345 "gpio102",
1346};
1347static const char * const blsp11_i2c_scl_b_groups[] = {
1348 "gpio103",
1349};
1350static const char * const uim2_groups[] = {
1351 "gpio105", "gpio106", "gpio107", "gpio108",
1352};
1353static const char * const uim1_groups[] = {
1354 "gpio109", "gpio110", "gpio111", "gpio112",
1355};
1356static const char * const uim_batt_groups[] = {
1357 "gpio113",
1358};
1359static const char * const pci_e2_groups[] = {
1360 "gpio114", "gpio115", "gpio116",
1361};
1362static const char * const pa_indicator_groups[] = {
1363 "gpio116",
1364};
1365static const char * const adsp_ext_groups[] = {
1366 "gpio118",
1367};
1368static const char * const ddr_bist_groups[] = {
1369 "gpio121", "gpio122", "gpio123", "gpio124",
1370};
1371static const char * const qdss_tracedata_11_groups[] = {
1372 "gpio123",
1373};
1374static const char * const qdss_tracedata_12_groups[] = {
1375 "gpio124",
1376};
1377static const char * const modem_tsync_groups[] = {
1378 "gpio128",
1379};
1380static const char * const nav_dr_groups[] = {
1381 "gpio128",
1382};
1383static const char * const nav_pps_groups[] = {
1384 "gpio128",
1385};
1386static const char * const pci_e1_groups[] = {
1387 "gpio130", "gpio131", "gpio132",
1388};
1389static const char * const gsm_tx_groups[] = {
1390 "gpio134", "gpio135",
1391};
1392static const char * const qspi_cs_groups[] = {
1393 "gpio138", "gpio141",
1394};
1395static const char * const ssbi2_groups[] = {
1396 "gpio139",
1397};
1398static const char * const ssbi1_groups[] = {
1399 "gpio140",
1400};
1401static const char * const mss_lte_groups[] = {
1402 "gpio144", "gpio145",
1403};
1404static const char * const qspi_clk_groups[] = {
1405 "gpio145",
1406};
1407static const char * const qspi0_groups[] = {
1408 "gpio146",
1409};
1410static const char * const qspi1_groups[] = {
1411 "gpio147",
1412};
1413static const char * const qspi2_groups[] = {
1414 "gpio148",
1415};
1416static const char * const qspi3_groups[] = {
1417 "gpio149",
1418};
1419
1420static const struct msm_function msm8996_functions[] = {
1421 FUNCTION(adsp_ext),
1422 FUNCTION(atest_bbrx0),
1423 FUNCTION(atest_bbrx1),
1424 FUNCTION(atest_char),
1425 FUNCTION(atest_char0),
1426 FUNCTION(atest_char1),
1427 FUNCTION(atest_char2),
1428 FUNCTION(atest_char3),
1429 FUNCTION(atest_gpsadc0),
1430 FUNCTION(atest_gpsadc1),
1431 FUNCTION(atest_tsens),
1432 FUNCTION(atest_tsens2),
1433 FUNCTION(atest_usb1),
1434 FUNCTION(atest_usb10),
1435 FUNCTION(atest_usb11),
1436 FUNCTION(atest_usb12),
1437 FUNCTION(atest_usb13),
1438 FUNCTION(atest_usb2),
1439 FUNCTION(atest_usb20),
1440 FUNCTION(atest_usb21),
1441 FUNCTION(atest_usb22),
1442 FUNCTION(atest_usb23),
1443 FUNCTION(audio_ref),
1444 FUNCTION(bimc_dte0),
1445 FUNCTION(bimc_dte1),
1446 FUNCTION(blsp10_spi),
1447 FUNCTION(blsp11_i2c_scl_b),
1448 FUNCTION(blsp11_i2c_sda_b),
1449 FUNCTION(blsp11_uart_rx_b),
1450 FUNCTION(blsp11_uart_tx_b),
1451 FUNCTION(blsp1_spi),
1452 FUNCTION(blsp2_spi),
1453 FUNCTION(blsp_i2c1),
1454 FUNCTION(blsp_i2c10),
1455 FUNCTION(blsp_i2c11),
1456 FUNCTION(blsp_i2c12),
1457 FUNCTION(blsp_i2c2),
1458 FUNCTION(blsp_i2c3),
1459 FUNCTION(blsp_i2c4),
1460 FUNCTION(blsp_i2c5),
1461 FUNCTION(blsp_i2c6),
1462 FUNCTION(blsp_i2c7),
1463 FUNCTION(blsp_i2c8),
1464 FUNCTION(blsp_i2c9),
1465 FUNCTION(blsp_spi1),
1466 FUNCTION(blsp_spi10),
1467 FUNCTION(blsp_spi11),
1468 FUNCTION(blsp_spi12),
1469 FUNCTION(blsp_spi2),
1470 FUNCTION(blsp_spi3),
1471 FUNCTION(blsp_spi4),
1472 FUNCTION(blsp_spi5),
1473 FUNCTION(blsp_spi6),
1474 FUNCTION(blsp_spi7),
1475 FUNCTION(blsp_spi8),
1476 FUNCTION(blsp_spi9),
1477 FUNCTION(blsp_uart1),
1478 FUNCTION(blsp_uart10),
1479 FUNCTION(blsp_uart11),
1480 FUNCTION(blsp_uart12),
1481 FUNCTION(blsp_uart2),
1482 FUNCTION(blsp_uart3),
1483 FUNCTION(blsp_uart4),
1484 FUNCTION(blsp_uart5),
1485 FUNCTION(blsp_uart6),
1486 FUNCTION(blsp_uart7),
1487 FUNCTION(blsp_uart8),
1488 FUNCTION(blsp_uart9),
1489 FUNCTION(blsp_uim1),
1490 FUNCTION(blsp_uim10),
1491 FUNCTION(blsp_uim11),
1492 FUNCTION(blsp_uim12),
1493 FUNCTION(blsp_uim2),
1494 FUNCTION(blsp_uim3),
1495 FUNCTION(blsp_uim4),
1496 FUNCTION(blsp_uim5),
1497 FUNCTION(blsp_uim6),
1498 FUNCTION(blsp_uim7),
1499 FUNCTION(blsp_uim8),
1500 FUNCTION(blsp_uim9),
1501 FUNCTION(btfm_slimbus),
1502 FUNCTION(cam_mclk),
1503 FUNCTION(cci_async),
1504 FUNCTION(cci_i2c),
1505 FUNCTION(cci_timer0),
1506 FUNCTION(cci_timer1),
1507 FUNCTION(cci_timer2),
1508 FUNCTION(cci_timer3),
1509 FUNCTION(cci_timer4),
1510 FUNCTION(cri_trng),
1511 FUNCTION(cri_trng0),
1512 FUNCTION(cri_trng1),
1513 FUNCTION(dac_calib0),
1514 FUNCTION(dac_calib1),
1515 FUNCTION(dac_calib10),
1516 FUNCTION(dac_calib11),
1517 FUNCTION(dac_calib12),
1518 FUNCTION(dac_calib13),
1519 FUNCTION(dac_calib14),
1520 FUNCTION(dac_calib15),
1521 FUNCTION(dac_calib16),
1522 FUNCTION(dac_calib17),
1523 FUNCTION(dac_calib18),
1524 FUNCTION(dac_calib19),
1525 FUNCTION(dac_calib2),
1526 FUNCTION(dac_calib20),
1527 FUNCTION(dac_calib21),
1528 FUNCTION(dac_calib22),
1529 FUNCTION(dac_calib23),
1530 FUNCTION(dac_calib24),
1531 FUNCTION(dac_calib25),
1532 FUNCTION(dac_calib26),
1533 FUNCTION(dac_calib3),
1534 FUNCTION(dac_calib4),
1535 FUNCTION(dac_calib5),
1536 FUNCTION(dac_calib6),
1537 FUNCTION(dac_calib7),
1538 FUNCTION(dac_calib8),
1539 FUNCTION(dac_calib9),
1540 FUNCTION(dac_gpio),
1541 FUNCTION(dbg_out),
1542 FUNCTION(ddr_bist),
1543 FUNCTION(edp_hot),
1544 FUNCTION(edp_lcd),
1545 FUNCTION(gcc_gp1_clk_a),
1546 FUNCTION(gcc_gp1_clk_b),
1547 FUNCTION(gcc_gp2_clk_a),
1548 FUNCTION(gcc_gp2_clk_b),
1549 FUNCTION(gcc_gp3_clk_a),
1550 FUNCTION(gcc_gp3_clk_b),
1551 FUNCTION(gpio),
1552 FUNCTION(gsm_tx),
1553 FUNCTION(hdmi_cec),
1554 FUNCTION(hdmi_ddc),
1555 FUNCTION(hdmi_hot),
1556 FUNCTION(hdmi_rcv),
1557 FUNCTION(isense_dbg),
1558 FUNCTION(ldo_en),
1559 FUNCTION(ldo_update),
1560 FUNCTION(lpass_slimbus),
1561 FUNCTION(m_voc),
1562 FUNCTION(mdp_vsync),
1563 FUNCTION(mdp_vsync_p_b),
1564 FUNCTION(mdp_vsync_s_b),
1565 FUNCTION(modem_tsync),
1566 FUNCTION(mss_lte),
1567 FUNCTION(nav_dr),
1568 FUNCTION(nav_pps),
1569 FUNCTION(pa_indicator),
1570 FUNCTION(pci_e0),
1571 FUNCTION(pci_e1),
1572 FUNCTION(pci_e2),
1573 FUNCTION(pll_bypassnl),
1574 FUNCTION(pll_reset),
1575 FUNCTION(pri_mi2s),
1576 FUNCTION(prng_rosc),
1577 FUNCTION(pwr_crypto),
1578 FUNCTION(pwr_modem),
1579 FUNCTION(pwr_nav),
1580 FUNCTION(qdss_cti),
1581 FUNCTION(qdss_cti_trig_in_a),
1582 FUNCTION(qdss_cti_trig_in_b),
1583 FUNCTION(qdss_cti_trig_out_a),
1584 FUNCTION(qdss_cti_trig_out_b),
1585 FUNCTION(qdss_stm0),
1586 FUNCTION(qdss_stm1),
1587 FUNCTION(qdss_stm10),
1588 FUNCTION(qdss_stm11),
1589 FUNCTION(qdss_stm12),
1590 FUNCTION(qdss_stm13),
1591 FUNCTION(qdss_stm14),
1592 FUNCTION(qdss_stm15),
1593 FUNCTION(qdss_stm16),
1594 FUNCTION(qdss_stm17),
1595 FUNCTION(qdss_stm18),
1596 FUNCTION(qdss_stm19),
1597 FUNCTION(qdss_stm2),
1598 FUNCTION(qdss_stm20),
1599 FUNCTION(qdss_stm21),
1600 FUNCTION(qdss_stm22),
1601 FUNCTION(qdss_stm23),
1602 FUNCTION(qdss_stm24),
1603 FUNCTION(qdss_stm25),
1604 FUNCTION(qdss_stm26),
1605 FUNCTION(qdss_stm27),
1606 FUNCTION(qdss_stm28),
1607 FUNCTION(qdss_stm29),
1608 FUNCTION(qdss_stm3),
1609 FUNCTION(qdss_stm30),
1610 FUNCTION(qdss_stm31),
1611 FUNCTION(qdss_stm4),
1612 FUNCTION(qdss_stm5),
1613 FUNCTION(qdss_stm6),
1614 FUNCTION(qdss_stm7),
1615 FUNCTION(qdss_stm8),
1616 FUNCTION(qdss_stm9),
1617 FUNCTION(qdss_traceclk_a),
1618 FUNCTION(qdss_traceclk_b),
1619 FUNCTION(qdss_tracectl_a),
1620 FUNCTION(qdss_tracectl_b),
1621 FUNCTION(qdss_tracedata_11),
1622 FUNCTION(qdss_tracedata_12),
1623 FUNCTION(qdss_tracedata_a),
1624 FUNCTION(qdss_tracedata_b),
1625 FUNCTION(qspi0),
1626 FUNCTION(qspi1),
1627 FUNCTION(qspi2),
1628 FUNCTION(qspi3),
1629 FUNCTION(qspi_clk),
1630 FUNCTION(qspi_cs),
1631 FUNCTION(qua_mi2s),
1632 FUNCTION(sd_card),
1633 FUNCTION(sd_write),
1634 FUNCTION(sdc40),
1635 FUNCTION(sdc41),
1636 FUNCTION(sdc42),
1637 FUNCTION(sdc43),
1638 FUNCTION(sdc4_clk),
1639 FUNCTION(sdc4_cmd),
1640 FUNCTION(sec_mi2s),
1641 FUNCTION(spkr_i2s),
1642 FUNCTION(ssbi1),
1643 FUNCTION(ssbi2),
1644 FUNCTION(ssc_irq),
1645 FUNCTION(ter_mi2s),
1646 FUNCTION(tsense_pwm1),
1647 FUNCTION(tsense_pwm2),
1648 FUNCTION(tsif1_clk),
1649 FUNCTION(tsif1_data),
1650 FUNCTION(tsif1_en),
1651 FUNCTION(tsif1_error),
1652 FUNCTION(tsif1_sync),
1653 FUNCTION(tsif2_clk),
1654 FUNCTION(tsif2_data),
1655 FUNCTION(tsif2_en),
1656 FUNCTION(tsif2_error),
1657 FUNCTION(tsif2_sync),
1658 FUNCTION(uim1),
1659 FUNCTION(uim2),
1660 FUNCTION(uim3),
1661 FUNCTION(uim4),
1662 FUNCTION(uim_batt),
1663 FUNCTION(vfr_1),
1664};
1665
1666static const struct msm_pingroup msm8996_groups[] = {
1667 PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA, NA, NA),
1668 PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA, NA, NA),
1669 PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA),
1670 PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, atest_tsens,
1671 bimc_dte1, NA, NA, NA),
1672 PINGROUP(4, blsp_spi8, blsp_uart8, blsp_uim8, NA, qdss_cti_trig_out_b,
1673 dac_calib0, bimc_dte0, NA, NA),
1674 PINGROUP(5, blsp_spi8, blsp_uart8, blsp_uim8, NA, qdss_cti_trig_in_b,
1675 dac_calib1, bimc_dte1, NA, NA),
1676 PINGROUP(6, blsp_spi8, blsp_uart8, blsp_i2c8, NA, dac_calib2,
1677 bimc_dte0, NA, NA, NA),
1678 PINGROUP(7, blsp_spi8, blsp_uart8, blsp_i2c8, NA, atest_tsens2,
1679 atest_usb1, NA, NA, NA),
1680 PINGROUP(8, blsp_spi10, blsp_uart10, blsp_uim10, NA, atest_bbrx1,
1681 atest_usb13, NA, NA, NA),
1682 PINGROUP(9, blsp_spi10, blsp_uart10, blsp_uim10, atest_bbrx0,
1683 atest_usb12, NA, NA, NA, NA),
1684 PINGROUP(10, mdp_vsync, blsp_spi10, blsp_uart10, blsp_i2c10,
1685 atest_gpsadc1, atest_usb11, NA, NA, NA),
1686 PINGROUP(11, mdp_vsync, blsp_spi10, blsp_uart10, blsp_i2c10,
1687 atest_gpsadc0, atest_usb10, NA, NA, NA),
1688 PINGROUP(12, mdp_vsync, m_voc, dac_gpio, atest_char, NA, NA, NA, NA,
1689 NA),
1690 PINGROUP(13, cam_mclk, pll_bypassnl, qdss_stm7, qdss_tracedata_b, NA,
1691 NA, NA, NA, NA),
1692 PINGROUP(14, cam_mclk, pll_reset, qdss_stm6, qdss_tracedata_b, NA, NA,
1693 NA, NA, NA),
1694 PINGROUP(15, cam_mclk, qdss_stm5, qdss_tracedata_b, NA, NA, NA, NA, NA,
1695 NA),
1696 PINGROUP(16, cam_mclk, qdss_stm4, qdss_tracedata_b, NA, atest_usb2, NA,
1697 NA, NA, NA),
1698 PINGROUP(17, cci_i2c, qdss_stm3, qdss_tracedata_b, dac_calib3,
1699 atest_usb23, atest_char3, NA, NA, NA),
1700 PINGROUP(18, cci_i2c, qdss_stm2, qdss_tracedata_b, dac_calib4,
1701 atest_usb22, atest_char2, NA, NA, NA),
1702 PINGROUP(19, cci_i2c, qdss_stm1, qdss_tracedata_b, dac_calib5,
1703 atest_usb21, atest_char1, NA, NA, NA),
1704 PINGROUP(20, cci_i2c, dbg_out, qdss_stm0, dac_calib6, atest_usb20,
1705 atest_char0, NA, NA, NA),
1706 PINGROUP(21, cci_timer0, qdss_stm13, qdss_tracedata_b, dac_calib7, NA,
1707 NA, NA, NA, NA),
1708 PINGROUP(22, cci_timer1, qdss_stm12, qdss_tracedata_b, dac_calib8, NA,
1709 NA, NA, NA, NA),
1710 PINGROUP(23, cci_timer2, blsp1_spi, qdss_stm11, qdss_tracedata_b,
1711 dac_calib9, NA, NA, NA, NA),
1712 PINGROUP(24, cci_timer3, cci_async, blsp1_spi, qdss_stm10,
1713 qdss_cti_trig_in_a, dac_calib10, NA, NA, NA),
1714 PINGROUP(25, cci_timer4, cci_async, blsp_spi6, blsp_uart6, blsp_uim6,
1715 blsp2_spi, qdss_stm9, qdss_cti_trig_out_a, dac_calib11),
1716 PINGROUP(26, cci_async, blsp_spi6, blsp_uart6, blsp_uim6, qdss_stm8,
1717 qdss_tracedata_b, dac_calib12, NA, NA),
1718 PINGROUP(27, blsp_spi6, blsp_uart6, blsp_i2c6, blsp1_spi,
1719 qdss_tracectl_a, dac_calib13, NA, NA, NA),
1720 PINGROUP(28, blsp_spi6, blsp_uart6, blsp_i2c6, blsp1_spi,
1721 qdss_traceclk_a, dac_calib14, NA, NA, NA),
1722 PINGROUP(29, blsp2_spi, NA, qdss_tracedata_b, dac_calib15, NA, NA, NA,
1723 NA, NA),
1724 PINGROUP(30, hdmi_rcv, blsp2_spi, dac_calib16, NA, NA, NA, NA, NA, NA),
1725 PINGROUP(31, hdmi_cec, pwr_modem, dac_calib17, NA, NA, NA, NA, NA, NA),
1726 PINGROUP(32, hdmi_ddc, pwr_nav, NA, dac_calib18, NA, NA, NA, NA, NA),
1727 PINGROUP(33, hdmi_ddc, pwr_crypto, NA, dac_calib19, NA, NA, NA, NA, NA),
1728 PINGROUP(34, hdmi_hot, NA, dac_calib20, NA, NA, NA, NA, NA, NA),
1729 PINGROUP(35, pci_e0, NA, dac_calib21, NA, NA, NA, NA, NA, NA),
1730 PINGROUP(36, pci_e0, NA, dac_calib22, NA, NA, NA, NA, NA, NA),
1731 PINGROUP(37, NA, dac_calib23, NA, NA, NA, NA, NA, NA, NA),
1732 PINGROUP(38, NA, dac_calib24, NA, NA, NA, NA, NA, NA, NA),
1733 PINGROUP(39, tsif1_sync, NA, dac_calib25, NA, NA, NA, NA, NA, NA),
1734 PINGROUP(40, sd_write, tsif1_error, NA, NA, NA, NA, NA, NA, NA),
1735 PINGROUP(41, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti,
1736 dac_calib0, NA, NA, NA),
1737 PINGROUP(42, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti,
1738 dac_calib1, NA, NA, NA),
1739 PINGROUP(43, blsp_spi2, blsp_uart2, blsp_i2c2, NA, dac_calib2, NA, NA,
1740 NA, NA),
1741 PINGROUP(44, blsp_spi2, blsp_uart2, blsp_i2c2, NA, dac_calib3, NA, NA,
1742 NA, NA),
1743 PINGROUP(45, blsp_spi3, blsp_uart3, blsp_uim3, NA, dac_calib4, NA, NA,
1744 NA, NA),
1745 PINGROUP(46, blsp_spi3, blsp_uart3, blsp_uim3, NA, dac_calib5, NA, NA,
1746 NA, NA),
1747 PINGROUP(47, blsp_spi3, blsp_uart3, blsp_i2c3, dac_calib6, NA, NA, NA,
1748 NA, NA),
1749 PINGROUP(48, blsp_spi3, blsp_uart3, blsp_i2c3, dac_calib7, NA, NA, NA,
1750 NA, NA),
1751 PINGROUP(49, uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi,
1752 dac_calib8, NA, NA, NA),
1753 PINGROUP(50, uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi,
1754 dac_calib9, NA, NA, NA),
1755 PINGROUP(51, uim3, blsp_spi9, blsp_uart9, blsp_i2c9, blsp10_spi,
1756 dac_calib10, NA, NA, NA),
1757 PINGROUP(52, uim3, blsp_spi9, blsp_uart9, blsp_i2c9,
1758 blsp10_spi, dac_calib11, NA, NA, NA),
1759 PINGROUP(53, blsp_spi7, blsp_uart7, blsp_uim7, NA, qdss_tracedata_a,
1760 dac_calib12, NA, NA, NA),
1761 PINGROUP(54, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA,
1762 qdss_tracedata_a, dac_calib13, NA, NA),
1763 PINGROUP(55, blsp_spi7, blsp_uart7, blsp_i2c7, NA, dac_calib14, NA, NA,
1764 NA, NA),
1765 PINGROUP(56, blsp_spi7, blsp_uart7, blsp_i2c7, NA, dac_calib15, NA, NA,
1766 NA, NA),
1767 PINGROUP(57, qua_mi2s, gcc_gp1_clk_a, NA, qdss_tracedata_b,
1768 dac_calib16, NA, NA, NA, NA),
1769 PINGROUP(58, qua_mi2s, uim4, blsp_spi11, blsp_uart11, blsp_uim11,
1770 gcc_gp2_clk_a, NA, qdss_tracedata_b, dac_calib17),
1771 PINGROUP(59, qua_mi2s, uim4, blsp_spi11, blsp_uart11, blsp_uim11,
1772 gcc_gp3_clk_a, NA, dac_calib18, NA),
1773 PINGROUP(60, qua_mi2s, uim4, blsp_spi11, blsp_uart11, blsp_i2c11,
1774 cri_trng0, NA, dac_calib19, NA),
1775 PINGROUP(61, qua_mi2s, uim4, blsp_spi11, blsp_uart11,
1776 blsp_i2c11, cri_trng1, NA, dac_calib20, NA),
1777 PINGROUP(62, qua_mi2s, cri_trng, NA, dac_calib21, NA, NA, NA, NA, NA),
1778 PINGROUP(63, qua_mi2s, NA, NA, qdss_stm18, qdss_tracedata_a,
1779 dac_calib22, NA, NA, NA),
1780 PINGROUP(64, pri_mi2s, NA, qdss_stm17, qdss_tracedata_a, dac_calib23,
1781 NA, NA, NA, NA),
1782 PINGROUP(65, pri_mi2s, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1783 qdss_stm16, qdss_tracedata_a, dac_calib24, NA),
1784 PINGROUP(66, pri_mi2s, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1785 qdss_stm15, qdss_tracedata_a, dac_calib25, NA),
1786 PINGROUP(67, pri_mi2s, blsp_spi4, blsp_uart4, blsp_i2c4, qdss_stm14,
1787 qdss_tracedata_a, dac_calib26, NA, NA),
1788 PINGROUP(68, pri_mi2s, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA,
1789 NA, NA),
1790 PINGROUP(69, spkr_i2s, audio_ref, NA, NA, NA, NA, NA, NA, NA),
1791 PINGROUP(70, lpass_slimbus, spkr_i2s, isense_dbg, NA, NA, NA, NA, NA,
1792 NA),
1793 PINGROUP(71, lpass_slimbus, spkr_i2s, tsense_pwm1, tsense_pwm2, NA, NA,
1794 NA, NA, NA),
1795 PINGROUP(72, lpass_slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA),
1796 PINGROUP(73, btfm_slimbus, NA, NA, NA, NA, NA, NA, NA, NA),
1797 PINGROUP(74, btfm_slimbus, ter_mi2s, qdss_stm22, qdss_tracedata_a, NA,
1798 NA, NA, NA, NA),
1799 PINGROUP(75, ter_mi2s, qdss_stm21, qdss_tracedata_a, NA, NA, NA, NA,
1800 NA, NA),
1801 PINGROUP(76, ter_mi2s, qdss_stm20, qdss_tracedata_a, NA, NA, NA, NA,
1802 NA, NA),
1803 PINGROUP(77, ter_mi2s, qdss_stm19, qdss_tracedata_a, NA, NA, NA, NA,
1804 NA, NA),
1805 PINGROUP(78, ter_mi2s, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA),
1806 PINGROUP(79, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
1807 PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
1808 PINGROUP(81, sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp2_clk_b,
1809 NA, NA, NA, NA),
1810 PINGROUP(82, sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp3_clk_b,
1811 NA, NA, NA, NA),
1812 PINGROUP(83, sec_mi2s, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA,
1813 NA, NA),
1814 PINGROUP(84, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA, NA, NA),
1815 PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, qdss_stm25,
1816 qdss_tracedata_a, NA, NA, NA),
1817 PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA, qdss_stm31,
1818 qdss_tracedata_a, NA, NA),
1819 PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA, qdss_stm30,
1820 qdss_tracedata_a, NA, NA, NA),
1821 PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, blsp10_spi, NA,
1822 qdss_stm29, NA, NA, NA),
1823 PINGROUP(89, tsif1_clk, qdss_stm28, qdss_tracedata_a, NA, NA, NA, NA,
1824 NA, NA),
1825 PINGROUP(90, tsif1_en, blsp1_spi, qdss_tracedata_a, NA, NA, NA, NA, NA,
1826 NA),
1827 PINGROUP(91, tsif1_data, sdc4_cmd, qdss_stm27, qdss_traceclk_b, NA, NA,
1828 NA, NA, NA),
1829 PINGROUP(92, tsif2_error, sdc43, vfr_1, qdss_stm26, qdss_tracedata_b,
1830 NA, NA, NA, NA),
1831 PINGROUP(93, tsif2_clk, sdc4_clk, NA, qdss_stm24, qdss_tracedata_b, NA,
1832 NA, NA, NA),
1833 PINGROUP(94, tsif2_en, sdc42, NA, qdss_stm23, qdss_tracectl_b, NA, NA,
1834 NA, NA),
1835 PINGROUP(95, tsif2_data, sdc41, NA, NA, NA, NA, NA, NA, NA),
1836 PINGROUP(96, tsif2_sync, sdc40, NA, NA, NA, NA, NA, NA, NA),
1837 PINGROUP(97, NA, NA, mdp_vsync_p_b, ldo_en, NA, NA, NA, NA, NA),
1838 PINGROUP(98, NA, NA, mdp_vsync_s_b, ldo_update, NA, NA, NA, NA, NA),
1839 PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1840 PINGROUP(100, NA, NA, blsp11_uart_tx_b, qdss_cti, NA, NA, NA, NA, NA),
1841 PINGROUP(101, NA, blsp11_uart_rx_b, qdss_cti, NA, NA, NA, NA, NA, NA),
1842 PINGROUP(102, NA, blsp11_i2c_sda_b, prng_rosc, NA, NA, NA, NA, NA, NA),
1843 PINGROUP(103, NA, blsp11_i2c_scl_b, NA, NA, NA, NA, NA, NA, NA),
1844 PINGROUP(104, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1845 PINGROUP(105, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
1846 PINGROUP(106, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
1847 PINGROUP(107, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
1848 PINGROUP(108, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
1849 PINGROUP(109, uim1, NA, NA, NA, NA, NA, NA, NA, NA),
1850 PINGROUP(110, uim1, NA, NA, NA, NA, NA, NA, NA, NA),
1851 PINGROUP(111, uim1, NA, NA, NA, NA, NA, NA, NA, NA),
1852 PINGROUP(112, uim1, NA, NA, NA, NA, NA, NA, NA, NA),
1853 PINGROUP(113, uim_batt, NA, NA, NA, NA, NA, NA, NA, NA),
1854 PINGROUP(114, NA, pci_e2, NA, NA, NA, NA, NA, NA, NA),
1855 PINGROUP(115, NA, pci_e2, NA, NA, NA, NA, NA, NA, NA),
1856 PINGROUP(116, NA, pa_indicator, NA, NA, NA, NA, NA, NA, NA),
1857 PINGROUP(117, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1858 PINGROUP(118, adsp_ext, NA, NA, NA, NA, NA, NA, NA, NA),
1859 PINGROUP(119, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1860 PINGROUP(120, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1861 PINGROUP(121, ddr_bist, NA, NA, NA, NA, NA, NA, NA, NA),
1862 PINGROUP(122, ddr_bist, NA, NA, NA, NA, NA, NA, NA, NA),
1863 PINGROUP(123, ddr_bist, qdss_tracedata_11, NA, NA, NA, NA, NA, NA, NA),
1864 PINGROUP(124, ddr_bist, qdss_tracedata_12, NA, NA, NA, NA, NA, NA, NA),
1865 PINGROUP(125, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1866 PINGROUP(126, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1867 PINGROUP(127, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1868 PINGROUP(128, NA, modem_tsync, nav_dr, nav_pps, NA, NA, NA, NA, NA),
1869 PINGROUP(129, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1870 PINGROUP(130, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA),
1871 PINGROUP(131, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA),
1872 PINGROUP(132, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1873 PINGROUP(133, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1874 PINGROUP(134, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA),
1875 PINGROUP(135, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA),
1876 PINGROUP(136, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1877 PINGROUP(137, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1878 PINGROUP(138, NA, qspi_cs, NA, NA, NA, NA, NA, NA, NA),
1879 PINGROUP(139, NA, ssbi2, NA, NA, NA, NA, NA, NA, NA),
1880 PINGROUP(140, NA, ssbi1, NA, NA, NA, NA, NA, NA, NA),
1881 PINGROUP(141, NA, qspi_cs, NA, NA, NA, NA, NA, NA, NA),
1882 PINGROUP(142, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1883 PINGROUP(143, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1884 PINGROUP(144, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA),
1885 PINGROUP(145, mss_lte, qspi_clk, NA, NA, NA, NA, NA, NA, NA),
1886 PINGROUP(146, NA, qspi0, NA, NA, NA, NA, NA, NA, NA),
1887 PINGROUP(147, NA, qspi1, NA, NA, NA, NA, NA, NA, NA),
1888 PINGROUP(148, NA, qspi2, NA, NA, NA, NA, NA, NA, NA),
1889 PINGROUP(149, NA, qspi3, NA, NA, NA, NA, NA, NA, NA),
1890 SDC_QDSD_PINGROUP(sdc1_clk, 0x12c000, 13, 6),
1891 SDC_QDSD_PINGROUP(sdc1_cmd, 0x12c000, 11, 3),
1892 SDC_QDSD_PINGROUP(sdc1_data, 0x12c000, 9, 0),
1893 SDC_QDSD_PINGROUP(sdc2_clk, 0x12d000, 14, 6),
1894 SDC_QDSD_PINGROUP(sdc2_cmd, 0x12d000, 11, 3),
1895 SDC_QDSD_PINGROUP(sdc2_data, 0x12d000, 9, 0),
1896 SDC_QDSD_PINGROUP(sdc1_rclk, 0x12c000, 15, 0),
1897};
1898
1899static const struct msm_pinctrl_soc_data msm8996_pinctrl = {
1900 .pins = msm8996_pins,
1901 .npins = ARRAY_SIZE(msm8996_pins),
1902 .functions = msm8996_functions,
1903 .nfunctions = ARRAY_SIZE(msm8996_functions),
1904 .groups = msm8996_groups,
1905 .ngroups = ARRAY_SIZE(msm8996_groups),
1906 .ngpios = 150,
1907};
1908
1909static int msm8996_pinctrl_probe(struct platform_device *pdev)
1910{
1911 return msm_pinctrl_probe(pdev, &msm8996_pinctrl);
1912}
1913
1914static const struct of_device_id msm8996_pinctrl_of_match[] = {
1915 { .compatible = "qcom,msm8996-pinctrl", },
1916 { }
1917};
1918
1919static struct platform_driver msm8996_pinctrl_driver = {
1920 .driver = {
1921 .name = "msm8996-pinctrl",
1922 .of_match_table = msm8996_pinctrl_of_match,
1923 },
1924 .probe = msm8996_pinctrl_probe,
1925 .remove = msm_pinctrl_remove,
1926};
1927
1928static int __init msm8996_pinctrl_init(void)
1929{
1930 return platform_driver_register(&msm8996_pinctrl_driver);
1931}
1932arch_initcall(msm8996_pinctrl_init);
1933
1934static void __exit msm8996_pinctrl_exit(void)
1935{
1936 platform_driver_unregister(&msm8996_pinctrl_driver);
1937}
1938module_exit(msm8996_pinctrl_exit);
1939
1940MODULE_DESCRIPTION("Qualcomm msm8996 pinctrl driver");
1941MODULE_LICENSE("GPL v2");
1942MODULE_DEVICE_TABLE(of, msm8996_pinctrl_of_match);
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-11 07:04:24 -0400