diff options
author | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2017-06-09 06:57:21 -0400 |
---|---|---|
committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2017-06-20 03:17:25 -0400 |
commit | d1ab0da84dcbac30a9039ccef72d69bf0a68bfc7 (patch) | |
tree | f158a7d3e7eaf34dbf40b557de0eb51d73799b95 | |
parent | 0d3a966d2b34f449df7859fa39e3db5b71da2bfa (diff) |
mtd: nand: ifc: Initialize SRAM for all version >= 1.0
All IFC version >= 1.0 use 28nm technology for SRAM. Here SRAM has
a requirement to initialize before any read operation performed for
avoiding ECC Error.
So update condition check to initialize SRAM for all IFC version >= 1.0.0
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-rw-r--r-- | drivers/mtd/nand/fsl_ifc_nand.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index d1c4538f870f..59408ec2c69f 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c | |||
@@ -913,7 +913,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv) | |||
913 | chip->ecc.algo = NAND_ECC_HAMMING; | 913 | chip->ecc.algo = NAND_ECC_HAMMING; |
914 | } | 914 | } |
915 | 915 | ||
916 | if (ctrl->version == FSL_IFC_VERSION_1_1_0) | 916 | if (ctrl->version >= FSL_IFC_VERSION_1_1_0) |
917 | fsl_ifc_sram_init(priv); | 917 | fsl_ifc_sram_init(priv); |
918 | 918 | ||
919 | return 0; | 919 | return 0; |