diff options
author | Jernej Skrabec <jernej.skrabec@siol.net> | 2018-06-25 08:02:43 -0400 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-06-27 13:06:56 -0400 |
commit | d18e85349f6a65baa69b8ee397efb93e4ca31909 (patch) | |
tree | 19d64f26dff3d4eb0db12e7ed9c42e7dc427b3f1 | |
parent | fb4aa0f64380d94bf10b5da63a6760962d824dbc (diff) |
clk: sunxi-ng: r40: Export video PLLs
Video PLLs need to be referenced in R40 DT as possible HDMI PHY parent.
Export them.
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
-rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun8i-r40.h | 8 | ||||
-rw-r--r-- | include/dt-bindings/clock/sun8i-r40-ccu.h | 4 |
2 files changed, 10 insertions, 2 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r40.h b/drivers/clk/sunxi-ng/ccu-sun8i-r40.h index 0db8e1e97af8..db2a1243f9ff 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-r40.h +++ b/drivers/clk/sunxi-ng/ccu-sun8i-r40.h | |||
@@ -25,7 +25,9 @@ | |||
25 | #define CLK_PLL_AUDIO_2X 4 | 25 | #define CLK_PLL_AUDIO_2X 4 |
26 | #define CLK_PLL_AUDIO_4X 5 | 26 | #define CLK_PLL_AUDIO_4X 5 |
27 | #define CLK_PLL_AUDIO_8X 6 | 27 | #define CLK_PLL_AUDIO_8X 6 |
28 | #define CLK_PLL_VIDEO0 7 | 28 | |
29 | /* PLL_VIDEO0 is exported */ | ||
30 | |||
29 | #define CLK_PLL_VIDEO0_2X 8 | 31 | #define CLK_PLL_VIDEO0_2X 8 |
30 | #define CLK_PLL_VE 9 | 32 | #define CLK_PLL_VE 9 |
31 | #define CLK_PLL_DDR0 10 | 33 | #define CLK_PLL_DDR0 10 |
@@ -34,7 +36,9 @@ | |||
34 | #define CLK_PLL_PERIPH0_2X 13 | 36 | #define CLK_PLL_PERIPH0_2X 13 |
35 | #define CLK_PLL_PERIPH1 14 | 37 | #define CLK_PLL_PERIPH1 14 |
36 | #define CLK_PLL_PERIPH1_2X 15 | 38 | #define CLK_PLL_PERIPH1_2X 15 |
37 | #define CLK_PLL_VIDEO1 16 | 39 | |
40 | /* PLL_VIDEO1 is exported */ | ||
41 | |||
38 | #define CLK_PLL_VIDEO1_2X 17 | 42 | #define CLK_PLL_VIDEO1_2X 17 |
39 | #define CLK_PLL_SATA 18 | 43 | #define CLK_PLL_SATA 18 |
40 | #define CLK_PLL_SATA_OUT 19 | 44 | #define CLK_PLL_SATA_OUT 19 |
diff --git a/include/dt-bindings/clock/sun8i-r40-ccu.h b/include/dt-bindings/clock/sun8i-r40-ccu.h index 4fa5f69fc297..f9e15a235626 100644 --- a/include/dt-bindings/clock/sun8i-r40-ccu.h +++ b/include/dt-bindings/clock/sun8i-r40-ccu.h | |||
@@ -43,6 +43,10 @@ | |||
43 | #ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_ | 43 | #ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_ |
44 | #define _DT_BINDINGS_CLK_SUN8I_R40_H_ | 44 | #define _DT_BINDINGS_CLK_SUN8I_R40_H_ |
45 | 45 | ||
46 | #define CLK_PLL_VIDEO0 7 | ||
47 | |||
48 | #define CLK_PLL_VIDEO1 16 | ||
49 | |||
46 | #define CLK_CPU 24 | 50 | #define CLK_CPU 24 |
47 | 51 | ||
48 | #define CLK_BUS_MIPI_DSI 29 | 52 | #define CLK_BUS_MIPI_DSI 29 |