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author | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2014-04-15 19:08:08 -0400 |
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committer | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2014-05-29 13:02:22 -0400 |
commit | d151f9854f21fbb6a2df73553a27f9b664ecd10c (patch) | |
tree | 6100e8a5f831971d8ac0a74146658b4955f82177 | |
parent | b3d681a4fc108f9653bbb44e4f4e72db2b8a5734 (diff) |
firewire: ohci: enable MSI for VIA VT6315 rev 1, drop cycle timer quirk
Commit af0cdf494781 "firewire: ohci: fix regression with VIA VT6315,
disable MSI" acted upon a report against VT6315 rev 0:
http://linux.derkeiler.com/Mailing-Lists/Kernel/2010-12/msg02301.html
$ lspci -nn
VIA Technologies, Inc. VT6315 Series Firewire Controller [1106:3403]
I now got a card with
$ lspci -nn
VIA Technologies, Inc. VT6315 Series Firewire Controller [1106:3403] (rev 01)
and this works fine with MSI enabled.
Second, I tested this VT6315 rev 1 without CYCLE_TIMER quirk flag using
http://me.in-berlin.de/~s5r6/linux1394/utils/test_cycle_time_v20100125.c
and found that this chip does in fact access the cycle timer atomically.
Things I can't test because I don't have the hardware:
- whether VT6315 rev 0 really needs QUIRK_CYCLE_TIMER,
- whether the VT6320 PCI device needs QUIRK_CYCLE_TIMER,
- whether the VT6325 and VT6330 PCIe devices need QUIRK_CYCLE_TIMER
and QUIRK_NO_MSI.
Hence, just add a whitelist entry specifically for VT6315 rev >= 1
without any quirk flags. Before this entry we need an extra entry to
catch VT6315 rev <= 0 due to how our ID matching logic works.
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
-rw-r--r-- | drivers/firewire/ohci.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index 8db663219560..5b0934d0d968 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c | |||
@@ -282,6 +282,7 @@ static char ohci_driver_name[] = KBUILD_MODNAME; | |||
282 | #define PCI_DEVICE_ID_TI_TSB82AA2 0x8025 | 282 | #define PCI_DEVICE_ID_TI_TSB82AA2 0x8025 |
283 | #define PCI_DEVICE_ID_VIA_VT630X 0x3044 | 283 | #define PCI_DEVICE_ID_VIA_VT630X 0x3044 |
284 | #define PCI_REV_ID_VIA_VT6306 0x46 | 284 | #define PCI_REV_ID_VIA_VT6306 0x46 |
285 | #define PCI_DEVICE_ID_VIA_VT6315 0x3403 | ||
285 | 286 | ||
286 | #define QUIRK_CYCLE_TIMER 0x1 | 287 | #define QUIRK_CYCLE_TIMER 0x1 |
287 | #define QUIRK_RESET_PACKET 0x2 | 288 | #define QUIRK_RESET_PACKET 0x2 |
@@ -334,6 +335,12 @@ static const struct { | |||
334 | {PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT630X, PCI_REV_ID_VIA_VT6306, | 335 | {PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT630X, PCI_REV_ID_VIA_VT6306, |
335 | QUIRK_CYCLE_TIMER | QUIRK_IR_WAKE}, | 336 | QUIRK_CYCLE_TIMER | QUIRK_IR_WAKE}, |
336 | 337 | ||
338 | {PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT6315, 0, | ||
339 | QUIRK_CYCLE_TIMER | QUIRK_NO_MSI}, | ||
340 | |||
341 | {PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT6315, PCI_ANY_ID, | ||
342 | 0}, | ||
343 | |||
337 | {PCI_VENDOR_ID_VIA, PCI_ANY_ID, PCI_ANY_ID, | 344 | {PCI_VENDOR_ID_VIA, PCI_ANY_ID, PCI_ANY_ID, |
338 | QUIRK_CYCLE_TIMER | QUIRK_NO_MSI}, | 345 | QUIRK_CYCLE_TIMER | QUIRK_NO_MSI}, |
339 | }; | 346 | }; |