aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRobert Jarzmik <robert.jarzmik@free.fr>2015-11-21 13:04:52 -0500
committerLinus Walleij <linus.walleij@linaro.org>2015-12-10 10:13:09 -0500
commitd0e3096859eee425397c7a93b93ddeaa140b997d (patch)
treeaa8cf61db6cef1b42532cc869e2b4f01d3822601
parentaedf08b664b71ecf0b35891eb6c83e26b888342a (diff)
pinctrl: pxa: add pxa27x architecture
Add the pxa27x architecture, which is a pxa2xx with 128 pins. The registers spacing, and pins logic is common to pxa2xx, only the pins and their alternate function are specific to pxa27x. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat
-rw-r--r--drivers/pinctrl/pxa/Kconfig8
-rw-r--r--drivers/pinctrl/pxa/Makefile2
-rw-r--r--drivers/pinctrl/pxa/pinctrl-pxa27x.c566
3 files changed, 576 insertions, 0 deletions
diff --git a/drivers/pinctrl/pxa/Kconfig b/drivers/pinctrl/pxa/Kconfig
index 13e24d7c45c7..990667ff772c 100644
--- a/drivers/pinctrl/pxa/Kconfig
+++ b/drivers/pinctrl/pxa/Kconfig
@@ -6,4 +6,12 @@ config PINCTRL_PXA
6 select PINCONF 6 select PINCONF
7 select GENERIC_PINCONF 7 select GENERIC_PINCONF
8 8
9config PINCTRL_PXA27X
10 tristate "Marvell PXA27x pin controller driver"
11 select PINCTRL_PXA
12 default y if PXA27x
13 help
14 This is the pinctrl, pinmux, pinconf driver for the Marvell
15 PXA2xx block found in the pxa25x and pxa27x platforms.
16
9endif 17endif
diff --git a/drivers/pinctrl/pxa/Makefile b/drivers/pinctrl/pxa/Makefile
new file mode 100644
index 000000000000..f1d56af2bfc0
--- /dev/null
+++ b/drivers/pinctrl/pxa/Makefile
@@ -0,0 +1,2 @@
1# Marvell PXA pin control drivers
2obj-$(CONFIG_PINCTRL_PXA27X) += pinctrl-pxa2xx.o pinctrl-pxa27x.o
diff --git a/drivers/pinctrl/pxa/pinctrl-pxa27x.c b/drivers/pinctrl/pxa/pinctrl-pxa27x.c
new file mode 100644
index 000000000000..2e2c3709ef05
--- /dev/null
+++ b/drivers/pinctrl/pxa/pinctrl-pxa27x.c
@@ -0,0 +1,566 @@
1/*
2 * Marvell PXA27x family pin control
3 *
4 * Copyright (C) 2015 Robert Jarzmik
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 */
11#include <linux/module.h>
12#include <linux/platform_device.h>
13#include <linux/of.h>
14#include <linux/of_device.h>
15#include <linux/pinctrl/pinctrl.h>
16
17#include "pinctrl-pxa2xx.h"
18
19static const struct pxa_desc_pin pxa27x_pins[] = {
20 PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(0)),
21 PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(1)),
22 PXA_GPIO_PIN(PXA_PINCTRL_PIN(9),
23 PXA_FUNCTION(0, 3, "FFCTS"),
24 PXA_FUNCTION(1, 1, "HZ_CLK"),
25 PXA_FUNCTION(1, 3, "CHOUT<0>")),
26 PXA_GPIO_PIN(PXA_PINCTRL_PIN(10),
27 PXA_FUNCTION(0, 1, "FFDCD"),
28 PXA_FUNCTION(0, 3, "USB_P3_5"),
29 PXA_FUNCTION(1, 1, "HZ_CLK"),
30 PXA_FUNCTION(1, 3, "CHOUT<1>")),
31 PXA_GPIO_PIN(PXA_PINCTRL_PIN(11),
32 PXA_FUNCTION(0, 1, "EXT_SYNC<0>"),
33 PXA_FUNCTION(0, 2, "SSPRXD2"),
34 PXA_FUNCTION(0, 3, "USB_P3_1"),
35 PXA_FUNCTION(1, 1, "CHOUT<0>"),
36 PXA_FUNCTION(1, 1, "PWM_OUT<2>"),
37 PXA_FUNCTION(1, 3, "48_MHz")),
38 PXA_GPIO_PIN(PXA_PINCTRL_PIN(12),
39 PXA_FUNCTION(0, 1, "EXT_SYNC<1>"),
40 PXA_FUNCTION(0, 2, "CIF_DD<7>"),
41 PXA_FUNCTION(1, 1, "CHOUT<1>"),
42 PXA_FUNCTION(1, 1, "PWM_OUT<3>"),
43 PXA_FUNCTION(1, 3, "48_MHz")),
44 PXA_GPIO_PIN(PXA_PINCTRL_PIN(13),
45 PXA_FUNCTION(0, 1, "CLK_EXT"),
46 PXA_FUNCTION(0, 2, "KP_DKIN<7>"),
47 PXA_FUNCTION(0, 3, "KP_MKIN<7>"),
48 PXA_FUNCTION(1, 1, "SSPTXD2")),
49 PXA_GPIO_PIN(PXA_PINCTRL_PIN(14),
50 PXA_FUNCTION(0, 1, "L_VSYNC"),
51 PXA_FUNCTION(0, 2, "SSPSFRM2"),
52 PXA_FUNCTION(1, 1, "SSPSFRM2"),
53 PXA_FUNCTION(1, 3, "UCLK")),
54 PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(15)),
55 PXA_GPIO_PIN(PXA_PINCTRL_PIN(16),
56 PXA_FUNCTION(0, 1, "KP_MKIN<5>"),
57 PXA_FUNCTION(1, 2, "PWM_OUT<0>"),
58 PXA_FUNCTION(1, 3, "FFTXD")),
59 PXA_GPIO_PIN(PXA_PINCTRL_PIN(17),
60 PXA_FUNCTION(0, 1, "KP_MKIN<6>"),
61 PXA_FUNCTION(0, 2, "CIF_DD<6>"),
62 PXA_FUNCTION(1, 2, "PWM_OUT<1>")),
63 PXA_GPIO_PIN(PXA_PINCTRL_PIN(18),
64 PXA_FUNCTION(0, 1, "RDY")),
65 PXA_GPIO_PIN(PXA_PINCTRL_PIN(19),
66 PXA_FUNCTION(0, 1, "SSPSCLK2"),
67 PXA_FUNCTION(0, 3, "FFRXD"),
68 PXA_FUNCTION(1, 1, "SSPSCLK2"),
69 PXA_FUNCTION(1, 2, "L_CS"),
70 PXA_FUNCTION(1, 3, "nURST")),
71 PXA_GPIO_PIN(PXA_PINCTRL_PIN(20),
72 PXA_FUNCTION(0, 1, "DREQ<0>"),
73 PXA_FUNCTION(0, 2, "MBREQ"),
74 PXA_FUNCTION(1, 1, "nSDCS<2>")),
75 PXA_GPIO_PIN(PXA_PINCTRL_PIN(21),
76 PXA_FUNCTION(1, 1, "nSDCS<3>"),
77 PXA_FUNCTION(1, 2, "DVAL<0>"),
78 PXA_FUNCTION(1, 3, "MBGNT")),
79 PXA_GPIO_PIN(PXA_PINCTRL_PIN(22),
80 PXA_FUNCTION(0, 1, "SSPEXTCLK2"),
81 PXA_FUNCTION(0, 2, "SSPSCLKEN2"),
82 PXA_FUNCTION(0, 3, "SSPSCLK2"),
83 PXA_FUNCTION(1, 1, "KP_MKOUT<7>"),
84 PXA_FUNCTION(1, 2, "SSPSYSCLK2"),
85 PXA_FUNCTION(1, 3, "SSPSCLK2")),
86 PXA_GPIO_PIN(PXA_PINCTRL_PIN(23),
87 PXA_FUNCTION(0, 2, "SSPSCLK"),
88 PXA_FUNCTION(1, 1, "CIF_MCLK"),
89 PXA_FUNCTION(1, 1, "SSPSCLK")),
90 PXA_GPIO_PIN(PXA_PINCTRL_PIN(24),
91 PXA_FUNCTION(0, 1, "CIF_FV"),
92 PXA_FUNCTION(0, 2, "SSPSFRM"),
93 PXA_FUNCTION(1, 1, "CIF_FV"),
94 PXA_FUNCTION(1, 2, "SSPSFRM")),
95 PXA_GPIO_PIN(PXA_PINCTRL_PIN(25),
96 PXA_FUNCTION(0, 1, "CIF_LV"),
97 PXA_FUNCTION(1, 1, "CIF_LV"),
98 PXA_FUNCTION(1, 2, "SSPTXD")),
99 PXA_GPIO_PIN(PXA_PINCTRL_PIN(26),
100 PXA_FUNCTION(0, 1, "SSPRXD"),
101 PXA_FUNCTION(0, 2, "CIF_PCLK"),
102 PXA_FUNCTION(0, 3, "FFCTS")),
103 PXA_GPIO_PIN(PXA_PINCTRL_PIN(27),
104 PXA_FUNCTION(0, 1, "SSPEXTCLK"),
105 PXA_FUNCTION(0, 2, "SSPSCLKEN"),
106 PXA_FUNCTION(0, 3, "CIF_DD<0>"),
107 PXA_FUNCTION(1, 1, "SSPSYSCLK"),
108 PXA_FUNCTION(1, 3, "FFRTS")),
109 PXA_GPIO_PIN(PXA_PINCTRL_PIN(28),
110 PXA_FUNCTION(0, 1, "AC97_BITCLK"),
111 PXA_FUNCTION(0, 2, "I2S_BITCLK"),
112 PXA_FUNCTION(0, 3, "SSPSFRM"),
113 PXA_FUNCTION(1, 1, "I2S_BITCLK"),
114 PXA_FUNCTION(1, 3, "SSPSFRM")),
115 PXA_GPIO_PIN(PXA_PINCTRL_PIN(29),
116 PXA_FUNCTION(0, 1, "AC97_SDATA_IN_0"),
117 PXA_FUNCTION(0, 2, "I2S_SDATA_IN"),
118 PXA_FUNCTION(0, 3, "SSPSCLK"),
119 PXA_FUNCTION(1, 1, "SSPRXD2"),
120 PXA_FUNCTION(1, 3, "SSPSCLK")),
121 PXA_GPIO_PIN(PXA_PINCTRL_PIN(30),
122 PXA_FUNCTION(1, 1, "I2S_SDATA_OUT"),
123 PXA_FUNCTION(1, 2, "AC97_SDATA_OUT"),
124 PXA_FUNCTION(1, 3, "USB_P3_2")),
125 PXA_GPIO_PIN(PXA_PINCTRL_PIN(31),
126 PXA_FUNCTION(1, 1, "I2S_SYNC"),
127 PXA_FUNCTION(1, 2, "AC97_SYNC"),
128 PXA_FUNCTION(1, 3, "USB_P3_6")),
129 PXA_GPIO_PIN(PXA_PINCTRL_PIN(32),
130 PXA_FUNCTION(1, 1, "MSSCLK"),
131 PXA_FUNCTION(1, 2, "MMCLK")),
132 PXA_GPIO_PIN(PXA_PINCTRL_PIN(33),
133 PXA_FUNCTION(0, 1, "FFRXD"),
134 PXA_FUNCTION(0, 2, "FFDSR"),
135 PXA_FUNCTION(1, 1, "DVAL<1>"),
136 PXA_FUNCTION(1, 2, "nCS<5>"),
137 PXA_FUNCTION(1, 3, "MBGNT")),
138 PXA_GPIO_PIN(PXA_PINCTRL_PIN(34),
139 PXA_FUNCTION(0, 1, "FFRXD"),
140 PXA_FUNCTION(0, 2, "KP_MKIN<3>"),
141 PXA_FUNCTION(0, 3, "SSPSCLK3"),
142 PXA_FUNCTION(1, 1, "USB_P2_2"),
143 PXA_FUNCTION(1, 3, "SSPSCLK3")),
144 PXA_GPIO_PIN(PXA_PINCTRL_PIN(35),
145 PXA_FUNCTION(0, 1, "FFCTS"),
146 PXA_FUNCTION(0, 2, "USB_P2_1"),
147 PXA_FUNCTION(0, 3, "SSPSFRM3"),
148 PXA_FUNCTION(1, 2, "KP_MKOUT<6>"),
149 PXA_FUNCTION(1, 3, "SSPTXD3")),
150 PXA_GPIO_PIN(PXA_PINCTRL_PIN(36),
151 PXA_FUNCTION(0, 1, "FFDCD"),
152 PXA_FUNCTION(0, 2, "SSPSCLK2"),
153 PXA_FUNCTION(0, 3, "KP_MKIN<7>"),
154 PXA_FUNCTION(1, 1, "USB_P2_4"),
155 PXA_FUNCTION(1, 2, "SSPSCLK2")),
156 PXA_GPIO_PIN(PXA_PINCTRL_PIN(37),
157 PXA_FUNCTION(0, 1, "FFDSR"),
158 PXA_FUNCTION(0, 2, "SSPSFRM2"),
159 PXA_FUNCTION(0, 3, "KP_MKIN<3>"),
160 PXA_FUNCTION(1, 1, "USB_P2_8"),
161 PXA_FUNCTION(1, 2, "SSPSFRM2"),
162 PXA_FUNCTION(1, 3, "FFTXD")),
163 PXA_GPIO_PIN(PXA_PINCTRL_PIN(38),
164 PXA_FUNCTION(0, 1, "FFRI"),
165 PXA_FUNCTION(0, 2, "KP_MKIN<4>"),
166 PXA_FUNCTION(0, 3, "USB_P2_3"),
167 PXA_FUNCTION(1, 1, "SSPTXD3"),
168 PXA_FUNCTION(1, 2, "SSPTXD2"),
169 PXA_FUNCTION(1, 3, "PWM_OUT<0>")),
170 PXA_GPIO_PIN(PXA_PINCTRL_PIN(39),
171 PXA_FUNCTION(0, 1, "KP_MKIN<4>"),
172 PXA_FUNCTION(0, 3, "SSPSFRM3"),
173 PXA_FUNCTION(1, 1, "USB_P2_6"),
174 PXA_FUNCTION(1, 2, "FFTXD"),
175 PXA_FUNCTION(1, 3, "SSPSFRM3")),
176 PXA_GPIO_PIN(PXA_PINCTRL_PIN(40),
177 PXA_FUNCTION(0, 1, "SSPRXD2"),
178 PXA_FUNCTION(0, 3, "USB_P2_5"),
179 PXA_FUNCTION(1, 1, "KP_MKOUT<6>"),
180 PXA_FUNCTION(1, 2, "FFDTR"),
181 PXA_FUNCTION(1, 3, "SSPSCLK3")),
182 PXA_GPIO_PIN(PXA_PINCTRL_PIN(41),
183 PXA_FUNCTION(0, 1, "FFRXD"),
184 PXA_FUNCTION(0, 2, "USB_P2_7"),
185 PXA_FUNCTION(0, 3, "SSPRXD3"),
186 PXA_FUNCTION(1, 1, "KP_MKOUT<7>"),
187 PXA_FUNCTION(1, 2, "FFRTS")),
188 PXA_GPIO_PIN(PXA_PINCTRL_PIN(42),
189 PXA_FUNCTION(0, 1, "BTRXD"),
190 PXA_FUNCTION(0, 2, "ICP_RXD"),
191 PXA_FUNCTION(1, 3, "CIF_MCLK")),
192 PXA_GPIO_PIN(PXA_PINCTRL_PIN(43),
193 PXA_FUNCTION(0, 3, "CIF_FV"),
194 PXA_FUNCTION(1, 1, "ICP_TXD"),
195 PXA_FUNCTION(1, 2, "BTTXD"),
196 PXA_FUNCTION(1, 3, "CIF_FV")),
197 PXA_GPIO_PIN(PXA_PINCTRL_PIN(44),
198 PXA_FUNCTION(0, 1, "BTCTS"),
199 PXA_FUNCTION(0, 3, "CIF_LV"),
200 PXA_FUNCTION(1, 3, "CIF_LV")),
201 PXA_GPIO_PIN(PXA_PINCTRL_PIN(45),
202 PXA_FUNCTION(0, 3, "CIF_PCLK"),
203 PXA_FUNCTION(1, 1, "AC97_SYSCLK"),
204 PXA_FUNCTION(1, 2, "BTRTS"),
205 PXA_FUNCTION(1, 3, "SSPSYSCLK3")),
206 PXA_GPIO_PIN(PXA_PINCTRL_PIN(46),
207 PXA_FUNCTION(0, 1, "ICP_RXD"),
208 PXA_FUNCTION(0, 2, "STD_RXD"),
209 PXA_FUNCTION(1, 2, "PWM_OUT<2>")),
210 PXA_GPIO_PIN(PXA_PINCTRL_PIN(47),
211 PXA_FUNCTION(0, 1, "CIF_DD<0>"),
212 PXA_FUNCTION(1, 1, "STD_TXD"),
213 PXA_FUNCTION(1, 2, "ICP_TXD"),
214 PXA_FUNCTION(1, 3, "PWM_OUT<3>")),
215 PXA_GPIO_PIN(PXA_PINCTRL_PIN(48),
216 PXA_FUNCTION(0, 1, "CIF_DD<5>"),
217 PXA_FUNCTION(1, 1, "BB_OB_DAT<1>"),
218 PXA_FUNCTION(1, 2, "nPOE")),
219 PXA_GPIO_PIN(PXA_PINCTRL_PIN(49),
220 PXA_FUNCTION(1, 2, "nPWE")),
221 PXA_GPIO_PIN(PXA_PINCTRL_PIN(50),
222 PXA_FUNCTION(0, 1, "CIF_DD<3>"),
223 PXA_FUNCTION(0, 3, "SSPSCLK2"),
224 PXA_FUNCTION(1, 1, "BB_OB_DAT<2>"),
225 PXA_FUNCTION(1, 2, "nPIOR"),
226 PXA_FUNCTION(1, 3, "SSPSCLK2")),
227 PXA_GPIO_PIN(PXA_PINCTRL_PIN(51),
228 PXA_FUNCTION(0, 1, "CIF_DD<2>"),
229 PXA_FUNCTION(1, 1, "BB_OB_DAT<3>"),
230 PXA_FUNCTION(1, 2, "nPIOW")),
231 PXA_GPIO_PIN(PXA_PINCTRL_PIN(52),
232 PXA_FUNCTION(0, 1, "CIF_DD<4>"),
233 PXA_FUNCTION(0, 2, "SSPSCLK3"),
234 PXA_FUNCTION(1, 1, "BB_OB_CLK"),
235 PXA_FUNCTION(1, 2, "SSPSCLK3")),
236 PXA_GPIO_PIN(PXA_PINCTRL_PIN(53),
237 PXA_FUNCTION(0, 1, "FFRXD"),
238 PXA_FUNCTION(0, 2, "USB_P2_3"),
239 PXA_FUNCTION(1, 1, "BB_OB_STB"),
240 PXA_FUNCTION(1, 2, "CIF_MCLK"),
241 PXA_FUNCTION(1, 3, "SSPSYSCLK")),
242 PXA_GPIO_PIN(PXA_PINCTRL_PIN(54),
243 PXA_FUNCTION(0, 2, "BB_OB_WAIT"),
244 PXA_FUNCTION(0, 3, "CIF_PCLK"),
245 PXA_FUNCTION(1, 2, "nPCE<2>")),
246 PXA_GPIO_PIN(PXA_PINCTRL_PIN(55),
247 PXA_FUNCTION(0, 1, "CIF_DD<1>"),
248 PXA_FUNCTION(0, 2, "BB_IB_DAT<1>"),
249 PXA_FUNCTION(1, 2, "nPREG")),
250 PXA_GPIO_PIN(PXA_PINCTRL_PIN(56),
251 PXA_FUNCTION(0, 1, "nPWAIT"),
252 PXA_FUNCTION(0, 2, "BB_IB_DAT<2>"),
253 PXA_FUNCTION(1, 1, "USB_P3_4")),
254 PXA_GPIO_PIN(PXA_PINCTRL_PIN(57),
255 PXA_FUNCTION(0, 1, "nIOS16"),
256 PXA_FUNCTION(0, 2, "BB_IB_DAT<3>"),
257 PXA_FUNCTION(1, 3, "SSPTXD")),
258 PXA_GPIO_PIN(PXA_PINCTRL_PIN(58),
259 PXA_FUNCTION(0, 2, "LDD<0>"),
260 PXA_FUNCTION(1, 2, "LDD<0>")),
261 PXA_GPIO_PIN(PXA_PINCTRL_PIN(59),
262 PXA_FUNCTION(0, 2, "LDD<1>"),
263 PXA_FUNCTION(1, 2, "LDD<1>")),
264 PXA_GPIO_PIN(PXA_PINCTRL_PIN(60),
265 PXA_FUNCTION(0, 2, "LDD<2>"),
266 PXA_FUNCTION(1, 2, "LDD<2>")),
267 PXA_GPIO_PIN(PXA_PINCTRL_PIN(61),
268 PXA_FUNCTION(0, 2, "LDD<3>"),
269 PXA_FUNCTION(1, 2, "LDD<3>")),
270 PXA_GPIO_PIN(PXA_PINCTRL_PIN(62),
271 PXA_FUNCTION(0, 2, "LDD<4>"),
272 PXA_FUNCTION(1, 2, "LDD<4>")),
273 PXA_GPIO_PIN(PXA_PINCTRL_PIN(63),
274 PXA_FUNCTION(0, 2, "LDD<5>"),
275 PXA_FUNCTION(1, 2, "LDD<5>")),
276 PXA_GPIO_PIN(PXA_PINCTRL_PIN(64),
277 PXA_FUNCTION(0, 2, "LDD<6>"),
278 PXA_FUNCTION(1, 2, "LDD<6>")),
279 PXA_GPIO_PIN(PXA_PINCTRL_PIN(65),
280 PXA_FUNCTION(0, 2, "LDD<7>"),
281 PXA_FUNCTION(1, 2, "LDD<7>")),
282 PXA_GPIO_PIN(PXA_PINCTRL_PIN(66),
283 PXA_FUNCTION(0, 2, "LDD<8>"),
284 PXA_FUNCTION(1, 2, "LDD<8>")),
285 PXA_GPIO_PIN(PXA_PINCTRL_PIN(67),
286 PXA_FUNCTION(0, 2, "LDD<9>"),
287 PXA_FUNCTION(1, 2, "LDD<9>")),
288 PXA_GPIO_PIN(PXA_PINCTRL_PIN(68),
289 PXA_FUNCTION(0, 2, "LDD<10>"),
290 PXA_FUNCTION(1, 2, "LDD<10>")),
291 PXA_GPIO_PIN(PXA_PINCTRL_PIN(69),
292 PXA_FUNCTION(0, 2, "LDD<11>"),
293 PXA_FUNCTION(1, 2, "LDD<11>")),
294 PXA_GPIO_PIN(PXA_PINCTRL_PIN(70),
295 PXA_FUNCTION(0, 2, "LDD<12>"),
296 PXA_FUNCTION(1, 2, "LDD<12>")),
297 PXA_GPIO_PIN(PXA_PINCTRL_PIN(71),
298 PXA_FUNCTION(0, 2, "LDD<13>"),
299 PXA_FUNCTION(1, 2, "LDD<13>")),
300 PXA_GPIO_PIN(PXA_PINCTRL_PIN(72),
301 PXA_FUNCTION(0, 2, "LDD<14>"),
302 PXA_FUNCTION(1, 2, "LDD<14>")),
303 PXA_GPIO_PIN(PXA_PINCTRL_PIN(73),
304 PXA_FUNCTION(0, 2, "LDD<15>"),
305 PXA_FUNCTION(1, 2, "LDD<15>")),
306 PXA_GPIO_PIN(PXA_PINCTRL_PIN(74),
307 PXA_FUNCTION(1, 2, "L_FCLK_RD")),
308 PXA_GPIO_PIN(PXA_PINCTRL_PIN(75),
309 PXA_FUNCTION(1, 2, "L_LCLK_A0")),
310 PXA_GPIO_PIN(PXA_PINCTRL_PIN(76),
311 PXA_FUNCTION(1, 2, "L_PCLK_WR")),
312 PXA_GPIO_PIN(PXA_PINCTRL_PIN(77),
313 PXA_FUNCTION(1, 2, "L_BIAS")),
314 PXA_GPIO_PIN(PXA_PINCTRL_PIN(78),
315 PXA_FUNCTION(1, 1, "nPCE<2>"),
316 PXA_FUNCTION(1, 2, "nCS<2>")),
317 PXA_GPIO_PIN(PXA_PINCTRL_PIN(79),
318 PXA_FUNCTION(1, 1, "PSKTSEL"),
319 PXA_FUNCTION(1, 2, "nCS<3>"),
320 PXA_FUNCTION(1, 3, "PWM_OUT<2>")),
321 PXA_GPIO_PIN(PXA_PINCTRL_PIN(80),
322 PXA_FUNCTION(0, 1, "DREQ<1>"),
323 PXA_FUNCTION(0, 2, "MBREQ"),
324 PXA_FUNCTION(1, 2, "nCS<4>"),
325 PXA_FUNCTION(1, 3, "PWM_OUT<3>")),
326 PXA_GPIO_PIN(PXA_PINCTRL_PIN(81),
327 PXA_FUNCTION(0, 2, "CIF_DD<0>"),
328 PXA_FUNCTION(1, 1, "SSPTXD3"),
329 PXA_FUNCTION(1, 2, "BB_OB_DAT<0>")),
330 PXA_GPIO_PIN(PXA_PINCTRL_PIN(82),
331 PXA_FUNCTION(0, 1, "SSPRXD3"),
332 PXA_FUNCTION(0, 2, "BB_IB_DAT<0>"),
333 PXA_FUNCTION(0, 3, "CIF_DD<5>"),
334 PXA_FUNCTION(1, 3, "FFDTR")),
335 PXA_GPIO_PIN(PXA_PINCTRL_PIN(83),
336 PXA_FUNCTION(0, 1, "SSPSFRM3"),
337 PXA_FUNCTION(0, 2, "BB_IB_CLK"),
338 PXA_FUNCTION(0, 3, "CIF_DD<5>"),
339 PXA_FUNCTION(1, 1, "SSPSFRM3"),
340 PXA_FUNCTION(1, 2, "FFTXD"),
341 PXA_FUNCTION(1, 3, "FFRTS")),
342 PXA_GPIO_PIN(PXA_PINCTRL_PIN(84),
343 PXA_FUNCTION(0, 1, "SSPCLK3"),
344 PXA_FUNCTION(0, 2, "BB_IB_STB"),
345 PXA_FUNCTION(0, 3, "CIF_FV"),
346 PXA_FUNCTION(1, 1, "SSPCLK3"),
347 PXA_FUNCTION(1, 3, "CIF_FV")),
348 PXA_GPIO_PIN(PXA_PINCTRL_PIN(85),
349 PXA_FUNCTION(0, 1, "FFRXD"),
350 PXA_FUNCTION(0, 2, "DREQ<2>"),
351 PXA_FUNCTION(0, 3, "CIF_LV"),
352 PXA_FUNCTION(1, 1, "nPCE<1>"),
353 PXA_FUNCTION(1, 2, "BB_IB_WAIT"),
354 PXA_FUNCTION(1, 3, "CIF_LV")),
355 PXA_GPIO_PIN(PXA_PINCTRL_PIN(86),
356 PXA_FUNCTION(0, 1, "SSPRXD2"),
357 PXA_FUNCTION(0, 2, "LDD<16>"),
358 PXA_FUNCTION(0, 3, "USB_P3_5"),
359 PXA_FUNCTION(1, 1, "nPCE<1>"),
360 PXA_FUNCTION(1, 2, "LDD<16>")),
361 PXA_GPIO_PIN(PXA_PINCTRL_PIN(87),
362 PXA_FUNCTION(0, 1, "nPCE<2>"),
363 PXA_FUNCTION(0, 2, "LDD<17>"),
364 PXA_FUNCTION(0, 3, "USB_P3_1"),
365 PXA_FUNCTION(1, 1, "SSPTXD2"),
366 PXA_FUNCTION(1, 2, "LDD<17>"),
367 PXA_FUNCTION(1, 3, "SSPSFRM2")),
368 PXA_GPIO_PIN(PXA_PINCTRL_PIN(88),
369 PXA_FUNCTION(0, 1, "USBHPWR<1>"),
370 PXA_FUNCTION(0, 2, "SSPRXD2"),
371 PXA_FUNCTION(0, 3, "SSPSFRM2"),
372 PXA_FUNCTION(1, 2, "SSPTXD2"),
373 PXA_FUNCTION(1, 3, "SSPSFRM2")),
374 PXA_GPIO_PIN(PXA_PINCTRL_PIN(89),
375 PXA_FUNCTION(0, 1, "SSPRXD3"),
376 PXA_FUNCTION(0, 3, "FFRI"),
377 PXA_FUNCTION(1, 1, "AC97_SYSCLK"),
378 PXA_FUNCTION(1, 2, "USBHPEN<1>"),
379 PXA_FUNCTION(1, 3, "SSPTXD2")),
380 PXA_GPIO_PIN(PXA_PINCTRL_PIN(90),
381 PXA_FUNCTION(0, 1, "KP_MKIN<5>"),
382 PXA_FUNCTION(0, 3, "USB_P3_5"),
383 PXA_FUNCTION(1, 1, "CIF_DD<4>"),
384 PXA_FUNCTION(1, 2, "nURST")),
385 PXA_GPIO_PIN(PXA_PINCTRL_PIN(91),
386 PXA_FUNCTION(0, 1, "KP_MKIN<6>"),
387 PXA_FUNCTION(0, 3, "USB_P3_1"),
388 PXA_FUNCTION(1, 1, "CIF_DD<5>"),
389 PXA_FUNCTION(1, 2, "UCLK")),
390 PXA_GPIO_PIN(PXA_PINCTRL_PIN(92),
391 PXA_FUNCTION(0, 1, "MMDAT<0>"),
392 PXA_FUNCTION(1, 1, "MMDAT<0>"),
393 PXA_FUNCTION(1, 2, "MSBS")),
394 PXA_GPIO_PIN(PXA_PINCTRL_PIN(93),
395 PXA_FUNCTION(0, 1, "KP_DKIN<0>"),
396 PXA_FUNCTION(0, 2, "CIF_DD<6>"),
397 PXA_FUNCTION(1, 1, "AC97_SDATA_OUT")),
398 PXA_GPIO_PIN(PXA_PINCTRL_PIN(94),
399 PXA_FUNCTION(0, 1, "KP_DKIN<1>"),
400 PXA_FUNCTION(0, 2, "CIF_DD<5>"),
401 PXA_FUNCTION(1, 1, "AC97_SYNC")),
402 PXA_GPIO_PIN(PXA_PINCTRL_PIN(95),
403 PXA_FUNCTION(0, 1, "KP_DKIN<2>"),
404 PXA_FUNCTION(0, 2, "CIF_DD<4>"),
405 PXA_FUNCTION(0, 3, "KP_MKIN<6>"),
406 PXA_FUNCTION(1, 1, "AC97_RESET_n")),
407 PXA_GPIO_PIN(PXA_PINCTRL_PIN(96),
408 PXA_FUNCTION(0, 1, "KP_DKIN<3>"),
409 PXA_FUNCTION(0, 2, "MBREQ"),
410 PXA_FUNCTION(0, 3, "FFRXD"),
411 PXA_FUNCTION(1, 2, "DVAL<1>"),
412 PXA_FUNCTION(1, 3, "KP_MKOUT<6>")),
413 PXA_GPIO_PIN(PXA_PINCTRL_PIN(97),
414 PXA_FUNCTION(0, 1, "KP_DKIN<4>"),
415 PXA_FUNCTION(0, 2, "DREQ<1>"),
416 PXA_FUNCTION(0, 3, "KP_MKIN<3>"),
417 PXA_FUNCTION(1, 2, "MBGNT")),
418 PXA_GPIO_PIN(PXA_PINCTRL_PIN(98),
419 PXA_FUNCTION(0, 1, "KP_DKIN<5>"),
420 PXA_FUNCTION(0, 2, "CIF_DD<0>"),
421 PXA_FUNCTION(0, 3, "KP_MKIN<4>"),
422 PXA_FUNCTION(1, 1, "AC97_SYSCLK"),
423 PXA_FUNCTION(1, 3, "FFRTS")),
424 PXA_GPIO_PIN(PXA_PINCTRL_PIN(99),
425 PXA_FUNCTION(0, 1, "KP_DKIN<6>"),
426 PXA_FUNCTION(0, 2, "AC97_SDATA_IN_1"),
427 PXA_FUNCTION(0, 3, "KP_MKIN<5>"),
428 PXA_FUNCTION(1, 3, "FFTXD")),
429 PXA_GPIO_PIN(PXA_PINCTRL_PIN(100),
430 PXA_FUNCTION(0, 1, "KP_MKIN<0>"),
431 PXA_FUNCTION(0, 2, "DREQ<2>"),
432 PXA_FUNCTION(0, 3, "FFCTS")),
433 PXA_GPIO_PIN(PXA_PINCTRL_PIN(101),
434 PXA_FUNCTION(0, 1, "KP_MKIN<1>")),
435 PXA_GPIO_PIN(PXA_PINCTRL_PIN(102),
436 PXA_FUNCTION(0, 1, "KP_MKIN<2>"),
437 PXA_FUNCTION(0, 3, "FFRXD"),
438 PXA_FUNCTION(1, 1, "nPCE<1>")),
439 PXA_GPIO_PIN(PXA_PINCTRL_PIN(103),
440 PXA_FUNCTION(0, 1, "CIF_DD<3>"),
441 PXA_FUNCTION(1, 2, "KP_MKOUT<0>")),
442 PXA_GPIO_PIN(PXA_PINCTRL_PIN(104),
443 PXA_FUNCTION(0, 1, "CIF_DD<2>"),
444 PXA_FUNCTION(1, 1, "PSKTSEL"),
445 PXA_FUNCTION(1, 2, "KP_MKOUT<1>")),
446 PXA_GPIO_PIN(PXA_PINCTRL_PIN(105),
447 PXA_FUNCTION(0, 1, "CIF_DD<1>"),
448 PXA_FUNCTION(1, 1, "nPCE<2>"),
449 PXA_FUNCTION(1, 2, "KP_MKOUT<2>")),
450 PXA_GPIO_PIN(PXA_PINCTRL_PIN(106),
451 PXA_FUNCTION(0, 1, "CIF_DD<9>"),
452 PXA_FUNCTION(1, 2, "KP_MKOUT<3>")),
453 PXA_GPIO_PIN(PXA_PINCTRL_PIN(107),
454 PXA_FUNCTION(0, 1, "CIF_DD<8>"),
455 PXA_FUNCTION(1, 2, "KP_MKOUT<4>")),
456 PXA_GPIO_PIN(PXA_PINCTRL_PIN(108),
457 PXA_FUNCTION(0, 1, "CIF_DD<7>"),
458 PXA_FUNCTION(1, 1, "CHOUT<0>"),
459 PXA_FUNCTION(1, 2, "KP_MKOUT<5>")),
460 PXA_GPIO_PIN(PXA_PINCTRL_PIN(109),
461 PXA_FUNCTION(0, 1, "MMDAT<1>"),
462 PXA_FUNCTION(0, 2, "MSSDIO"),
463 PXA_FUNCTION(1, 1, "MMDAT<1>"),
464 PXA_FUNCTION(1, 2, "MSSDIO")),
465 PXA_GPIO_PIN(PXA_PINCTRL_PIN(110),
466 PXA_FUNCTION(0, 1, "MMDAT<2>"),
467 PXA_FUNCTION(1, 1, "MMDAT<2>")),
468 PXA_GPIO_PIN(PXA_PINCTRL_PIN(111),
469 PXA_FUNCTION(0, 1, "MMDAT<3>"),
470 PXA_FUNCTION(1, 1, "MMDAT<3>")),
471 PXA_GPIO_PIN(PXA_PINCTRL_PIN(112),
472 PXA_FUNCTION(0, 1, "MMCMD"),
473 PXA_FUNCTION(0, 2, "nMSINS"),
474 PXA_FUNCTION(1, 1, "MMCMD")),
475 PXA_GPIO_PIN(PXA_PINCTRL_PIN(113),
476 PXA_FUNCTION(0, 3, "USB_P3_3"),
477 PXA_FUNCTION(1, 1, "I2S_SYSCLK"),
478 PXA_FUNCTION(1, 2, "AC97_RESET_n")),
479 PXA_GPIO_PIN(PXA_PINCTRL_PIN(114),
480 PXA_FUNCTION(0, 1, "CIF_DD<1>"),
481 PXA_FUNCTION(1, 1, "UEN"),
482 PXA_FUNCTION(1, 2, "UVS0")),
483 PXA_GPIO_PIN(PXA_PINCTRL_PIN(115),
484 PXA_FUNCTION(0, 1, "DREQ<0>"),
485 PXA_FUNCTION(0, 2, "CIF_DD<3>"),
486 PXA_FUNCTION(0, 3, "MBREQ"),
487 PXA_FUNCTION(1, 1, "UEN"),
488 PXA_FUNCTION(1, 2, "nUVS1"),
489 PXA_FUNCTION(1, 3, "PWM_OUT<1>")),
490 PXA_GPIO_PIN(PXA_PINCTRL_PIN(116),
491 PXA_FUNCTION(0, 1, "CIF_DD<2>"),
492 PXA_FUNCTION(0, 2, "AC97_SDATA_IN_0"),
493 PXA_FUNCTION(0, 3, "UDET"),
494 PXA_FUNCTION(1, 1, "DVAL<0>"),
495 PXA_FUNCTION(1, 2, "nUVS2"),
496 PXA_FUNCTION(1, 3, "MBGNT")),
497 PXA_GPIO_PIN(PXA_PINCTRL_PIN(117),
498 PXA_FUNCTION(0, 1, "SCL"),
499 PXA_FUNCTION(1, 1, "SCL")),
500 PXA_GPIO_PIN(PXA_PINCTRL_PIN(118),
501 PXA_FUNCTION(0, 1, "SDA"),
502 PXA_FUNCTION(1, 1, "SDA")),
503 PXA_GPIO_PIN(PXA_PINCTRL_PIN(119),
504 PXA_FUNCTION(0, 1, "USBHPWR<2>")),
505 PXA_GPIO_PIN(PXA_PINCTRL_PIN(120),
506 PXA_FUNCTION(1, 2, "USBHPEN<2>")),
507};
508
509static int pxa27x_pinctrl_probe(struct platform_device *pdev)
510{
511 int ret, i;
512 void __iomem *base_af[8];
513 void __iomem *base_dir[4];
514 void __iomem *base_sleep[4];
515 struct resource *res;
516
517 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
518 base_af[0] = devm_ioremap_resource(&pdev->dev, res);
519 if (IS_ERR(base_af[0]))
520 return PTR_ERR(base_af[0]);
521
522 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
523 base_dir[0] = devm_ioremap_resource(&pdev->dev, res);
524 if (IS_ERR(base_dir[0]))
525 return PTR_ERR(base_dir[0]);
526
527 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
528 base_dir[3] = devm_ioremap_resource(&pdev->dev, res);
529 if (IS_ERR(base_dir[3]))
530 return PTR_ERR(base_dir[3]);
531
532 res = platform_get_resource(pdev, IORESOURCE_MEM, 3);
533 base_sleep[0] = devm_ioremap_resource(&pdev->dev, res);
534 if (IS_ERR(base_sleep[0]))
535 return PTR_ERR(base_sleep[0]);
536
537 for (i = 0; i < ARRAY_SIZE(base_af); i++)
538 base_af[i] = base_af[0] + sizeof(base_af[0]) * i;
539 for (i = 0; i < 3; i++)
540 base_dir[i] = base_dir[0] + sizeof(base_dir[0]) * i;
541 for (i = 0; i < ARRAY_SIZE(base_sleep); i++)
542 base_sleep[i] = base_sleep[0] + sizeof(base_af[0]) * i;
543
544 ret = pxa2xx_pinctrl_init(pdev, pxa27x_pins, ARRAY_SIZE(pxa27x_pins),
545 base_af, base_dir, base_sleep);
546 return ret;
547}
548
549static const struct of_device_id pxa27x_pinctrl_match[] = {
550 { .compatible = "marvell,pxa27x-pinctrl", },
551 {}
552};
553MODULE_DEVICE_TABLE(of, pxa27x_pinctrl_match);
554
555static struct platform_driver pxa27x_pinctrl_driver = {
556 .probe = pxa27x_pinctrl_probe,
557 .driver = {
558 .name = "pxa27x-pinctrl",
559 .of_match_table = pxa27x_pinctrl_match,
560 },
561};
562module_platform_driver(pxa27x_pinctrl_driver);
563
564MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
565MODULE_DESCRIPTION("Marvell PXA27x pinctrl driver");
566MODULE_LICENSE("GPL v2");
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-11 18:36:39 -0400